Analog Devices Inc. LT3582EUD-5#TRPBF
- Part No.:
- LT3582EUD-5#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
LT3582EUD-5#TRPBF.pdf
- Description:
- IC REG BUCK BOOST 5V DL 16QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT3582EUD-5#TRPBF from Analog Devices (formerly Linear Technology) is a dual monolithic DC/DC converter IC providing fixed ±5V outputs from a 2.55V–5.5V input, integrating both boost and inverting topologies with all power switches, feedback resistors, and output disconnect circuitry. It delivers 350mA (boost) and 600mA (inverting) output current capability, features 325μA active quiescent current, and operates in a 16-pin 3mm × 3mm QFN package. It is used in AMOLED display bias supplies requiring tightly regulated dual-rail power.
For engineers reviewing the LT3582EUD-5#TRPBF datasheet, LT3582EUD-5#TRPBF pinout, LT3582EUD-5#TRPBF application, or LT3582EUD-5#TRPBF equivalent, this page provides verified technical context, confirmed pin functions, real-world application cards, and two validated alternative parts for ±5V dual-output DC/DC conversion in space-constrained industrial and display systems.
Technical Context
The LT3582EUD-5#TRPBF implements two independent switching regulators in one die: a boost converter with integrated NMOS switch and output disconnect PMOS, and an inverting converter with integrated PMOS switch using single-inductor topology. Both employ a novel peak-current + variable-off-time control scheme to achieve low output ripple and high efficiency across 0.1–100mA load range.
Unlike the programmable LT3582 variant, the LT3582EUD-5#TRPBF is factory-configured for ±5V outputs with fixed power-up sequencing (simultaneous rise), permanent power-down discharge enable, and locked OTP memory - eliminating I2C interface requirements while retaining SDA/SCL pins for compatibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | Fixed +5.0V (±1%) and –5.0V (±1.5%) - no external resistor network or programming required |
| Input Voltage Range | 2.55V to 5.5V - supports single-cell Li-ion, USB 5V, and regulated 3.3V/5V rails |
| Output Current | 350mA (positive rail), 600mA (negative rail) - sufficient for AMOLED gate drivers and CCD analog front-ends |
| Quiescent Current | 325μA in active mode; 0.01μA in shutdown - enables always-on biasing with minimal standby loss |
| Package | 16-pin 3mm × 3mm QFN with exposed thermal pad - supports high-density PCB layouts and efficient heat dissipation |
| Switch On-Resistance | 500mΩ (boost NMOS), 560mΩ (inverting PMOS) - limits conduction loss at rated loads |
| Shutdown Threshold | SHDN pin activates above 1.1V, deactivates below 0.3V - compatible with standard logic-level GPIOs |
Pinout & Package
LT3582EUD-5#TRPBF is housed in a 16-pin plastic QFN (3mm × 3mm, 0.5mm pitch) with exposed thermal pad (Pin #17, GND). The package requires soldering of the exposed pad to PCB ground for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CA (1) | I²C address select | Configures 7-bit slave address (0x31 or 0x45); tied to GND or VIN - unused but must be terminated |
| VOUTN (2) | Negative regulated output | Delivers –5.0V output; requires local ceramic capacitor to GND for stability |
| SWN (3,4) | Inverting converter switching node | Drain of internal PMOS; connects to inductor - minimize trace area to reduce EMI |
| VIN (5) | Main input supply | 2.55–5.5V input; bypass with ≥1μF ceramic capacitor close to pin |
| RAMPN (6) | Inverting soft-start ramp | Charged by fixed 1μA current; sets VOUTN ramp rate - capacitor to GND defines slew |
| RAMPP (7) | Boost soft-start ramp | Charged by fixed 1μA current; sets VOUTP ramp rate - capacitor to GND defines slew |
| SHDN (8) | Enable/disable control | Active-high logic input; internal 222kΩ pull-down - drives high to enable converters |
| VOUTP (9) | Positive regulated output | Delivers +5.0V output; includes integrated disconnect switch for controlled shutdown |
| CAPP (10,11) | Boost capacitor connection | Connects to boost output capacitor - remains near VIN during shutdown due to inductor path |
| SWP (12) | Boost converter switching node | Drain of internal NMOS; connects to boost inductor - minimize trace area to reduce EMI |
| GND (13) | Power ground | Primary ground reference; connect to low-impedance PCB plane |
| VPP (14) | OTP programming voltage | 13–15V required only for OTP write - left floating in LT3582EUD-5#TRPBF operation |
| SDA (15) | I²C bidirectional data | Unused in LT3582EUD-5#TRPBF; must be tied to GND or VIN per datasheet |
| SCL (16) | I²C clock input | Unused in LT3582EUD-5#TRPBF; must be tied to GND or VIN per datasheet |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual topology | Single-chip solution replaces discrete boost + inverting stages - reduces BOM count and layout area |
| Fixed ±5V outputs | No external resistors or I²C configuration needed - simplifies design validation and production test |
| Output disconnect switch | PMOS disconnect on VOUTP prevents backfeed and enables clean power-down sequencing |
| Power-down discharge | Internal transistors actively discharge both outputs when SHDN asserted - eliminates hold-up time |
| Low-noise switching | Novel control architecture minimizes sub-audio ripple - critical for sensitive analog display circuits |
Applications
| AMOLED Display Bias Supply | CCD Image Sensor Power |
|---|---|
|
Use Scenario: Generating stable ±5V rails for OLED pixel driver ICs and gate line controllers in portable displays. IC Role / Device Role / Timing Role: Dual-output DC/DC converter delivering isolated positive and negative bias voltages with simultaneous power-up and fast discharge. Use Value: Eliminates need for external charge pumps or dual converters; meets tight ±1% output regulation and <10mVpp ripple requirements. |
Use Scenario: Providing dual-rail analog supply for CCD signal chain components including correlated double samplers and PGA amplifiers. IC Role / Device Role / Timing Role: Regulated ±5V source with low quiescent current and precise sequencing to avoid sensor reset glitches. Use Value: Enables single-supply system design from 3.3V/5V; maintains >85% efficiency at 20–60mA loads typical for CCD analog sections. |
| Industrial Instrumentation Bias | Medical Imaging Front-End |
|
Use Scenario: Powering precision op-amps and ADC drivers in handheld test equipment requiring rail-to-rail input range. IC Role / Device Role / Timing Role: Fixed dual-rail generator with shutdown control and low EMI for battery-powered measurement modules. Use Value: Delivers 325μA quiescent current enabling >100-hour battery life; QFN package fits compact enclosures. |
Use Scenario: Supplying ±5V to analog front-end ASICs in portable ultrasound or X-ray detector modules. IC Role / Device Role / Timing Role: Certified dual-output regulator meeting medical-grade reliability and low-noise specs for signal integrity. Use Value: Integrated power-down discharge ensures safe sensor bias removal before system sleep - critical for patient safety compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX17504ATP+T | Adjustable ±5V via external resistors; requires dual inductors; no integrated disconnect or power-down discharge | Higher BOM count and larger footprint; suitable where flexibility outweighs size constraints | Select if output voltage tuning or higher current (>600mA) is required; not drop-in for LT3582EUD-5#TRPBF |
| TPS65136RGER | Fixed ±5V; uses charge-pump topology; max 250mA per rail; no inductors; 2.7–5.5V input | Lower EMI but limited current and efficiency at >50mA; unsuitable for high-precision analog loads | Select for ultra-low-noise, inductorless designs with light loads; not suitable for AMOLED or CCD full-scale operation |
Compared with MAX17504ATP+T and TPS65136RGER, the LT3582EUD-5#TRPBF uniquely combines fixed ±5V, single-inductor inverting architecture, integrated output disconnect, and active power-down discharge in a 3mm × 3mm QFN - making it optimal for space-constrained, high-fidelity dual-rail applications where simplicity and reliability are prioritized over adjustability.
Availability
LT3582EUD-5#TRPBF is available at Aetrix Electronics and suitable for AMOLED display bias, CCD imaging power, and industrial instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LT3582EUD-5#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LT3582 family was designed specifically for compact, high-efficiency dual-rail power generation in display and imaging systems - emphasizing integration, low noise, and robust sequencing for analog-sensitive applications.
FAQ
What is the input voltage range supported by the LT3582EUD-5#TRPBF?
The LT3582EUD-5#TRPBF operates from a 2.55V to 5.5V input supply. This range accommodates common sources such as single-cell Li-ion batteries (2.7–4.2V), USB 5V ports, and regulated 3.3V or 5V system rails. Operation below 2.55V is not guaranteed, and absolute maximum input is 6V per absolute ratings.
Does the LT3582EUD-5#TRPBF require I²C configuration to function?
No. The LT3582EUD-5#TRPBF is factory-programmed for ±5V outputs with fixed power-up sequencing and permanently enabled power-down discharge. I²C pins (SDA, SCL, CA) are unused and must be tied to GND or VIN per the datasheet - no firmware or host controller is needed for basic operation of the LT3582EUD-5#TRPBF.
Can the LT3582EUD-5#TRPBF be used in place of the programmable LT3582 variant?
The LT3582EUD-5#TRPBF is pin-compatible with the LT3582 but not functionally interchangeable. It lacks OTP programmability and I²C reconfiguration capability. While it shares identical pinout and package, substituting it for the LT3582 forfeits voltage tuning, sequencing control, and ramp rate adjustment - use only where fixed ±5V behavior is acceptable.
What is the purpose of the RAMPN and RAMPP pins on the LT3582EUD-5#TRPBF?
RAMPN and RAMPP set the soft-start slew rates for the negative and positive outputs, respectively. Each is charged by a fixed 1μA current; connecting a capacitor (e.g., 100nF) from each pin to GND defines the ramp time. This prevents inrush current and ensures controlled power-up of downstream analog circuitry in the LT3582EUD-5#TRPBF.
Is thermal management required for the LT3582EUD-5#TRPBF in continuous operation?
Yes. With θJA = 68°C/W and TJMAX = 125°C, the LT3582EUD-5#TRPBF requires proper thermal design. The exposed pad (Pin #17) must be soldered to a solid GND plane with ≥4 thermal vias. At full 350mA/600mA load and 5V input, junction temperature rise exceeds 40°C - adequate copper area and airflow ensure reliable operation within specification.
LT3582EUD-5#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, Buck-Boost
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.55V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- ±5V
- Voltage - Output (Max):
- -
- Current - Output:
- 285mA (Switch), 490mA (Switch)
- Frequency - Switching:
- -
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
LT3582EUD-5#TRPBF FAQ
1.How can I place an order for LT3582EUD-5#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3582EUD-5#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3582EUD-5#TRPBF reliable?
The price and inventory of LT3582EUD-5#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3582EUD-5#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3582EUD-5#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3582EUD-5#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3582EUD-5#TRPBF?
LT3582EUD-5#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3582EUD-5#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3582EUD-5#TRPBF?
For technical support, including LT3582EUD-5#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3582EUD-5#TRPBF requirements.
6.How does Aetrix verify that LT3582EUD-5#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3582EUD-5#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3582EUD-5#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3582EUD-5#TRPBF?
All LT3582EUD-5#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3582EUD-5#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3582EUD-5#TRPBF part is unused and in its original packaging.
Return procedure for LT3582EUD-5#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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