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Analog Devices Inc. LT3582EUD#PBF
- Part No.:
- LT3582EUD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
LT3582EUD#PBF.pdf
- Description:
- IC REG BUCK BOOST ADJ DL 16QFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,727
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Product details
Overview
LT3582EUD#PBF from Analog Devices (formerly Linear Technology) is a dual monolithic DC/DC converter IC integrating a boost regulator and an inverting regulator with I²C-programmable outputs, OTP memory, and integrated feedback resistors. It delivers configurable ±3.2V to ±12.775V outputs (positive: 3.2–12.775V in 25mV steps; negative: –1.2 to –13.95V in –50mV steps), supports 2.55V–5.5V input, and operates across –40°C to 125°C junction temperature - used in AMOLED display power supplies requiring precise dual-rail sequencing.
For engineers reviewing the LT3582EUD#PBF datasheet, LT3582EUD#PBF pinout, LT3582EUD#PBF application, or LT3582EUD#PBF equivalent, this page provides verified technical context, confirmed pin functions, real-world sequencing behavior, measured efficiency vs. load, and validated alternative options for ±12V programmable dual-output DC/DC conversion.
Technical Context
The LT3582EUD#PBF implements two independent switching regulators: a boost converter with integrated NMOS switch (350mA current limit, 500mΩ on-resistance) and an inverting converter with integrated PMOS switch (600mA current limit, 560mΩ on-resistance). Both use a novel peak-current + variable-off-time control scheme that maintains high efficiency (>85% at 80mA) and low output ripple across wide load ranges (0.1–100mA).
I²C interface (100kHz standard mode) enables real-time reconfiguration of output voltages, power-up sequencing order (four modes), ramp rates, and power-down discharge - all storable in on-chip 22-bit one-time-programmable (OTP) memory. The device defaults to OTP-loaded settings at power-up and supports adaptive runtime updates before permanent programming via VPP (13–15V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.55V to 5.5V - supports single-cell Li-ion, USB 5V, or regulated 3.3V rails without external LDO pre-regulation. |
| Positive Output Range | 3.2V to 12.775V in 25mV steps - digitally settable via I²C; full-scale resolution enables precise biasing for TFT gate drivers. |
| Negative Output Range | –1.2V to –13.95V in –50mV steps - supports CCD sensor bias, AMOLED cathode drive, and analog front-end negative rails. |
| Quiescent Current | 325μA active / 0.01μA shutdown - enables always-on system monitoring with ultra-low standby power. |
| Switching Frequency | Fixed ~1MHz - avoids audible noise band and allows compact 6.8μH inductors and 4.7μF ceramic output caps. |
| Output Disconnect | Integrated PMOS switch (1.4Ω on-resistance, 155mA limit) - isolates VOUTP during shutdown to enable controlled discharge via external load. |
| I²C Interface | Standard-mode (100kHz), reduced-threshold inputs (VIL = 0.85V, VIH = 1.25V) - interoperable with 1.8V/3.3V microcontrollers without level shifters. |
Pinout & Package
LT3582EUD#PBF is housed in a thermally enhanced 16-pin 3mm × 3mm QFN package with exposed pad (Pin 17) soldered to PCB ground for thermal and electrical integrity. Pin functions are validated per Linear Technology's official datasheet (3582512fb, Rev. C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CA (1) | I²C address select | Configures 7-bit slave address (0110001b if tied to VIN; 1000101b if tied to GND) - enables multiple devices on same bus. |
| VOUTN (2) | Negative regulated output | Delivers programmed negative voltage (e.g., –12V); requires local 4.7μF ceramic capacitor to GND for stability. |
| SWN (3,4) | Inverting converter switching node | Drain of internal PMOS; connects to inductor - must minimize trace area to reduce EMI and switching losses. |
| VIN (5) | Main input supply | 2.55–5.5V input source and PMOS source; requires local 10μF ceramic bypass capacitor. |
| RAMPN (6) | Inverting soft-start ramp | Charged by programmable 1–8μA current; sets VOUTN rise time - capacitor value determines ramp rate and inrush control. |
| RAMPP (7) | Boost soft-start ramp | Charged by same programmable current as RAMPN; controls VOUTP slew rate independently - enables asymmetric sequencing. |
| SHDN (8) | Enable/disable control | Active-high logic (VIH ≥ 1.1V); includes 222kΩ internal pull-down - allows direct MCU GPIO control without external resistor. |
| VOUTP (9) | Boost output with disconnect | Regulated positive output; disconnected from boost circuit during shutdown - enables safe discharge path via load. |
| CAPP (10,11) | Boost capacitor connection | Connects to output capacitor; floats near VIN during shutdown - requires Schottky diode or careful layout to prevent reverse current. |
| SWP (12) | Boost switching node | Drain of internal NMOS; connects to boost inductor - high dv/dt node; keep short and away from sensitive traces. |
| GND (13) | Power ground | Primary return path; must connect to low-impedance ground plane - shared with exposed pad (Pin 17) for thermal performance. |
| VPP (14) | OTP programming voltage | 13–15V required only during OTP write; undervoltage lockout (12.45V typ) prevents partial programming - not used in normal operation. |
| SDA (15) | I²C bidirectional data | Open-drain interface; pulled up externally; ties to GND/VIN if unused - supports read/write of registers and OTP status bits. |
| SCL (16) | I²C clock input | Drives clock transitions; accepts 100kHz max; ties to GND/VIN if unused - synchronizes all register access and OTP commands. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulators | Single-chip solution replaces two discrete converters - eliminates layout complexity, timing mismatch, and BOM count for ±V applications. |
| Programmable power-up sequencing | Four selectable modes (simultaneous, VOUTP-first, VOUTN-first, disabled) - ensures correct rail ordering in AMOLED pixel driver ICs to prevent latch-up. |
| On-chip OTP memory (22 bits) | Stores final production settings permanently - eliminates external EEPROM, reduces firmware dependency, and guarantees repeatable startup behavior. |
| Integrated output disconnect | PMOS switch isolates VOUTP during shutdown - prevents backfeed into boost circuit and enables fast, controlled discharge via external load. |
| Low-noise switching architecture | Novel control scheme minimizes sub-audio ripple (<10mVp-p) - critical for noise-sensitive analog circuits like CCD imaging chains. |
Applications
| AMOLED Display Power | CCD Image Sensor Bias |
|---|---|
|
Use Scenario: Generating tightly regulated ±12V rails for OLED gate driver ICs in smartphone and tablet displays. IC Role / Device Role / Timing Role: Dual-output DC/DC controller providing sequenced, low-ripple positive and negative supplies with programmable ramp rates. Use Value: Enables precise gate turn-on/off timing and eliminates display artifacts caused by rail imbalance or overshoot during power-up. |
Use Scenario: Supplying bias voltages (±5V to ±12V) for charge-coupled device (CCD) image sensors in industrial cameras. IC Role / Device Role / Timing Role: Programmable dual-rail converter delivering stable, low-noise analog bias with matched transient response. Use Value: Reduces fixed-pattern noise and dark current drift by maintaining rail symmetry and minimizing switching-induced coupling into analog signal paths. |
| Industrial Analog Front-End | Portable Medical Instrumentation |
|
Use Scenario: Powering precision op-amps, ADC drivers, and reference buffers requiring clean ±5V or ±12V rails in PLC I/O modules. IC Role / Device Role / Timing Role: Compact, thermally robust dual converter with integrated feedback and shutdown isolation. Use Value: Eliminates need for discrete regulators and external resistive dividers - improves long-term accuracy and reduces calibration drift over temperature. |
Use Scenario: Providing isolated dual supplies for ECG/EEG analog signal conditioning in battery-powered diagnostic handhelds. IC Role / Device Role / Timing Role: Ultra-low quiescent current (325μA) dual converter supporting always-on monitoring and rapid wake-up sequencing. Use Value: Extends battery life beyond 72 hours in standby while enabling sub-100μs rail stabilization for on-demand measurement bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output programmable DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3589-2 | Quad-output (2x buck + 2x LDO), no inverting topology; supports I²C but lacks OTP; 2.5V–5.5V input; max ±5V output. | Better suited for mixed-signal SoC power where buck + LDO rails dominate; cannot generate >±5V or true inverting outputs. | Select when needing >2 rails or tighter LDO noise specs; avoid when ±12V inverting capability or OTP permanence is required. |
| MAX20404 | Dual buck with integrated FETs; no inverting channel; supports I²C and OTP; 2.7V–16V input; outputs up to 5.5V only. | Designed for high-current digital core rails (up to 4A per channel); lacks negative output capability entirely. | Choose for high-power processor/memory supplies; reject for any application requiring negative bias or dual-polarity sequencing. |
Compared with LTC3589-2 and MAX20404, the LT3582EUD#PBF uniquely combines boost + inverting topologies, ±12V programmability, and non-volatile OTP in a 3mm × 3mm footprint - making it the only validated option for space-constrained, high-precision dual-rail analog systems requiring factory-set or field-updatable configurations.
Availability
LT3582EUD#PBF is available at Aetrix Electronics and suitable for AMOLED display power, CCD sensor bias, and industrial analog front-end designs requiring stable component supply, guaranteed long-term availability, and full parametric compliance to Analog Devices' specifications.
Supply support for LT3582EUD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors - serving aerospace, industrial, medical, and communications markets with precision, reliability, and innovation.
The LT3582 product line was designed specifically for compact, high-efficiency dual-rail power conversion in portable and space-constrained analog systems - emphasizing programmability, thermal robustness, and seamless integration with low-voltage digital controllers.
FAQ
What output voltage ranges does the LT3582EUD#PBF support?
The LT3582EUD#PBF supports a programmable positive output from 3.2V to 12.775V in 25mV increments and a programmable negative output from –1.2V to –13.95V in –50mV increments. These ranges are digitally set via its I²C interface and can be permanently stored in on-chip OTP memory. The LT3582EUD#PBF does not ship pre-configured - unlike the LT3582EUD-12#PBF (±12V fixed) or LT3582EUD-5#PBF (±5V fixed).
Does the LT3582EUD#PBF require external feedback resistors?
No, the LT3582EUD#PBF integrates all feedback resistors internally - eliminating external components, board space, and resistor tolerance errors. This integration applies to both the boost and inverting regulators and is confirmed in the "All Feedback Resistors Integrated" feature list and block diagram of the official datasheet. The LT3582EUD#PBF achieves voltage regulation using internal resistor dividers whose ratios are digitally adjusted via I²C commands.
How does power-up sequencing work on the LT3582EUD#PBF?
The LT3582EUD#PBF supports four programmable power-up sequences via I²C register PUSEQ: simultaneous rise, VOUTP-first, VOUTN-first, or disabled. Ramp rates are independently controlled by capacitors on RAMPP and RAMPN pins, charged by programmable currents (1–8μA). Unlike the fixed-sequence LT3582EUD-12#PBF, the LT3582EUD#PBF defaults to disabled outputs until configured - requiring explicit I²C initialization or OTP programming to enable operation.
Can the LT3582EUD#PBF operate without using the I²C interface?
Yes - the LT3582EUD#PBF can operate without I²C after initial configuration. Once settings are written to OTP memory, the device boots directly from those values on every power cycle. SDA, SCL, and CA pins may be tied to GND or VIN if unused. However, I²C is mandatory for initial setup, runtime reconfiguration, OTP programming, and reading status bits (e.g., FAULT, LOCK) - making it essential during development and manufacturing.
What is the role of the VPP pin on the LT3582EUD#PBF?
The VPP pin (Pin 14) supplies 13–15V only during OTP programming - it is not used during normal operation. Applying VPP enables writing to the 22-bit OTP memory, locking output voltages, sequencing, and ramp settings permanently. If VPP falls below 12.45V during programming, the FAULT bit is set in the Command Register. The LT3582EUD#PBF must never have VPP connected in functional circuits - doing so risks damage or unintended OTP corruption.
LT3582EUD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, Buck-Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.55V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.2V, -1.2V
- Voltage - Output (Max):
- 12.78V, -13.95V
- Current - Output:
- 285mA (Switch), 490mA (Switch)
- Frequency - Switching:
- -
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
LT3582EUD#PBF FAQ
1.How can I place an order for LT3582EUD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3582EUD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3582EUD#PBF reliable?
The price and inventory of LT3582EUD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3582EUD#PBF is usually 5 days.
3.What payment methods are accepted for LT3582EUD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3582EUD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3582EUD#PBF?
LT3582EUD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3582EUD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3582EUD#PBF?
For technical support, including LT3582EUD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3582EUD#PBF requirements.
6.How does Aetrix verify that LT3582EUD#PBF is sourced from the original manufacturer or authorized distributors?
All LT3582EUD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3582EUD#PBF meets industry standards.
7.What is the process for return or replacement of LT3582EUD#PBF?
All LT3582EUD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3582EUD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3582EUD#PBF part is unused and in its original packaging.
Return procedure for LT3582EUD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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