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Analog Devices Inc. LT3640EFE#PBF
- Part No.:
- LT3640EFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LT3640EFE#PBF.pdf
- Description:
- IC REG BUCK ADJ DL 28TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,504
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Product details
Overview
LT3640EFE#PBF from Analog Devices (formerly Linear Technology) is a dual-channel monolithic buck switching regulator IC with integrated power-on reset and window-mode watchdog timer. It delivers 1.3A from its high-voltage nonsynchronous channel (4V–35V input, 3.3V/0.8A typical output) and 1.1A from its low-voltage synchronous channel (2.5V–5.5V input, 1.8V/0.8A typical output), operating at adjustable 350kHz–2.5MHz frequency with Burst Mode® for light-load efficiency. It is used in automotive ECU power rails and industrial dual-rail systems requiring fault-tolerant sequencing.
For engineers reviewing the LT3640EFE#PBF datasheet, LT3640EFE#PBF pinout, LT3640EFE#PBF application, or LT3640EFE#PBF equivalent, key selection considerations include its dual-output voltage tracking capability via SS1/SS2 pins, programmable POR and watchdog timeout using CPOR/CWDT capacitors, cycle-by-cycle current limiting on both channels, and thermal performance in the 28-pin TSSOP package with exposed pad.
Technical Context
The LT3640EFE#PBF integrates two independent current-mode PWM controllers sharing a single adjustable oscillator. The high-voltage channel uses an internal 2.4A NPN top switch with DA-pin-based valley current sensing and 36.5V OVLO protection; the low-voltage channel employs internal synchronous NMOS/PMOS switches with 1.5A/1.2A current limits and 200mΩ/275mΩ RDS(ON). Both channels feature soft-start, PGOOD monitoring, and enable-controlled sequencing.
Its power-on reset asserts RST1/RST2 until FB1 > 1.165V and FB2 > 550mV, timed by CPOR capacitor; the window-mode watchdog monitors WDI pulse timing against upper (tWDU) and lower (tWDL) boundaries set by CWDT, triggering WDO assertion if pulses violate either bound. Synchronization is supported via external clock on SYNC pin (350kHz–2.5MHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range (HV) | 4V to 35V - supports direct connection to automotive battery or industrial 24V rail with 36.5V OVLO clamp |
| Input Voltage Range (LV) | 2.5V to 5.5V - enables post-regulation from HV output or independent low-voltage supply |
| Switching Frequency | 350kHz to 2.5MHz - set by RT resistor or external SYNC signal; enables compact magnetics at high frequencies |
| FB1 Reference Voltage | 1.265V ±15mV - sets high-side output via resistor divider; determines accuracy of 3.3V/5V rails |
| FB2 Reference Voltage | 600mV ±12mV - sets low-side output (e.g., 1.2V, 1.8V); enables precise core voltage regulation |
| Quiescent Current | 290µA typical - ensures low standby power in always-on automotive modules |
| Shutdown Current | <1µA - minimizes battery drain during system sleep modes |
Pinout & Package
The LT3640EFE#PBF is housed in a thermally enhanced 28-lead plastic TSSOP package (FE) with exposed pad (Pin 29) soldered to PCB ground for θJA = 30°C/W. Pin numbering follows standard top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB1 (Pin 6) | High-voltage feedback input | Regulated to 1.265V; connects to resistor divider to set VOUT1 (e.g., 3.3V) |
| FB2 (Pin 1) | Low-voltage feedback input | Regulated to 600mV; connects to resistor divider to set VOUT2 (e.g., 1.8V) |
| EN/UVLO (Pin 3) | Enable and undervoltage lockout input | 1.26V threshold enables shutdown below 4V VIN; supports programmable UVLO with resistor divider |
| RT (Pin 7) | Oscillator frequency programming | Resistor to GND sets switching frequency from 350kHz to 2.5MHz |
| CPOR (Pin 12) | Power-on reset timing capacitor | Capacitor to GND programs RST1/RST2 timeout (e.g., 9.5ms typical with 220pF) |
| CWDT (Pin 11) | Watchdog timer capacitor | Capacitor to GND sets watchdog window boundaries (e.g., tWDU = 32ms with 820pF) |
| PGOOD (Pin 2) | Power-good status output | Open-drain flag asserted when FB2 is in regulation (±40mV hysteresis) |
| WDO (Pin 10) | Watchdog timeout output | Open-drain reset signal triggered when WDI pulse timing violates programmed window |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent buck regulators | Enables simultaneous generation of high- and low-voltage rails (e.g., 3.3V + 1.8V) from single or split inputs without external controllers |
| Programmable window-mode watchdog | Monitors microprocessor activity via WDI pin and asserts WDO if pulse intervals fall outside user-defined upper/lower bounds-critical for safety-critical automotive firmware |
| Burst Mode® operation | Maintains >85% efficiency at 10mA load while reducing quiescent current to 290µA-ideal for battery-backed or always-on subsystems |
| Thermally optimized TSSOP package | Exposed pad (Pin 29) tied to GND reduces θJA to 30°C/W, enabling 1.3A/1.1A continuous output without forced air |
| Robust fault protection | Cycle-by-cycle current limit, short-circuit tolerant design, and 55V transient survivability ensure reliability in noisy automotive environments |
Applications
| Automotive Engine Control Unit (ECU) | Industrial Programmable Logic Controller (PLC) |
|---|---|
Use Scenario: Powering MCU core (1.8V), I/O (3.3V), CAN transceiver (5V), and sensor interface circuitry within a sealed engine bay module. IC Role / Device Role / Timing Role: Dual-output DC/DC controller providing sequenced, regulated rails with POR and watchdog supervision to meet ISO 26262 ASIL-B requirements. Use Value: Eliminates need for discrete reset IC and separate watchdog; single-chip solution reduces BOM count and improves startup reliability under cold-crank conditions (VIN down to 4V). | Use Scenario: Generating isolated 3.3V logic and 1.2V FPGA core supplies in a DIN-rail mounted control unit with wide ambient temperature range (–40°C to 125°C). IC Role / Device Role / Timing Role: Primary power management IC delivering tightly regulated outputs with programmable soft-start (SS1/SS2) and thermal-aware current limiting. Use Value: Synchronous LV channel achieves >90% efficiency at 1.2V/1A; exposed-pad TSSOP sustains full load at 105°C ambient without derating. |
| Medical Diagnostic Imaging Subsystem | Telecom Remote Radio Head (RRH) |
Use Scenario: Supplying ADC reference (3.3V), FPGA I/O bank (1.8V), and analog front-end bias (5V) in portable ultrasound equipment with strict EMI and ripple requirements. IC Role / Device Role / Timing Role: Low-noise dual buck regulator with Burst Mode® and adjustable frequency to avoid sensitive IF bands; PGOOD enables system-level health monitoring. Use Value: 2MHz operation allows use of 2.2µH inductors; <10mVPP output ripple in Burst Mode meets medical-grade signal integrity specs. | Use Scenario: Providing bias rails for GaN PA drivers (5V), digital control logic (3.3V), and RFIC core (1.0V) in outdoor 5G base station radios exposed to voltage transients. IC Role / Device Role / Timing Role: High-reliability power controller with 55V transient tolerance, OVLO, and watchdog supervision for remote unattended operation. Use Value: Withstands 50V/100ms load-dump events per ISO 7637-2; window watchdog prevents silent firmware hangs during extended field deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3631EMSE#PBF | Single-channel 3.5A synchronous buck; no integrated watchdog or POR; requires external reset IC | Lacks dual-output capability and system supervision features; suitable only when second rail is generated elsewhere | Select only if higher single-rail current (3.5A) is required and system-level reset/watchdog is already implemented externally |
| TPS65270RGET | Dual-channel (2A + 1.5A) with integrated LDOs; fixed 500kHz/1MHz freq; no programmable watchdog or window mode | Includes 3.3V/250mA LDO but lacks adjustable POR timing and true window watchdog; rated only to 85°C junction | Prefer for cost-sensitive consumer applications where extended temperature and advanced supervision are not required |
Compared with LTC3631EMSE#PBF and TPS65270RGET, the LT3640EFE#PBF uniquely combines dual independent buck regulation, programmable window-mode watchdog, and automotive-grade –40°C to 125°C operation in a single TSSOP package-making it the only option that satisfies functional safety sequencing and fault detection in ECU and PLC designs without external components.
Availability
LT3640EFE#PBF is available at Aetrix Electronics and suitable for automotive electronic control units, industrial programmable logic controllers, and medical diagnostic imaging subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LT3640EFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LT3640 product line was designed by Linear Technology specifically for automotive and industrial applications demanding dual-rail power conversion with integrated system supervision-enabling simplified, robust, and space-efficient power architecture in safety-critical environments.
FAQ
What is the maximum input voltage the LT3640EFE#PBF can withstand without damage?
The LT3640EFE#PBF has an absolute maximum VIN rating of 55V for nonrepetitive one-second transients. Its overvoltage lockout (OVLO) activates at 36.5V typical, disabling switching to protect internal circuitry. Continuous operation is specified up to 35V. This 55V transient rating makes LT3640EFE#PBF suitable for automotive load-dump scenarios per ISO 7637-2, provided external TVS clamping is used for sustained overvoltage events beyond one second.
How does the LT3640EFE#PBF implement window-mode watchdog functionality?
The LT3640EFE#PBF implements window-mode watchdog by monitoring pulse timing on the WDI pin using two independently set boundaries: an upper limit (tWDU) and a lower limit (tWDL). These are configured via the CWDT capacitor. If consecutive WDI falling edges occur too close together (< tWDL) or too far apart (> tWDU), the WDO pin is pulled low. This dual-boundary detection prevents false resets from noise or missed pulses-unlike simple timeout watchdogs-and is explicitly documented in the LT3640EFE#PBF datasheet timing diagrams.
Can the LT3640EFE#PBF generate different output voltages on each channel, and how is this achieved?
Yes, the LT3640EFE#PBF supports independent output voltages: the high-voltage channel regulates FB1 to 1.265V, enabling outputs like 3.3V or 5V via resistor divider; the low-voltage channel regulates FB2 to 600mV, supporting 1.2V, 1.8V, or other sub-1V rails. Each channel's feedback node (FB1/FB2) accepts external dividers, and soft-start is independently controlled via SS1 and SS2 pins-allowing staggered ramp-up or tracking behavior. This flexibility is confirmed in the LT3640EFE#PBF application circuits and electrical characteristics table.
What thermal performance can be expected from the LT3640EFE#PBF in its TSSOP package?
The LT3640EFE#PBF in the 28-lead TSSOP (FE) package has θJA = 30°C/W and θJC = 8°C/W when the exposed pad (Pin 29) is soldered to a minimum 1-inch² copper area. At full 1.3A/1.1A load with 12V/3.3V inputs, junction temperature rise is ~39°C above ambient-well within the –40°C to 125°C operating range. This thermal performance is validated in the LT3640EFE#PBF datasheet's "Thermal Characteristics" section and typical efficiency plots.
Does the LT3640EFE#PBF support synchronization to an external clock, and what are the constraints?
Yes, the LT3640EFE#PBF supports external synchronization via the SYNC pin, accepting 350kHz–2.5MHz positive clock signals with ≥2V amplitude and ≥40ns pulse width. The internal oscillator must be set ≥20% below the lowest expected SYNC frequency using the RT resistor. SYNC is ignored until FB1 exceeds 1.165V, ensuring stable internal operation before locking. This behavior is specified in the LT3640EFE#PBF Electrical Characteristics table and Applications Information section.
LT3640EFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 35V
- Voltage - Output (Min/Fixed):
- 0.6V, 1.265V
- Voltage - Output (Max):
- 33.97V
- Current - Output:
- 1.1A, 1.3A
- Frequency - Switching:
- 500kHz ~ 2MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
LT3640EFE#PBF FAQ
1.How can I place an order for LT3640EFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3640EFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3640EFE#PBF reliable?
The price and inventory of LT3640EFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3640EFE#PBF is usually 5 days.
3.What payment methods are accepted for LT3640EFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3640EFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3640EFE#PBF?
LT3640EFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3640EFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3640EFE#PBF?
For technical support, including LT3640EFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3640EFE#PBF requirements.
6.How does Aetrix verify that LT3640EFE#PBF is sourced from the original manufacturer or authorized distributors?
All LT3640EFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3640EFE#PBF meets industry standards.
7.What is the process for return or replacement of LT3640EFE#PBF?
All LT3640EFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3640EFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3640EFE#PBF part is unused and in its original packaging.
Return procedure for LT3640EFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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