My Inquiry
My Account
Analog Devices Inc. LT3640IFE#TRPBF
- Part No.:
- LT3640IFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LT3640IFE#TRPBF.pdf
- Description:
- IC REG BUCK ADJ DL 28TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,966
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT3640IFE#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel monolithic buck switching regulator IC with integrated power-on reset and window-mode watchdog timer. It features a high-voltage nonsynchronous channel (4V–35V input, 1.3A output) and a low-voltage synchronous channel (2.5V–5.5V input, 1.1A output), both synchronized to a single adjustable oscillator (350kHz–2.5MHz). It delivers stable 3.3V/0.8A and 1.8V/0.8A outputs in industrial power supplies and automotive ECUs.
For engineers reviewing the LT3640IFE#TRPBF datasheet, LT3640IFE#TRPBF pinout, LT3640IFE#TRPBF application, or LT3640IFE#TRPBF equivalent, key selection considerations include its dual-output voltage tracking capability, programmable soft-start via SS1/SS2 pins, adjustable POR/watchdog timing using CPOR/CWDT capacitors, and thermal performance in the 28-pin TSSOP package with exposed pad.
Technical Context
The LT3640IFE#TRPBF implements two independent current-mode PWM control loops sharing one oscillator-enabling precise frequency synchronization and eliminating beat frequencies. The high-voltage channel uses an internal 2.4A NPN switch with BST-boosted gate drive and DA-pin-based valley current sensing for robust short-circuit protection; the low-voltage channel employs fully synchronous NMOS/PMOS power switches with cycle-by-cycle peak and valley current limiting.
Its power-on reset logic triggers on FB1 > 1.165V and FB2 > 550mV, with timeout set by CPOR capacitor; the window-mode watchdog monitors WDI pulse edges against upper (tWDU) and lower (tWDL) boundaries defined by CWDT, asserting WDO if timing deviates-providing fail-safe µP supervision without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range (HV) | 4V to 35V - supports wide industrial and automotive battery inputs; OVLO at 36.5V protects up to 55V transient |
| Input Voltage Range (LV) | 2.5V to 5.5V - enables post-regulation from HV output or direct Li-ion/LDO supply |
| Switching Frequency | 350kHz to 2.5MHz - set by RT resistor or external SYNC signal; allows optimization of size vs. efficiency |
| FB1 Reference Voltage | 1.265V ±15mV - sets high-side output via resistor divider; enables 3.3V, 5V, or custom voltages |
| FB2 Reference Voltage | 600mV ±12mV - sets low-side output; supports 1.2V, 1.8V, or 2.5V core rails with tight regulation |
| Quiescent Current | 290µA typical - enables low-power standby operation; drops to <1µA in shutdown |
| Watchdog Window Timing | tWDL = 2ms, tWDU = 32ms (CWDT = 820pF) - provides configurable µP activity monitoring with fault detection margin |
Pinout & Package
The LT3640IFE#TRPBF is housed in a thermally enhanced 28-pin plastic TSSOP package (FE) with exposed pad (Pin 29) soldered to PCB ground for low θJA = 30°C/W. Pin numbering follows standard top-view FE package layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB1 (Pin 6) | High-voltage feedback input | Regulated to 1.265V; connects to resistor divider tap to set VOUT1 (e.g., 3.3V) |
| FB2 (Pin 1) | Low-voltage feedback input | Regulated to 600mV; sets VOUT2 (e.g., 1.8V); enables PGOOD assertion when >550mV |
| EN/UVLO (Pin 3) | Enable and undervoltage lockout input | 1.26V threshold enables accurate VIN brown-in/out control; 2µA hysteresis prevents noise-induced toggling |
| RT (Pin 7) | Oscillator frequency programming | Resistor to GND sets switching frequency (e.g., 32.4kΩ → 2MHz); supports SYNC override |
| CPOR (Pin 12) | Power-on reset timer capacitor | Capacitor to GND sets RST1/RST2 timeout (e.g., 220pF → 9.5ms); shared by both channels |
| CWDT (Pin 11) | Watchdog timer capacitor | Capacitor to GND defines watchdog window boundaries (tWDL/tWDU); enables windowed µP supervision |
| WDE (Pin 13) | Watchdog enable input | Active-high logic input; must be pulled high to activate watchdog function |
| WDI (Pin 14) | Watchdog input | Accepts µP pulse train; falling edges trigger watchdog timing; 0.85V threshold ensures noise immunity |
| RST1 (Pin 9) | HV channel reset output | Open-drain; asserts low until FB1 > 1.165V and CPOR timeout expires |
| RST2 (Pin 8) | LV channel reset output | Open-drain; asserts low until FB2 > 550mV and CPOR timeout expires |
| WDO (Pin 10) | Watchdog output | Open-drain; pulls low if WDI pulses violate tWDL/tWDU window; resets µP on timeout |
| PGOOD (Pin 2) | Power-good indicator | Open-drain; sinks current only when LV output is in regulation (FB2 > 550mV + 40mV hysteresis) |
| SS1 (Pin 5) | HV soft-start/tracking control | 0–1.265V input; controls FB1 reference ramp rate; enables output voltage tracking |
| SS2 (Pin 28) | LV soft-start/tracking control | 0–0.6V input; controls FB2 reference ramp; supports independent or coordinated startup |
| VIN (Pin 22) | HV input supply | Powers internal circuitry and HV switch; requires local ceramic bypass (≥10µF) |
| VIN2 (Pin 24) | LV input supply | Powers LV channel and internal bias; can be tied to VOUT1 for two-stage conversion |
| SW1 (Pin 19) | HV switch node | Connects to inductor and catch diode cathode; handles up to 2.4A peak current |
| SW2 (Pin 25) | LV switch node | Connects to inductor; integrates synchronous NMOS/PMOS switches (RDS(ON) = 200/275mΩ) |
| BST (Pin 21) | Bootstrap supply | Drives HV NPN base via external diode/capacitor; requires ≥2.3V above SW for full saturation |
| DA (Pin 18) | Catch diode current sense | Monitors diode conduction to extend off-time during valley current limit; enhances short-circuit robustness |
| GND (Pins 15,16,23,26,29) | Ground connections | Multiple low-inductance GND pins and exposed pad (Pin 29) must be soldered to PCB ground plane |
| NC (Pin 17) | No-connect | Internally unused; may be tied to GND for mechanical stability |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent buck regulators | Enables compact dual-rail power architecture (e.g., 3.3V I/O + 1.8V core) without discrete controllers |
| Programmable window-mode watchdog | Eliminates need for external watchdog IC; detects µP hang, clock drift, or software deadlock via pulse timing window |
| Adjustable power-on reset with shared timer | Single CPOR capacitor sequences reset assertion for both rails, ensuring coordinated system boot |
| Synchronous LV channel with integrated MOSFETs | Removes external Schottky diode; achieves >90% efficiency at 1.8V/0.8A (2MHz, VIN2 = 3.3V) |
| Soft-start and voltage tracking via SS1/SS2 | Prevents inrush current and ensures proper power sequencing between rails (e.g., VDDIO before VDDCORE) |
| Thermally enhanced TSSOP with exposed pad | Supports 1.3A HV and 1.1A LV loads continuously at TA ≤ 85°C without heatsink |
Applications
| Industrial Power Supplies | Automotive Electronic Control Units |
|---|---|
Use Scenario: DIN-rail mounted PLC power module requiring isolated 3.3V logic and 1.8V FPGA core rails with system-level fault monitoring. IC Role / Device Role / Timing Role: Dual-buck regulator providing tightly regulated outputs; watchdog supervises FPGA configuration state machine; POR ensures deterministic boot after cold start. Use Value: Single-chip solution reduces BOM count by 3+ discrete regulators and supervisor ICs; CPOR/CWDT capacitors simplify timing calibration versus fixed-threshold ICs. | Use Scenario: Engine control unit (ECU) with microcontroller, CAN transceiver, and sensor interface needing 5V analog, 3.3V digital, and 1.2V core supplies under 12V–24V battery input. IC Role / Device Role / Timing Role: HV channel regulates 5V/3.3V from battery; LV channel generates 1.2V core rail; window watchdog validates µC instruction execution timing. Use Value: Withstands load dump transients up to 55V for 1s; 2.5MHz max switching enables small 2.2µH inductors; -40°C to 125°C rating meets AEC-Q100 requirements. |
| Medical Diagnostic Equipment | Test & Measurement Instruments |
Use Scenario: Portable ultrasound device requiring low-noise 3.3V ADC reference and 1.8V FPGA supply, with guaranteed power sequencing and fault recovery. IC Role / Device Role / Timing Role: SS1/SS2 pins enforce strict voltage ramp order; RST1/RST2 ensure µC initializes only after all rails are stable; WDO triggers safe shutdown on processor freeze. Use Value: Burst Mode® maintains <290µA quiescent current during standby; 40mV PGOOD hysteresis rejects noise-induced false trips in EMI-heavy environments. | Use Scenario: Benchtop oscilloscope with FPGA-based acquisition engine and analog front-end requiring clean, sequenced 1.2V, 1.8V, and 3.3V rails. IC Role / Device Role / Timing Role: Dual-channel regulation eliminates cross-talk between analog and digital domains; SYNC pin allows alignment to system clock for deterministic jitter reduction. Use Value: Adjustable 350kHz–2.5MHz frequency avoids sensitive IF bands; low output ripple (<15mVP-P in Burst Mode) preserves signal integrity in high-resolution measurements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3641IFE#TRPBF | Same pinout and feature set; differs only in FB1 reference (1.215V vs. 1.265V) and slightly tighter FB2 tolerance (±0.5% vs. ±2%) | Preferred for designs requiring higher output voltage accuracy or compatibility with legacy LT3641 layouts | Select when tighter DC regulation is critical; verify FB divider recalculations for VOUT1 |
| TPS65270PWP | TI dual synchronous buck (2.95–18V input); no integrated watchdog/POR; different pinout; requires external timing components | Suitable for cost-sensitive industrial apps without safety-critical supervision; lacks window watchdog and shared reset timing | Choose when system already includes separate supervisor IC; avoid if µP supervision or coordinated reset is required |
Compared with LT3641IFE#TRPBF, the LT3640IFE#TRPBF offers broader FB1 tolerance but identical supervision functionality; versus TPS65270PWP, it integrates POR and window watchdog-reducing component count and enabling autonomous fault recovery without firmware intervention.
Availability
LT3640IFE#TRPBF is available at Aetrix Electronics and suitable for industrial power supplies, automotive electronic control units, and medical diagnostic equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LT3640IFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LT3640 series.
The LT3640IFE#TRPBF belongs to Linear's high-reliability monolithic power management IC family, designed specifically for space-constrained systems requiring dual regulated outputs plus integrated system supervision in harsh environments.
FAQ
What is the operating temperature range for the LT3640IFE#TRPBF?
The LT3640IFE#TRPBF is rated for –40°C to 125°C junction temperature. This industrial-grade specification ensures reliable operation in automotive engine compartments, industrial motor drives, and outdoor telecom equipment where ambient temperatures exceed 85°C. The FE package's exposed pad and low θJA = 30°C/W enable full 1.3A/1.1A output capability without derating at 85°C ambient.
How does the LT3640IFE#TRPBF implement window-mode watchdog functionality?
The LT3640IFE#TRPBF implements window-mode watchdog by measuring time intervals between consecutive falling edges on the WDI pin. If any interval falls outside the programmable window-defined by lower boundary tWDL and upper boundary tWDU set via CWDT capacitor-the WDO pin is pulled low. This detects both µP lockup (no pulses) and runaway execution (excessively frequent pulses), unlike basic timeout watchdogs.
Can the LT3640IFE#TRPBF generate 5V and 1.2V outputs simultaneously?
Yes, the LT3640IFE#TRPBF can generate 5V and 1.2V outputs simultaneously. The HV channel (FB1 = 1.265V) supports 5V via R1/R2 divider (e.g., R1 = 301kΩ, R2 = 100kΩ); the LV channel (FB2 = 600mV) supports 1.2V via R3/R4 divider (e.g., R3 = 120kΩ, R4 = 100kΩ). Both outputs operate independently with full current capability and supervision.
What is the purpose of the DA pin on the LT3640IFE#TRPBF?
The DA pin on the LT3640IFE#TRPBF senses catch diode anode current to implement valley current limiting. During light-load conditions or output short circuits, the DA comparator extends the oscillator off-time to prevent inductor current reversal and maintain control-enhancing robustness beyond standard peak-current limiting alone. It connects directly to the cathode of the external catch diode.
Does the LT3640IFE#TRPBF require external components for power-on reset timing?
Yes, the LT3640IFE#TRPBF requires an external capacitor on the CPOR pin to set power-on reset timing. A 220pF capacitor yields a typical 9.5ms timeout for both RST1 and RST2 outputs. This single capacitor eliminates the need for separate RC networks per rail, simplifying design while ensuring coordinated release of both reset signals after FB1 > 1.165V and FB2 > 550mV are achieved.
LT3640IFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 35V
- Voltage - Output (Min/Fixed):
- 0.6V, 1.265V
- Voltage - Output (Max):
- 33.97V
- Current - Output:
- 1.1A, 1.3A
- Frequency - Switching:
- 500kHz ~ 2MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
LT3640IFE#TRPBF FAQ
1.How can I place an order for LT3640IFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3640IFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3640IFE#TRPBF reliable?
The price and inventory of LT3640IFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3640IFE#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3640IFE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3640IFE#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3640IFE#TRPBF?
LT3640IFE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3640IFE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3640IFE#TRPBF?
For technical support, including LT3640IFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3640IFE#TRPBF requirements.
6.How does Aetrix verify that LT3640IFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3640IFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3640IFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3640IFE#TRPBF?
All LT3640IFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3640IFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3640IFE#TRPBF part is unused and in its original packaging.
Return procedure for LT3640IFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT3640IFE#TRPBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
