Analog Devices Inc. LT3692AEUH#PBF
- Part No.:
- LT3692AEUH#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LT3692AEUH#PBF.pdf
- Description:
- IC REG BUCK ADJ 3.5A DL 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:405
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Product details
Overview
LT3692AEUH#PBF from Analog Devices (formerly Linear Technology) is a monolithic dual-channel current-mode PWM step-down DC/DC converter with two internal 3.8A NPN power switches, operating from 3V to 36V input and delivering up to 3.5A per channel. It features independent shutdown, soft-start, UVLO, programmable current limit, and antiphase switching at 180° phase offset to reduce input ripple. Used in automotive power distribution and industrial multi-rail systems requiring tight tracking.
For engineers reviewing the LT3692AEUH#PBF datasheet, LT3692AEUH#PBF pinout, LT3692AEUH#PBF application, or LT3692AEUH#PBF equivalent, key selection criteria include its 32-lead 5mm × 5mm QFN package with exposed thermal pad, –40°C to 125°C junction temperature rating, dual independent frequency control (250kHz–2MHz), and integrated die temperature monitoring via TJ pin.
Technical Context
The LT3692AEUH#PBF implements two independent current-mode buck regulators sharing a master oscillator, with channel 1 frequency programmable via RT/SYNC resistor or external clock and further divisible by 1/2/4/8 via DIV pin. Each channel uses separate VC error amplifier outputs, ILIM-set peak current limits (2A–4.8A), and CMPI/CMPO-based power-good signaling referenced to 720mV threshold with 60mV hysteresis.
Antiphase operation is enforced across all frequencies-maintaining 180° phase shift between SW1 and SW2-even during synchronization or frequency division-reducing input capacitor RMS current and enabling smaller bulk capacitance. The device supports dropout enhancement via extended on-time (95% max duty cycle) and includes dedicated BST1/BST2 bootstrap drivers for high-side NPN saturation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 36V continuous; withstands 60V transients - enables direct connection to 24V industrial or 12V automotive rails without pre-regulation. |
| Output Current per Channel | Up to 3.5A - supports high-current FPGA core rails or dual-core processor supplies with single-chip integration. |
| Switching Frequency Range | 250kHz to 2.5MHz - allows optimization of inductor size and efficiency trade-offs; supports EMI-sensitive applications via spread-spectrum-capable external sync. |
| Feedback Reference Voltage | 806mV ±16mV over temperature - enables precise output regulation with standard resistor dividers; low offset (±13mV) ensures tight channel-to-channel tracking. |
| Junction Temperature Range | –40°C to +125°C - qualified for under-hood automotive and industrial environments; thermal shutdown and TJ pin provide real-time die temperature monitoring. |
| Quiescent Current (Both Channels Off) | <10µA - enables ultra-low-power standby modes in battery-backed systems without compromising wake-up latency. |
| Minimum On/Off Time | 140ns / 200ns - supports high-frequency operation at low duty cycles (e.g., 3.3V out from 36V in) without pulse-skipping instability. |
Pinout & Package
LT3692AEUH#PBF is housed in a thermally enhanced 32-lead (5mm × 5mm) plastic QFN package with exposed GND pad (Pin 33), requiring soldering to PCB for thermal and electrical integrity. θJA = 23°C/W, θJC(PAD) = 1.5°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BST1/BST2 | Bootstrap supply for channel 1/2 high-side NPN driver | Enables full saturation of internal NPN switch; requires external ceramic capacitor tied between BSTx and SWx to sustain gate drive above VIN. |
| SW1/SW2 | Emitter of internal NPN power switch | High dV/dt node requiring local Schottky catch diode to GND; connects directly to inductor and output filter. |
| FB1/FB2 | Negative input to error amplifier | Regulated to 806mV; sets output voltage via external resistor divider; bias current flows out (nA-level) enabling high-impedance feedback networks. |
| ILIM1/ILIM2 | Peak current limit programming input | Internal 12µA current source pulls to GND; resistor sets ILIM voltage (0–1.5V) → 4.8A–2A current limit range per channel. |
| RT/SYNC | Oscillator frequency set/synchronization input | Accepts resistor (250kHz–2.5MHz) or external clock (250kHz–2MHz); rising-edge synchronized; maintains slope compensation and phase relationship. |
| DIV | Channel 1 frequency divider select | Internal 12µA current source to GND resistor sets voltage thresholds for ÷1/÷2/÷4/÷8 division of master clock - reduces component count vs discrete dividers. |
| TJ | Die temperature monitor output | 250mV at 25°C, 10mV/°C slope - enables system-level thermal management without external sensor; calibrated over full temp range. |
| SHDN1/SHDN2 | Channel enable/disable control | SHDN1 controls both channels (threshold 1.32V); SHDN2 enables only channel 2; <0.6V reduces total IQ to <10µA. |
| CLKOUT | Synchronized clock output | 0V–2.5V square wave at master clock frequency; 50% duty cycle in resistor mode; mirrors external sync source duty cycle when synchronized. |
| GND (Pin 33) | Power and signal ground reference | Exposed thermal pad - must be soldered to large PCB copper area; all small-signal grounds tie here to avoid noise coupling into sensitive analog nodes. |
Key Features
| Feature | Design Value |
|---|---|
| Independent channel control | Separate SHDN, SS, FB, ILIM, CMPI/CMPO pins per channel enable asymmetric sequencing, tracking, and fault handling in multi-rail systems. |
| Antiphase switching | Guaranteed 180° phase offset between SW1 and SW2 reduces input capacitor RMS current by ~30%, allowing smaller, lower-cost bulk capacitors. |
| Programmable current limit | ILIM pin accepts 0–1.5V to set peak inductor current from 2A to 4.8A - eliminates need for external sense resistors while maintaining accuracy over temperature. |
| Dual-frequency flexibility | RT/SYNC sets master frequency; DIV pin selects channel 1 division ratio - enables optimal component sizing per rail (e.g., 550kHz for 3.3V, 2.2MHz for 1.2V). |
| Integrated die temperature sensing | TJ pin provides factory-calibrated analog voltage (250mV @ 25°C, 10mV/°C) - replaces external thermal ICs in space-constrained designs and enables predictive thermal throttling. |
| Dropout enhancement | Extended on-time capability (95% max duty cycle) sustains regulation down to VIN – VOUT ≈ 0.3V - critical for high-VIN/low-VOUT applications like 36V→3.3V conversion. |
Applications
| Automotive ADAS Power Supply | Industrial Dual-Rail FPGA Core |
|---|---|
Use Scenario: Powering camera module SoCs and radar processors in automotive ADAS ECUs where EMI compliance and thermal reliability are critical. IC Role / Device Role / Timing Role: Dual-channel buck regulator providing tightly tracked 1.2V and 3.3V rails with antiphase switching to minimize conducted EMI on shared 12V battery input. Use Value: Reduces input filter size by 40% vs in-phase operation and meets CISPR-25 Class 5 requirements without added shielding; TJ pin enables real-time thermal derating. | Use Scenario: Supplying configurable logic (1.2V) and I/O banks (3.3V) in industrial FPGA-based motion controllers operating in uncooled enclosures. IC Role / Device Role / Timing Role: Monolithic dual regulator with independent soft-start and power-good signaling ensures safe, sequenced power-up of FPGA configuration and peripherals. Use Value: Eliminates discrete sequencing ICs and saves >25 mm² PCB area; programmable current limit prevents damage during FPGA bitstream loading surges. |
| Telecom Distributed DC-DC | Medical Imaging Sensor Bias |
Use Scenario: Intermediate bus conversion in 48V telecom systems powering multiple point-of-load regulators across backplane cards. IC Role / Device Role / Timing Role: High-efficiency dual buck stage stepping 48V down to 5V and 3.3V for downstream POL converters, synchronized to system clock to avoid beat frequencies. Use Value: Synchronization via RT/SYNC pin eliminates EMI peaks at subharmonics; wide 3V–36V input accommodates brownout conditions without dropout. | Use Scenario: Low-noise, stable bias for CCD/CMOS image sensors in portable ultrasound devices where battery life and thermal management are paramount. IC Role / Device Role / Timing Role: Dual-output regulator delivering 3.3V analog and 1.8V digital rails with independent CMPO-based power-good signals for sensor initialization sequence. Use Value: Independent UVLO and shutdown per channel prevent partial power-up faults; <10µA quiescent current extends battery runtime in standby mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3855EUH#PBF | Two-phase synchronous buck controller (external MOSFETs); no integrated switches; supports up to 25A per phase; requires external gate drivers and current sensing. | Targeted at higher-current (>10A), higher-efficiency applications where thermal design flexibility and efficiency optimization outweigh integration benefits. | Select LTC3855EUH#PBF when output current exceeds 3.5A per rail or when discrete MOSFET selection is required for specialized thermal or layout constraints. |
| TPS544B20RMLR | Single-channel 4A synchronous buck converter with PMBus interface; no second channel or antiphase capability; integrated FETs; 4.5V–18V input range only. | Designed for digitally controlled, single-rail applications requiring telemetry and dynamic voltage scaling; lacks dual-rail coordination features. | Select TPS544B20RMLR when digital monitoring, adaptive voltage scaling, or single-rail simplicity is prioritized over dual-channel integration and wide-input capability. |
Compared with LTC3855EUH#PBF and TPS544B20RMLR, the LT3692AEUH#PBF uniquely delivers integrated dual 3.5A buck regulation with antiphase operation, 3V–36V input, and die temperature monitoring in a single 5mm × 5mm QFN - making it optimal for space-constrained, wide-input, dual-rail systems where board area and component count are critical.
Availability
LT3692AEUH#PBF is available at Aetrix Electronics and suitable for automotive ADAS modules, industrial FPGA power systems, and telecom distributed supply regulation requiring stable component supply, long-term lifecycle support, and AEC-Q200-aligned reliability.
Supply support for LT3692AEUH#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and continues to develop and support its high-performance power management portfolio, emphasizing precision, reliability, and integration for demanding analog-intensive applications.
The LT3692AEUH#PBF belongs to Linear's monolithic current-mode buck regulator product line, designed specifically for high-density, multi-rail power systems in automotive, industrial, and communications infrastructure where thermal performance, EMI control, and sequencing flexibility are essential.
FAQ
What is the maximum supported switching frequency for LT3692AEUH#PBF?
The LT3692AEUH#PBF supports a maximum switching frequency of 2.5MHz when configured with an external RT/SYNC resistor. This is confirmed in the Electrical Characteristics table (Page 4), where "Maximum Switching Frequency" is specified as 2.5MHz (typical) with RRT/SYNC = 100kΩ. Operation up to 3.0MHz is possible but not guaranteed across temperature and process variation.
Does LT3692AEUH#PBF support independent power sequencing between its two channels?
Yes, the LT3692AEUH#PBF supports fully independent sequencing via separate SHDN1/SHDN2, SS1/SS2, and FB1/FB2 pins. SHDN1 controls both channels' basic operation, but SHDN2 can independently disable channel 2. Soft-start timing is set per channel using individual SS pins and external capacitors, enabling staggered ramp-up or tracking configurations as shown in the Typical Application schematic (TA01a).
How is output voltage accuracy maintained across temperature for LT3692AEUH#PBF?
The LT3692AEUH#PBF maintains output voltage accuracy via an 806mV ±16mV (±2%) internal feedback reference over –40°C to +125°C, with channel-to-channel offset limited to ±13mV. This is verified in the Electrical Characteristics table (Page 3) under "Feedback Voltage Ch 1/2" and "Feedback Voltage Offset Ch 1 to Ch 2", ensuring stable regulation without external trimming.
Can LT3692AEUH#PBF operate with only one channel enabled?
Yes, LT3692AEUH#PBF can operate with only channel 1 active by holding SHDN2 below its threshold (≤1.24V) while keeping SHDN1 above 1.32V. Channel 2 remains disabled, drawing <2µA quiescent current (Page 3, "VIN2 Shutdown Current"), while channel 1 functions normally with full feature set including synchronization and current limiting.
What thermal management provisions does LT3692AEUH#PBF include?
The LT3692AEUH#PBF includes three thermal provisions: (1) an exposed GND pad (Pin 33) with θJC(PAD) = 1.5°C/W for direct PCB heat sinking; (2) integrated die temperature monitor (TJ pin) outputting 250mV @ 25°C with 10mV/°C slope; and (3) thermal shutdown protection that halts switching if junction temperature exceeds safe limits, as documented in the Absolute Maximum Ratings and Applications Information sections.
LT3692AEUH#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 34.2V
- Current - Output:
- 3.5A
- Frequency - Switching:
- 110kHz ~ 2.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LT3692AEUH#PBF FAQ
1.How can I place an order for LT3692AEUH#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3692AEUH#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3692AEUH#PBF reliable?
The price and inventory of LT3692AEUH#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3692AEUH#PBF is usually 5 days.
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4.How is shipping managed for LT3692AEUH#PBF?
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Once your LT3692AEUH#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3692AEUH#PBF?
For technical support, including LT3692AEUH#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3692AEUH#PBF requirements.
6.How does Aetrix verify that LT3692AEUH#PBF is sourced from the original manufacturer or authorized distributors?
All LT3692AEUH#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3692AEUH#PBF meets industry standards.
7.What is the process for return or replacement of LT3692AEUH#PBF?
All LT3692AEUH#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3692AEUH#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3692AEUH#PBF part is unused and in its original packaging.
Return procedure for LT3692AEUH#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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