Analog Devices Inc. LT3692AHUH#PBF
- Part No.:
- LT3692AHUH#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LT3692AHUH#PBF.pdf
- Description:
- IC REG BUCK ADJ 3.5A DL 32QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT3692AHUH#PBF from Analog Devices (formerly Linear Technology) is a monolithic dual-channel current-mode PWM step-down DC/DC converter with two internal 3.8A NPN power switches, operating from 3V to 36V input and delivering up to 3.5A per channel. It features independent shutdown, soft-start, UVLO, programmable current limit, and antiphase switching at 180° phase offset to reduce input/output ripple. Used in automotive power distribution and industrial multi-rail supplies requiring high-temperature reliability.
For engineers reviewing the LT3692AHUH#PBF datasheet, LT3692AHUH#PBF pinout, LT3692AHUH#PBF application, or LT3692AHUH#PBF equivalent, key selection considerations include its –40°C to 150°C guaranteed junction temperature range, 32-pin 5mm × 5mm QFN package with exposed thermal pad, dual independent frequency control (250kHz–2MHz), and integrated die temperature monitoring via TJ pin.
Technical Context
The LT3692AHUH#PBF implements two independent current-mode buck regulators sharing a master oscillator, where Channel 1's frequency is programmable via RT/SYNC resistor or external clock and optionally divided by 1/2/4/8 using the DIV pin, while Channel 2 runs at the master frequency with fixed 180° phase shift. Each channel has dedicated VC error amplifier outputs, ILIM current limit programming, and CMPI/CMPO comparator-based power-good signaling.
It employs boost-capacitor-assisted gate drive (BST1/BST2) enabling >95% duty cycle for low-dropout operation, and supports tracking via shared SS pins or independent sequencing via SHDN1/SHDN2. The device integrates FMEA-compliant design with OVLO (60V transient tolerance), thermal shutdown, and die temperature sensing (TJ = 250mV + 10mV/°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 36V continuous; withstands 60V nonrepetitive transients - enables direct battery-input operation in 12V/24V automotive and industrial systems. |
| Output Current per Channel | Up to 3.5A - supports high-current rails like CPU cores or FPGA I/O banks without external MOSFETs. |
| Switching Frequency Range | 250kHz to 2MHz (programmable via RT/SYNC resistor or external clock) - balances efficiency vs. size: lower frequencies improve light-load efficiency; higher frequencies shrink inductors/capacitors. |
| Junction Temperature Range | –40°C to +150°C (guaranteed) - qualified for under-hood automotive and high-ambient industrial environments. |
| Feedback Reference Voltage | 806mV ±16mV over full temperature range - enables precise output regulation with standard resistor dividers; <13mV channel-to-channel offset ensures tight tracking. |
| Quiescent Current (Shutdown) | <10µA total - critical for always-on subsystems such as telematics or sensor hubs requiring ultra-low standby power. |
| Phase Relationship | Fixed 180° antiphase switching between channels - reduces input capacitor RMS current and output voltage ripple by canceling harmonic components. |
Pinout & Package
LT3692AHUH#PBF is housed in a thermally enhanced 32-lead 5mm × 5mm plastic QFN package with exposed GND pad (Pin 33), optimized for high-power density and thermal dissipation (θJC = 1.5°C/W). The exposed pad must be soldered to PCB ground plane for reliable operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BST1 / BST2 | Bootstrap supply for channel 1/2 high-side NPN driver | Enables >95% duty cycle by charging external bootstrap capacitors; requires ceramic cap (10nF–100nF) between BSTx and SWx. |
| SW1 / SW2 | Emitter of internal NPN power switch | High dI/dt node requiring local Schottky catch diode to GND and tight layout with VIN decoupling. |
| VIN1 / VIN2 | Main input supply for control circuitry (VIN1) and channel 2 power stage (VIN2) | VIN1 powers internal regulator, oscillator, and references; VIN2 must be ≥2.8V and ≤VIN1 for channel 2 operation. |
| SHDN1 / SHDN2 | Channel enable/disable control inputs | SHDN1 controls both channels; SHDN2 enables only channel 2 - allows independent sequencing and fault isolation. |
| FB1 / FB2 | Negative input of error amplifier | Regulated to 806mV; bias current flows out - sets output voltage via resistive divider from VOUTx to GND. |
| ILIM1 / ILIM2 | Peak inductor current limit programming | 12µA internal current source into external resistor to GND - sets current limit from 2A (0V) to 4.8A (1.5V). |
| RT/SYNC | Oscillator frequency setting or external sync input | 12µA current source to resistor sets frequency; accepts external clock (250kHz–2MHz) on rising edge for system-wide timing alignment. |
| DIV | Channel 1 frequency division ratio control | 12µA current source to resistor selects 1×/2×/4×/8× division of master clock - optimizes component size for asymmetric load requirements. |
| TJ | Die temperature monitor output | 250mV at 25°C, 10mV/°C slope - provides real-time thermal feedback for derating or thermal management algorithms. |
| CLKOUT | Synchronized clock output | 0V–2.5V square wave at master frequency - used to synchronize additional regulators or external logic without jitter accumulation. |
Key Features
| Feature | Design Value |
|---|---|
| Independent channel control | Separate SHDN, SS, FB, ILIM, CMPI/CMPO pins per channel enable flexible power sequencing, tracking, and fault reporting in multi-rail systems. |
| Antiphase switching | Fixed 180° phase relationship between channels reduces input capacitor RMS current by up to 30% and minimizes output voltage ripple without extra filtering. |
| Programmable current limit | Per-channel peak current limit set via ILIM pin (2A–4.8A range) allows tailored overcurrent protection for diverse loads without redesigning magnetics. |
| Integrated die temperature monitor | TJ pin delivers calibrated analog voltage (250mV + 10mV/°C) - eliminates need for external thermal sensors in space-constrained designs. |
| Wide-frequency synchronization | RT/SYNC accepts external clocks from 250kHz to 2MHz with automatic slope compensation adjustment - ensures stable current-mode operation across all sync frequencies. |
| Low dropout enhancement | Boost capacitor recharging logic permits >95% duty cycle - maintains regulation down to VOUT ≈ VIN – 0.3V, critical for post-regulation in low-VIN applications. |
Applications
| Automotive ADAS Power Supply | Industrial PLC I/O Module |
|---|---|
Use Scenario: Dual-rail power for camera sensor (3.3V) and image processor core (1.2V) in forward-facing radar or surround-view systems. IC Role / Device Role / Timing Role: Primary dual-output buck controller managing independent startup sequencing, thermal monitoring, and power-good signaling for safety-critical subsystems. Use Value: Guaranteed 150°C operation enables placement near heat-generating processors; antiphase switching reduces EMI in sensitive RF zones. |
Use Scenario: Distributed 5V and 3.3V supplies for isolated digital I/O channels in modular programmable logic controllers. IC Role / Device Role / Timing Role: Centralized dual-buck regulator providing tightly regulated, independently sequenced rails to multiple I/O submodules. Use Value: Independent SHDN/SS pins allow staggered power-up to avoid inrush current overload on shared 24V backplane. |
| Medical Imaging Sensor Array | Test & Measurement Equipment |
Use Scenario: Low-noise dual supply for CCD/CMOS sensor bias (3.3V) and analog front-end (1.8V) in portable ultrasound or X-ray detectors. IC Role / Device Role / Timing Role: High-PSRR, low-ripple dual regulator with precision tracking and thermal margin for clinical-grade signal integrity. Use Value: 806mV reference with <13mV inter-channel offset ensures matched rail tracking; TJ monitoring prevents thermal drift in long-duration scans. |
Use Scenario: Multi-voltage rail generation (±15V analog, 3.3V digital, 1.2V FPGA core) in benchtop oscilloscopes and signal analyzers. IC Role / Device Role / Timing Role: Primary high-current DC/DC stage feeding downstream LDOs and isolated DC/DC converters. Use Value: CLKOUT pin synchronizes auxiliary regulators to eliminate beat frequencies; 2MHz max frequency enables compact 1µH inductors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3692AEUH#PBF | Same silicon, rated for –40°C to +125°C junction temperature; lower thermal rating than LT3692AHUH#PBF. | Suitable for commercial/industrial ambient environments but not under-hood automotive or high-temperature enclosures. | Select when thermal margin <25°C is acceptable and cost optimization is prioritized over extended temperature qualification. |
| LT3692AIFE#PBF | 38-pin TSSOP package with exposed pad; identical electrical specs but larger footprint and higher θJA (17.5°C/W vs. 23°C/W for QFN). | Better suited for prototyping or low-volume assembly where QFN reflow capability is limited. | Choose for manual soldering or legacy PCB processes; avoid in space-constrained or thermally demanding layouts. |
Compared with LT3692AEUH#PBF and LT3692AIFE#PBF, the LT3692AHUH#PBF uniquely combines the highest guaranteed junction temperature (150°C), smallest footprint (5mm × 5mm QFN), and lowest thermal resistance (θJC = 1.5°C/W), making it optimal for thermally aggressive, high-reliability embedded power systems.
Availability
LT3692AHUH#PBF is available at Aetrix Electronics and suitable for automotive ADAS modules, industrial PLCs, and medical imaging equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LT3692AHUH#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving aerospace, automotive, industrial, and communications markets.
The LT3692A product line was designed specifically for high-reliability dual-rail power conversion in thermally demanding environments, emphasizing independent control, thermal resilience, and EMI-aware antiphase operation - directly addressing needs in automotive and industrial embedded systems.
FAQ
What is the maximum guaranteed junction temperature for LT3692AHUH#PBF?
The LT3692AHUH#PBF is fully specified and guaranteed over a junction temperature range of –40°C to +150°C, validated per manufacturer test conditions. This rating exceeds the –40°C to +125°C range of LT3692AEUH#PBF and LT3692AIUH#PBF variants, making LT3692AHUH#PBF suitable for under-hood automotive and high-ambient industrial applications where thermal headroom is critical. Derating guidelines apply above 125°C.
How does the DIV pin affect channel 1 switching frequency in LT3692AHUH#PBF?
In LT3692AHUH#PBF, the DIV pin sets the frequency division ratio for Channel 1 relative to the master clock established by RT/SYNC. An internal 12µA current source pulls the DIV pin; connecting a resistor from DIV to GND generates voltages that select division ratios of 1×, 2×, 4×, or 8×. For example, a 100kΩ resistor yields ~1.0V and selects ÷2 mode, halving Channel 1's frequency versus Channel 2 - enabling optimized inductor sizing for asymmetric load requirements.
Can LT3692AHUH#PBF operate with only one channel enabled?
Yes, LT3692AHUH#PBF supports independent channel operation: driving SHDN2 low disables only Channel 2, while SHDN1 must remain above 1.32V to maintain Channel 1 operation and internal bias generation. However, SHDN1 controls both channels' core logic - pulling SHDN1 below threshold disables both regulators and reduces total quiescent current to <10µA. This flexibility enables partial-system power-down in multi-rail architectures.
What is the purpose of the TJ pin on LT3692AHUH#PBF, and how is it used?
The TJ pin on LT3692AHUH#PBF outputs an analog voltage proportional to die junction temperature: 250mV at 25°C with a slope of 10mV/°C. It is not a digital thermal shutdown signal but a calibrated analog telemetry source. Designers connect TJ to an ADC input to implement real-time thermal monitoring, dynamic frequency scaling, or predictive derating - especially valuable in sealed enclosures or high-power-density applications where ambient sensors underestimate actual silicon temperature.
Does LT3692AHUH#PBF support synchronization to an external clock, and what are the requirements?
Yes, LT3692AHUH#PBF supports external clock synchronization via the RT/SYNC pin, accepting signals from 250kHz to 2MHz. Synchronization occurs on the rising edge of the external clock, and the internal AGC loop automatically adjusts slope compensation to prevent subharmonic oscillation. Clock source impedance should be low enough that the current sourced by the internal 12µA RT/SYNC reference generates a frequency close to the sync frequency - typically ≤1kΩ series resistance ensures robust locking.
LT3692AHUH#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 34.2V
- Current - Output:
- 3.5A
- Frequency - Switching:
- 110kHz ~ 2.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LT3692AHUH#PBF FAQ
1.How can I place an order for LT3692AHUH#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3692AHUH#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3692AHUH#PBF reliable?
The price and inventory of LT3692AHUH#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3692AHUH#PBF is usually 5 days.
3.What payment methods are accepted for LT3692AHUH#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3692AHUH#PBF transactions.
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4.How is shipping managed for LT3692AHUH#PBF?
LT3692AHUH#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3692AHUH#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3692AHUH#PBF?
For technical support, including LT3692AHUH#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3692AHUH#PBF requirements.
6.How does Aetrix verify that LT3692AHUH#PBF is sourced from the original manufacturer or authorized distributors?
All LT3692AHUH#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3692AHUH#PBF meets industry standards.
7.What is the process for return or replacement of LT3692AHUH#PBF?
All LT3692AHUH#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3692AHUH#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3692AHUH#PBF part is unused and in its original packaging.
Return procedure for LT3692AHUH#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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