Analog Devices Inc. LT3692AIUH#TRPBF
- Part No.:
- LT3692AIUH#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LT3692AIUH#TRPBF.pdf
- Description:
- IC REG BUCK ADJ 3.5A DL 32QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT3692AIUH#TRPBF from Analog Devices (formerly Linear Technology) is a monolithic dual-channel current-mode PWM step-down DC/DC converter with two internal 3.8A NPN power switches, operating from 3V to 36V input and delivering up to 3.5A per channel. It features independent shutdown, soft-start, UVLO, programmable current limit, and antiphase switching at 180° phase offset to reduce input ripple. Used in automotive power distribution and industrial multi-rail supplies.
For engineers reviewing the LT3692AIUH#TRPBF datasheet, LT3692AIUH#TRPBF pinout, LT3692AIUH#TRPBF application, or LT3692AIUH#TRPBF equivalent, key selection considerations include its –40°C to 125°C guaranteed junction temperature range, 32-lead 5mm × 5mm QFN package with exposed thermal pad, dual independent tracking capability, and synchronized/antiphase operation for low-EMI multi-output designs.
Technical Context
The LT3692AIUH#TRPBF implements two independent current-mode buck regulators sharing a master oscillator, with channel 1 frequency programmable via RT/SYNC resistor (250kHz–2.5MHz) and optionally divided by 1/2/4/8 using the DIV pin, while channel 2 runs at master frequency with fixed 180° phase shift. Each channel has dedicated SHDN, SS, FB, ILIM, CMPI/CMPO, and VC pins enabling precise sequencing, tracking, and power-good signaling.
Its architecture supports dropout enhancement via extended on-time (95% max duty cycle), BST capacitor recharge management, and die temperature monitoring via the TJ pin (250mV at 25°C, 10mV/°C slope). The device maintains FMEA-compliant operation with OVLO (60V transient tolerance), independent UVLO (2.8V typ), and <10µA total quiescent current in full shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 36V continuous; withstands 60V nonrepetitive transients - enables direct connection to 24V/36V industrial or automotive battery rails without pre-regulation. |
| Output Current per Channel | Up to 3.5A - supports high-current digital loads like FPGAs, DSPs, and ASICs requiring tightly regulated dual-rail supplies. |
| Switching Frequency Range | 250kHz to 2.5MHz (programmable via RT/SYNC resistor or external clock) - allows optimization of inductor size, efficiency, and EMI across wide load and input conditions. |
| Phase Relationship | Fixed 180° antiphase between channels - reduces input capacitor RMS current and eases input filtering requirements. |
| Junction Temperature Range | –40°C to +125°C (guaranteed) - qualified for under-hood automotive and industrial environments with no derating required. |
| Feedback Reference Voltage | 806mV ±16mV over temperature - enables accurate output regulation with standard resistor dividers; channel-to-channel offset ≤±13mV ensures tight tracking. |
| Quiescent Current (Full Shutdown) | <10µA total - preserves battery life in always-on systems such as telematics or sensor nodes during deep sleep. |
Pinout & Package
LT3692AIUH#TRPBF is housed in a thermally enhanced 32-lead (5mm × 5mm) plastic QFN package with exposed GND pad (Pin 33), requiring soldering to PCB for thermal and electrical integrity. θJA = 23°C/W, θJC(PAD) = 1.5°C/W.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| BST1/BST2 | Bootstrap supply for internal NPN switch base drive | Enables high-side NPN saturation; requires external ceramic capacitor (typically 0.1µF) from BSTx to SWx to sustain >95% duty cycle operation. |
| SW1/SW2 | Emitter of internal power NPN switch | High dV/dt node; must be routed with short trace to external Schottky catch diode and local VIN decoupling capacitor to prevent negative voltage excursions. |
| FB1/FB2 | Negative input to error amplifier | Regulated to 806mV; bias current flows out - sets output voltage via resistive divider; low offset enables precise tracking between channels. |
| SHDN1/SHDN2 | Channel enable control inputs | SHDN1 controls both channels and must be ≥1.32V for operation; SHDN2 enables only channel 2 - supports independent sequencing and fault isolation. |
| RT/SYNC | Oscillator frequency programming / synchronization input | Accepts resistor (250kHz–2.5MHz) or external clock (250kHz–2MHz); rising-edge sync preserves slope compensation and phase relationship. |
| DIV | Channel 1 frequency division ratio select | Internal 12µA current source pulls to ground via resistor; sets CH1:CH2 ratio to 1, 2, 4, or 8 - optimizes component count when channels operate at different frequencies. |
| TJ | Die temperature monitor output | 250mV at 25°C, 10mV/°C slope - provides real-time junction temp feedback for thermal management without external sensor. |
| GND (Pin 33) | Common signal and power ground | Exposed thermal pad - must be soldered to large PCB copper area; all small-signal grounds should star-point to this pin to avoid noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| Independent per-channel control | Separate SHDN, SS, FB, ILIM, CMPI/CMPO, and VC pins allow fully autonomous sequencing, soft-start timing, current limiting, and power-good assertion per rail. |
| Antiphase 180° switching | Reduces input capacitor RMS current by ~30% vs in-phase operation - lowers required capacitance and extends capacitor lifetime in high-reliability systems. |
| Programmable peak current limit | ILIM pin voltage (0–1.5V) sets channel current limit from 2A to 4.8A - enables precise overcurrent protection matching specific inductor and layout constraints. |
| Flexible output voltage tracking | SS1/SS2 pins can be tied together or driven with ramp generators to force coordinated startup/shutdown - critical for FPGA core/I/O rail sequencing. |
| Integrated die temperature sensing | TJ pin delivers calibrated analog voltage (250mV @ 25°C, ±100mV error over –40°C to 125°C) - eliminates need for external thermal IC in space-constrained designs. |
| Low dropout operation | 95% maximum duty cycle enabled by boost capacitor recharge logic - supports high-VOUT/low-VIN ratios (e.g., 5V out from 5.5V input) without external LDO. |
Applications
| Automotive Infotainment Power Supply | Industrial PLC Dual-Rail Core Logic |
|---|---|
Use Scenario: Powering SoC, DDR memory, and display interface in head-unit systems with 12V/24V battery input and strict EMC limits. IC Role / Device Role / Timing Role: Dual-channel buck regulator providing [email protected] (core) and [email protected] (I/O) with antiphase switching and programmable sequencing. Use Value: 180° phase shift cuts input ripple amplitude by 50%, reducing EMI filter size; TJ monitoring prevents thermal runaway during sustained CPU load. |
Use Scenario: Generating isolated 3.3V and 5V rails for microcontroller, communication interfaces (RS-485, CAN), and analog front-end in factory automation controllers. IC Role / Device Role / Timing Role: Independent dual regulator with programmable UVLO (2.8V) and OVLO (39V) protecting against brownout and load-dump transients. Use Value: Guaranteed –40°C to 125°C operation eliminates derating; separate SHDN pins allow safe power-down of I/O before core during firmware updates. |
| FPGA Board Multi-Stage Regulation | Medical Imaging Sensor Bias Supply |
Use Scenario: Providing tightly tracked 1.0V core and 2.5V auxiliary rails for Xilinx Artix-7 FPGA with dynamic load steps exceeding 3A/µs. IC Role / Device Role / Timing Role: Current-mode controller with fast transient response; SS pins tied for simultaneous ramp-up; CMPO pins combined for single PG signal. Use Value: Cycle-by-cycle current limiting prevents inductor saturation during FPGA configuration surges; 140ns min on-time supports high-frequency, low-VOUT regulation. |
Use Scenario: Generating ultra-stable ±5V and +15V bias voltages for CCD/CMOS image sensors in portable ultrasound devices with battery-powered operation. IC Role / Device Role / Timing Role: Dual buck regulator feeding post-regulator LDOs; TJ pin used for closed-loop thermal throttling during prolonged imaging sessions. Use Value: 806mV reference with ≤13mV inter-channel offset ensures matched rail tracking; <10µA shutdown current extends battery runtime between scans. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3692AEUH#TRPBF | Same silicon, rated for 0°C to 125°C junction temperature (not –40°C guaranteed); identical pinout, specs, and package. | Suitable for commercial/industrial ambient environments where cold-start below –40°C is not required. | Select LT3692AIUH#TRPBF for automotive or extended-temperature deployments; EUH variant offers cost advantage in benign thermal environments. |
| LT3692AHUH#TRPBF | Same silicon, rated for –40°C to 150°C junction temperature; higher thermal rating with same 32-lead QFN package. | Required for under-hood automotive applications or high-power density designs with elevated ambient temperatures. | Choose AHUH when junction temperature may exceed 125°C; IUH provides optimal balance of extended temp range and cost for most automotive modules. |
Compared with LT3692AEUH#TRPBF and LT3692AHUH#TRPBF, the LT3692AIUH#TRPBF delivers guaranteed –40°C to 125°C operation without the premium thermal rating (or cost) of the AHUH grade, making it the preferred choice for automotive body electronics, ADAS domain controllers, and industrial edge gateways needing robust low-temperature startup and mid-range thermal margin.
Availability
LT3692AIUH#TRPBF is available at Aetrix Electronics and suitable for automotive infotainment systems, industrial PLCs, and FPGA-based embedded computing platforms requiring stable component supply, long-term lifecycle support, and guaranteed extended-temperature performance.
Supply support for LT3692AIUH#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LT® portfolio of high-performance power management ICs.
The LT3692AIUH#TRPBF belongs to Linear's monolithic dual buck regulator family designed specifically for demanding automotive and industrial applications requiring independent rail control, high reliability, and integrated diagnostics including die temperature monitoring and power-good signaling.
FAQ
What is the guaranteed operating temperature range for LT3692AIUH#TRPBF?
The LT3692AIUH#TRPBF is guaranteed to operate over a junction temperature range of –40°C to +125°C. This specification is fully tested and assured across production lots, distinguishing it from the EUH grade (0°C to 125°C) and AHUH grade (–40°C to 150°C). The LT3692AIUH#TRPBF meets AEC-Q100 stress test requirements for automotive use cases where cold cranking and under-hood thermal cycling are critical.
Can LT3692AIUH#TRPBF synchronize both channels to an external clock?
Yes, the LT3692AIUH#TRPBF supports external synchronization via the RT/SYNC pin, which accepts a clock signal from 250kHz to 2MHz. When synchronized, channel 1 aligns to the rising edge of the external clock, and channel 2 maintains a fixed 180° phase offset. The internal slope compensation automatically adjusts to prevent subharmonic oscillation, preserving stability across the full sync frequency range - a capability confirmed in the LT3692A datasheet Figure 1 and Applications Information section.
How does the DIV pin affect channel 1 frequency in LT3692AIUH#TRPBF?
The DIV pin on the LT3692AIUH#TRPBF sets the frequency division ratio for channel 1 relative to the master oscillator. An internal 12µA current source pulls the DIV pin to ground through an external resistor, generating voltages that select division ratios of 1, 2, 4, or 8. For example, a 100kΩ resistor yields ~1.0V and selects ÷2 mode, allowing channel 1 to run at half the RT/SYNC frequency while channel 2 runs at full frequency - enabling optimized component sizing for asymmetric load requirements.
What is the purpose of the TJ pin on LT3692AIUH#TRPBF?
The TJ pin on the LT3692AIUH#TRPBF outputs an analog voltage proportional to die junction temperature: 250mV at 25°C with a slope of 10mV/°C. It is specified with ±100mV error over –40°C to 125°C and requires no external calibration. This pin enables real-time thermal monitoring in safety-critical systems - for example, triggering firmware throttling when the LT3692AIUH#TRPBF approaches 115°C - eliminating the need for discrete thermal sensors in space-constrained designs.
Does LT3692AIUH#TRPBF support independent power-good signaling per channel?
Yes, the LT3692AIUH#TRPBF provides independent power-good signaling via CMPO1 and CMPO2 open-collector outputs. Each is driven low when its corresponding CMPI pin falls below 720mV (i.e., when output drops below ~90% of regulation). These pins can be left floating, pulled up individually, or wire-OR'd to generate a single system-level power-good signal - a feature explicitly documented in the Pin Functions section and verified in Typical Application circuits TA01a and TA01c.
LT3692AIUH#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 34.2V
- Current - Output:
- 3.5A
- Frequency - Switching:
- 110kHz ~ 2.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LT3692AIUH#TRPBF FAQ
1.How can I place an order for LT3692AIUH#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3692AIUH#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3692AIUH#TRPBF reliable?
The price and inventory of LT3692AIUH#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3692AIUH#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3692AIUH#TRPBF?
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4.How is shipping managed for LT3692AIUH#TRPBF?
LT3692AIUH#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3692AIUH#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3692AIUH#TRPBF?
For technical support, including LT3692AIUH#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3692AIUH#TRPBF requirements.
6.How does Aetrix verify that LT3692AIUH#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3692AIUH#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3692AIUH#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3692AIUH#TRPBF?
All LT3692AIUH#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3692AIUH#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3692AIUH#TRPBF part is unused and in its original packaging.
Return procedure for LT3692AIUH#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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