My Inquiry
My Account
Analog Devices Inc. LT3694IUFD-1#TRPBF
- Part No.:
- LT3694IUFD-1#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LT3694IUFD-1#TRPBF.pdf
- Description:
- IC REG TRIPLE BUCK/LINEAR 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,725
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT3694IUFD-1#TRPBF from Analog Devices (formerly Linear Technology) is a monolithic 36V, 2.6A step-down DC/DC converter with dual LDO regulator controllers in a thermally enhanced 28-lead 4mm × 5mm QFN package. It delivers three regulated outputs (buck + two LDOs), supports 250kHz–2.5MHz switching frequency via RT resistor, features CLKOUT for clock synchronization, and operates across 4V–36V input - ideal for industrial power rails and distributed systems requiring tight sequencing.
For engineers reviewing the LT3694IUFD-1#TRPBF datasheet, LT3694IUFD-1#TRPBF pinout, LT3694IUFD-1#TRPBF application, or LT3694IUFD-1#TRPBF equivalent, this page provides verified functional identity, confirmed pin roles (including CLKOUT, TRK/SSx, DRVx, LIMx), exact thermal and electrical specs per grade, real-world sequencing behavior, and validated alternatives for multi-rail power design.
Technical Context
The LT3694IUFD-1#TRPBF integrates a constant-frequency current-mode buck regulator with internal 2.6A bipolar switch and two independent LDO controllers driving external NPN pass transistors. Its VC1 error amplifier output controls peak switch current with 0.75V reference and 2V clamp, while slope compensation ensures stability across duty cycles.
It implements dual protection architecture: overvoltage shutdown at 38V (survives 70V transients), plus DA-pin-based catch-diode current sensing for overload foldback. The CLKOUT pin (exclusive to -1 variants) provides a buffered 1.6–2.6V logic-level clock output synchronized to internal oscillator, enabling precise timing coordination across multiple converters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4V to 36V continuous; survives 70V non-repetitive transients - supports 4-cell Li-ion, lead-acid, and unregulated wall adapters. |
| Switching Regulator Output | Up to 2.6A at adjustable VOUT ≥ 0.75V - enables compact high-current rails without external MOSFETs. |
| Switching Frequency Range | 250kHz to 2.5MHz set by RT resistor - allows optimization of size (high-freq) vs. efficiency (low-freq). |
| LDO Controller Outputs | Dual independent controllers with programmable current limit (via LIM2/LIM3) and tracking/soft-start (TRK/SS1–3) - supports sequenced multi-voltage domains. |
| CLKOUT Function | Dedicated clock output (1.6–2.6V VOH, 0.3V VOL) synchronized to internal oscillator - eliminates need for external clock generator in multi-converter systems. |
| Package & Thermal | 28-lead 4mm × 5mm QFN with exposed pad (θJA = 34°C/W) - requires PCB ground soldering for thermal integrity and EMI control. |
| Operating Junction Temp | –40°C to 125°C (I-grade) - qualified for industrial and automotive under-hood environments. |
Pinout & Package
LT3694IUFD-1#TRPBF uses a 28-lead 4mm × 5mm plastic QFN package with exposed thermal pad (Pin 29 = GND). The package requires soldering of the exposed pad to a PCB ground plane for thermal management and electrical stability.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VIN (1,27,28) | Main input power supply | Supplies internal switch, bias circuits, and startup logic; must be locally bypassed with ceramic capacitor. |
| EN/UVLO (2) | Enable / undervoltage lockout input | Shuts down device below 0.35V; enables at >1.2V; supports resistor-divider UVLO configuration. |
| CLKOUT (3) | Digital clock output | Provides synchronized 0.25–2.5MHz logic-level clock for synchronizing other DC/DC converters (-1 variant only). |
| PGOOD (4) | Open-drain power-good indicator | Pulls low if any FB pin voltage drops below 90% of nominal - signals fault across all three regulators. |
| RT (5) | Frequency-setting resistor terminal | Connects to ground to set oscillator frequency; 0.75V applied internally for precise fSW calculation. |
| TRK/SS1–3 (6,7,14) | Tracking/soft-start inputs | Override 0.75V reference when <0.75V - enables ratiometric start-up or soft-start via capacitor-to-ground. |
| FB1–3 (15,8,13) | Feedback inputs for buck and LDOs | Each regulates to lesser of 0.75V or corresponding TRK/SS voltage - supports independent output programming. |
| DRV2/DRV3 (9,12) | LDO base drive outputs | Provide up to 6V base drive for external NPN pass transistors - enable high-current linear regulation. |
| LIM2/LIM3 (10,11) | LDO current limit sense inputs | Monitor voltage across external sense resistors on BIAS pin - implement foldback current limiting for LDOs. |
| VC1 (16) | Error amplifier output | Controls peak switch current; clamped at 2V; used for loop compensation and shutdown (pull to GND). |
| BIAS (17) | Bias supply input | Provides current to internal regulators and boost circuit; typically connected to VOUT1 to reduce dissipation. |
| BST (18) | Bootstrap supply terminal | Drives internal NPN switch; requires external capacitor between BST and SW for >VIN gate drive. |
| DA (19) | Diode current sense input | Detects catch diode conduction to prevent excessive inductor current during overload/short-circuit. |
| SW (20,23,24) | Switch node output | Connects to inductor and Schottky catch diode - carries high di/dt switching current; requires careful layout. |
| GND (10,11,12,13,25,26) | Power and signal ground | Multiple ground pins minimize impedance; exposed pad (Pin 29) must be soldered to PCB ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Triple-output power architecture | Single IC delivers one high-current buck (2.6A) + two independently controlled LDOs - reduces BOM count and board space in multi-rail systems. |
| Programmable switching frequency | 250kHz–2.5MHz via single RT resistor - enables use of small ceramic capacitors and low-profile inductors for ultra-compact designs. |
| Integrated clock output (CLKOUT) | Eliminates need for external clock generator when synchronizing multiple converters - improves system EMI profile and timing predictability. |
| Robust input transient protection | Overvoltage shutdown at 38V with 70V survival rating - protects downstream circuitry in automotive and industrial environments with noisy supplies. |
| Independent tracking/soft-start | Three TRK/SS pins allow precise power-up sequencing of multiple rails - essential for FPGAs, DSPs, and microcontrollers with strict supply-order requirements. |
| Thermally enhanced QFN package | 28-lead 4mm × 5mm QFN with exposed pad achieves θJA = 34°C/W - enables reliable operation at full load in confined spaces without heatsinks. |
Applications
| Industrial PLC Power Supply | Automotive Infotainment Core Rail |
|---|---|
Use Scenario: Powering FPGA, microcontroller, and analog subsystems in programmable logic controllers with strict sequencing and wide input range. IC Role / Device Role / Timing Role: Primary triple-output PMIC providing 3.3V/2.5V/1.8V rails with CLKOUT-synchronized auxiliary converters. Use Value: Single-chip solution eliminates discrete LDOs and sequencing ICs; 4V–36V input handles brownouts and battery fluctuations; TRK/SS pins enforce safe power-up order. |
Use Scenario: Generating core processor, memory, and interface voltages in head-unit systems exposed to automotive load-dump transients. IC Role / Device Role / Timing Role: Main buck-LDO power controller with overvoltage shutdown and CLKOUT-driven peripheral regulation. Use Value: Survives 70V transients without external protection; I-grade temp range ensures reliability at 125°C junction; synchronized clocks reduce EMI peaks. |
| DSL/Cable Modem Power Management | Distributed Telecom Power Node |
Use Scenario: Delivering tightly regulated, low-noise supplies to ADSL PHY, Ethernet PHY, and MCU in broadband access equipment. IC Role / Device Role / Timing Role: Central regulator with low-ripple ceramic-capacitor design and PGOOD monitoring for system health reporting. Use Value: Constant-frequency operation + ceramic caps yield predictable ripple <15mVpp; PGOOD asserts only when all three rails are in regulation. |
Use Scenario: Local regulation at remote nodes in fiber-to-the-home (FTTH) or small-cell base stations with limited board area. IC Role / Device Role / Timing Role: Compact triple-output regulator enabling modular power architecture with synchronized downstream converters. Use Value: CLKOUT eliminates separate clock distribution; 28-pin QFN fits dense layouts; BIAS pin reduces power loss by sourcing bias from VOUT1. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck+LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3631EFE#PBF | Single 3A buck only; no integrated LDO controllers or CLKOUT; TSSOP-20 package. | Suitable for high-current single-rail designs but requires external LDOs and clock sync circuitry. | Select when only buck output is needed and board space permits discrete LDOs. |
| LT8614EUDC#PBF | 42V, 4A synchronous buck with integrated MOSFETs; no LDO controllers; no CLKOUT; different pinout and control scheme. | Higher efficiency and integration for buck-only applications; lacks multi-rail sequencing capability. | Select for higher-efficiency single-output designs where LDOs are implemented separately. |
Compared with LTC3631EFE#PBF and LT8614EUDC#PBF, the LT3694IUFD-1#TRPBF uniquely combines buck regulation, dual LDO control, and CLKOUT in one I-grade QFN - making it the only option for compact, sequenced, synchronized triple-rail power without adding discrete components or compromising thermal performance.
Availability
LT3694IUFD-1#TRPBF is available at Aetrix Electronics and suitable for industrial PLCs, automotive infotainment systems, and DSL/cable modems requiring stable component supply, long-term lifecycle support, and guaranteed I-grade temperature performance.
Supply support for LT3694IUFD-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors.
The LT3694 product line was designed specifically for industrial and automotive applications demanding robust multi-rail power with sequencing, transient immunity, and clock synchronization - addressing gaps in legacy buck-only or discrete LDO solutions.
FAQ
What is the key functional difference between LT3694IUFD-1#TRPBF and the standard LT3694?
The LT3694IUFD-1#TRPBF includes a dedicated CLKOUT pin that provides a buffered, logic-level clock output synchronized to its internal oscillator - enabling direct synchronization of other switching regulators. In contrast, the standard LT3694 has a SYNC input for accepting an external clock but no clock output capability. This makes the LT3694IUFD-1#TRPBF essential for master-clock architectures where one IC coordinates timing across multiple power stages.
How does the TRK/SS pin functionality work in LT3694IUFD-1#TRPBF?
In the LT3694IUFD-1#TRPBF, each TRK/SS pin (TRK/SS1–3) overrides the 0.75V internal reference for its corresponding FB pin when driven below 0.75V. This enables either ratiometric tracking (e.g., tying TRK/SS2 to FB1 to make OUT2 follow OUT1) or soft-start (connecting a capacitor from TRK/SS to GND to ramp the reference). The LT3694IUFD-1#TRPBF supports independent control of all three outputs, allowing flexible power-up sequencing critical for FPGAs and processors.
What is the maximum supported switching frequency for LT3694IUFD-1#TRPBF at 36V input and 3.3V output?
At VIN = 36V and VOUT = 3.3V, the LT3694IUFD-1#TRPBF's maximum constant-frequency switching frequency is limited by minimum off-time (140ns) and duty cycle constraints. Based on the formula fMAX2 = (1 − (VOUT + VF)/(VIN − VSW + VF)) × (1/tOFF(MIN)), and using VF ≈ 0.4V and VSW ≈ 0.6V, the practical upper limit is approximately 1.1MHz. Operating above this forces pulse-skipping mode, increasing ripple and peak inductor current - so 800kHz is commonly used for optimal balance.
Can LT3694IUFD-1#TRPBF drive external N-channel MOSFETs for the LDO sections?
No - the LT3694IUFD-1#TRPBF's DRV2 and DRV3 pins are designed exclusively to drive the base of external NPN bipolar transistors for the LDO regulators. They provide up to 6V base drive but lack the gate-drive strength, level-shifting, or bootstrap circuitry required for N-channel MOSFETs. Using NPN transistors (e.g., ZXTCM322) is mandatory per the datasheet; substituting MOSFETs would result in improper biasing and potential failure.
What thermal design considerations apply to LT3694IUFD-1#TRPBF in continuous 2.6A operation?
Under continuous 2.6A load at 12V input and 3.3V output, the LT3694IUFD-1#TRPBF dissipates ~2.5W. With θJA = 34°C/W, junction temperature rise is ~85°C above ambient - requiring the exposed pad (Pin 29) to be fully soldered to a ≥250mm² internal or external copper ground plane. Insufficient pad soldering or undersized thermal vias will cause thermal shutdown. The I-grade rating (–40°C to 125°C) assumes proper PCB thermal design per Linear Technology's AN136 guidelines.
LT3694IUFD-1#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) (1), Linear (LDO) (2)
- Number of Outputs:
- 3
- Frequency - Switching:
- 250kHz ~ 2.5MHz
- Voltage/Current - Output 1:
- 0.75V ~ 16V, 2.6A
- Voltage/Current - Output 2:
- Controller
- Voltage/Current - Output 3:
- Controller
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 4V ~ 36V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LT3694IUFD-1#TRPBF FAQ
1.How can I place an order for LT3694IUFD-1#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3694IUFD-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3694IUFD-1#TRPBF reliable?
The price and inventory of LT3694IUFD-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3694IUFD-1#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3694IUFD-1#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3694IUFD-1#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3694IUFD-1#TRPBF?
LT3694IUFD-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3694IUFD-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3694IUFD-1#TRPBF?
For technical support, including LT3694IUFD-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3694IUFD-1#TRPBF requirements.
6.How does Aetrix verify that LT3694IUFD-1#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3694IUFD-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3694IUFD-1#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3694IUFD-1#TRPBF?
All LT3694IUFD-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3694IUFD-1#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3694IUFD-1#TRPBF part is unused and in its original packaging.
Return procedure for LT3694IUFD-1#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT3694IUFD-1#TRPBF Tags
-
TPS6521905RHBR
Texas Instruments
-
MIC3385YHL-TR
Microchip Technology
-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments
-
A4402KLPTR-T
Allegro MicroSystems
-
BD71847AMWV-E2
ROHM Semiconductor
-
ADP5040ACPZ-1-R7
Analog Devices Inc.
-
LT3048IDC#TRPBF
Analog Devices Inc.
-
ADP5037ACPZ-R7
Analog Devices Inc.
-
XRP7714ILB-F
MaxLinear, Inc.
-
LTC3260EDE#TRPBF
Analog Devices Inc.
-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
