Analog Devices Inc. LT3782EFE#PBF
- Part No.:
- LT3782EFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LT3782EFE#PBF.pdf
- Description:
- IC REG CTRLR BOOST 28TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:150
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT3782EFE#PBF from Analog Devices (formerly Linear Technology) is a current-mode, two-phase step-up DC/DC controller designed for high-efficiency interleaved boost conversion. It supports 6V–40V input, delivers up to 50V/4A output, operates at 150kHz–500kHz switching frequency, and drives external N-channel MOSFETs with 10V gate bias and 4A peak source/sink capability. It is used in telecom infrastructure power supplies requiring low-output-ripple, high-power density boost stages.
For engineers reviewing the LT3782EFE#PBF datasheet, LT3782EFE#PBF pinout, LT3782EFE#PBF application, or LT3782EFE#PBF equivalent, key selection criteria include programmable duty cycle clamp (50% or higher), synchronous gate signal timing control via DELAY pin, slope compensation adjustment, and thermal performance in 28-lead TSSOP with exposed GND pad.
Technical Context
The LT3782EFE#PBF implements dual-phase interleaved current-mode control with 180° phase separation, reducing input/output ripple and enabling smaller passive components. Its transconductance error amplifier (200–370 μmho) regulates output voltage via FB pin using a 2.42–2.488V reference, while dual current-sense amplifiers monitor SENSE1± and SENSE2± with 60mV threshold for per-phase overcurrent protection.
It integrates two independent 10V gate drivers (BGATE1/BGATE2) with 4A peak drive, programmable falling-edge delay on SGATE1/SGATE2 for synchronous rectifier control, and internal oscillator frequency set by RSET (80kΩ = 250kHz). The device supports external synchronization (fSYNC = 2×fSW) and includes undervoltage lockout, soft-start, and duty cycle limiting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 6V to 40V - supports wide industrial and telecom input rails without pre-regulation. |
| Switching Frequency | 150kHz to 500kHz - adjustable via RSET resistor; higher frequencies reduce inductor/capacitor size but increase switching loss. |
| Gate Drive Voltage | 10.2V to 11.7V (GBIAS) - sufficient to fully enhance standard 10V-rated N-channel MOSFETs in high-power boost stages. |
| Peak Gate Drive Current | 4A source/sink - enables fast turn-on/turn-off of high-Qg power MOSFETs, minimizing conduction loss. |
| Current Sense Threshold | 60mV per phase - sets precise overcurrent limit; requires Kelvin-connected sense resistors for accuracy. |
| Reference Voltage | 2.42V to 2.488V - tight tolerance enables accurate output voltage programming (e.g., VOUT = 2.44V × (1 + RF1/RF2)). |
| Duty Cycle Clamp | 50%, 75%, or ≥90% - selectable via DCL pin voltage to prevent instability at high VIN/VOUT ratios. |
| Operating Temp Range | –40°C to 85°C - qualified for commercial/industrial ambient conditions; junction max 125°C with θJA = 38°C/W. |
Pinout & Package
The LT3782EFE#PBF is housed in a thermally enhanced 28-lead plastic TSSOP (FE package) with exposed GND pad (Pin 29) that must be soldered to PCB for thermal and electrical performance. Pin count and layout match the QFN variant (UFD), but TSSOP offers through-hole compatibility and simplified prototyping.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SGATE1 / SGATE2 (Pins 1, 2 / 26, 27) | Synchronous top-FET drive outputs | Provide PWM signals to external drivers for synchronous rectification; require external buffer for high-side FETs. |
| BGATE1 / BGATE2 (Pins 23, 20 / 22, 17) | Bottom-FET gate drivers | 10V, 4A capable drivers for N-channel boost switches; each has dedicated VEE ground return (Pins 24, 19). |
| SENSE1± / SENSE2± (Pins 8–9 / 12–13) | Per-phase current sense inputs | Differential inputs for 60mV overcurrent detection; require RC filter and Kelvin routing to minimize noise. |
| RSET (Pin 11) | Oscillator frequency programming | Resistor-to-GND sets switching frequency (e.g., 80kΩ = 250kHz); also used as reference for DCL and DELAY functions. |
| DELAY (Pin 6) | Synchronous timing control | Adjusts BGATE turn-on delay after SGATE turn-off (100–1000ns range) to prevent cross-conduction in synchronous designs. |
| DCL (Pin 7) | Duty cycle clamp control | Voltage level selects max duty cycle: 0V = 50%, 1.2V = 75%, VRSET ≈ 90% - critical for stability at high step-up ratios. |
| FB (Pin 16) | Output voltage feedback | Inverting input of gm amplifier; connects to resistor divider from VOUT to set regulated output voltage. |
| RUN (Pin 17) | Enable/shutdown control | 2.3–2.6V threshold with 80mV hysteresis; <0.3V forces ultra-low-IQ shutdown mode. |
Key Features
| Feature | Design Value |
|---|---|
| Two-phase interleaved operation | Reduces input/output RMS ripple current by up to 70% vs single-phase, enabling smaller capacitors and lower EMI. |
| Programmable slope compensation | RSLOPE resistor on SLOPE pin increases internal ramp slope to suppress subharmonic oscillation in high-noise, high-duty-cycle applications. |
| Synchronous rectifier support | SGATE1/SGATE2 outputs with user-adjustable delay eliminate body-diode conduction loss in high-VOUT boost converters. |
| Thermally optimized package | Exposed GND pad (Pin 29) provides low-θJA (38°C/W) path; mandatory solder connection to PCB ground plane for thermal integrity. |
| Robust gate driver architecture | Dual 4A drivers with independent GBIAS2/GBIAS1/GBIAS pins allow external 12–14V bias for >24V VIN applications, reducing IC self-heating. |
| Flexible frequency control | Internal oscillator runs at 2× fSW; supports external sync at fSYNC = 2× fSYSTEM, enabling coherent multi-converter timing in dense systems. |
Applications
| Telecom Power Supply | Industrial Motor Drive Bias |
|---|---|
Use Scenario: Interleaved boost stage in 48V telecom rectifier feeding distributed 54V intermediate bus. IC Role / Device Role / Timing Role: Two-phase current-mode controller managing parallel boost channels with 180° phase shift to minimize input capacitor stress. Use Value: Enables 50V/4A output with <15mVpp output ripple and 93–97% efficiency across 12–36V input range. | Use Scenario: High-voltage auxiliary supply for gate drivers and logic in servo motor inverters. IC Role / Device Role / Timing Role: Step-up controller generating isolated 24V/2A bias rail from 12V system bus using coupled inductors. Use Value: Dual-phase operation reduces magnetic size by 40% and eliminates need for oversized bulk capacitors. |
| Medical Imaging Power Module | Test Equipment High-Voltage Source |
Use Scenario: Compact, low-noise boost converter powering CCD sensor bias in portable ultrasound units. IC Role / Device Role / Timing Role: Precision-controlled boost controller with programmable soft-start and current limit for safe sensor ramp-up. Use Value: 60mV current sense threshold ensures ±3% overcurrent protection; slope compensation maintains stability under EMI-rich imaging conditions. | Use Scenario: Programmable 100V/500mA lab supply with remote sensing and fast transient response. IC Role / Device Role / Timing Role: Two-phase controller operating at 386kHz (RSET = 40kΩ) to achieve <50μs load-step recovery. Use Value: 500kHz max frequency allows <2.2μH inductors; duty cycle clamp prevents runaway during short-circuit events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar two-phase boost controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3780EFE#PBF | Single-phase architecture; no interleaving; lower max fSW (400kHz); integrated 7V gate drivers only. | Suitable for lower-power (<2A) or space-constrained designs where interleaving benefits are unnecessary. | Select LTC3780EFE#PBF only when dual-phase ripple reduction is not required and board area is premium. |
| LT3758EFE#PBF | Single-phase, wider input (4.5–100V), no synchronous gate outputs, no programmable delay or DCL pin. | Targeted at ultra-high-VIN boost (e.g., automotive battery to 60V) where phase interleaving is secondary to input range. | Choose LT3758EFE#PBF for >40V input applications where LT3782EFE#PBF's 40V VCC limit is exceeded. |
Compared with LTC3780EFE#PBF and LT3758EFE#PBF, the LT3782EFE#PBF uniquely delivers true two-phase interleaving with synchronous timing control, making it the only option among the three for high-current, low-ripple, telecom-grade boost conversion where input/output capacitor size and thermal management are critical.
Availability
LT3782EFE#PBF is available at Aetrix Electronics and suitable for telecom infrastructure, industrial motor drive bias, medical imaging power modules, and test equipment high-voltage sources requiring stable component supply and long-term design continuity.
Supply support for LT3782EFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheets, and application engineering for legacy Linear parts including the LT3782 series.
The LT3782 product line was designed specifically for high-efficiency, high-current, two-phase interleaved boost conversion in space- and thermal-constrained industrial and telecom power systems.
FAQ
What is the maximum recommended input voltage for the LT3782EFE#PBF?
The LT3782EFE#PBF has an absolute maximum VCC rating of 40V, and its specified input voltage range is 6V to 40V. Operation above 40V risks permanent damage. For reliable long-term use, keep VIN ≤ 38V with appropriate derating margin, especially at elevated temperatures where internal regulator thermal stress increases.
Can the LT3782EFE#PBF drive synchronous rectifiers without external gate drivers?
No, the LT3782EFE#PBF cannot directly drive synchronous rectifiers. Its SGATE1 and SGATE2 pins output low-current PWM signals intended for external MOSFET drivers (e.g., LTC4446), while BGATE1/BGATE2 drive the main boost switches. Direct connection of SGATE outputs to power FET gates is not supported and may cause timing errors or shoot-through.
How does the DELAY pin affect timing between SGATE and BGATE in the LT3782EFE#PBF?
The DELAY pin on the LT3782EFE#PBF programs the time interval between SGATE turn-off and subsequent BGATE turn-on to prevent cross-conduction. With DELAY tied to RSET (2.3V), delay is ~100ns; lowering VDELAY to 1V extends it to ~150ns. This delay is critical when using external synchronous drivers with propagation latency.
Is the LT3782EFE#PBF pin-compatible with the LT3782A series?
No, the LT3782EFE#PBF is not pin-compatible with the LT3782A series. While functionally similar, the LT3782A introduces improved phase matching and updated internal timing, and Analog Devices explicitly recommends the LT3782A for new designs. Migration requires validation of timing margins and potential layout changes.
What thermal considerations apply to the exposed pad (Pin 29) on the LT3782EFE#PBF?
The exposed pad (Pin 29) of the LT3782EFE#PBF is internally connected to GND and serves as the primary thermal path. It must be soldered to a minimum 200mm² copper pour with ≥4 thermal vias (0.3mm diameter) to inner ground planes. Failure to do so raises θJA beyond 38°C/W, risking thermal shutdown above 85°C ambient at full load.
LT3782EFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 6V ~ 40V
- Frequency - Switching:
- 154kHz ~ 465kHz
- Duty Cycle (Max):
- 94%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Reset, Soft Start
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
LT3782EFE#PBF FAQ
1.How can I place an order for LT3782EFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3782EFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3782EFE#PBF reliable?
The price and inventory of LT3782EFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3782EFE#PBF is usually 5 days.
3.What payment methods are accepted for LT3782EFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3782EFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3782EFE#PBF?
LT3782EFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3782EFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3782EFE#PBF?
For technical support, including LT3782EFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3782EFE#PBF requirements.
6.How does Aetrix verify that LT3782EFE#PBF is sourced from the original manufacturer or authorized distributors?
All LT3782EFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3782EFE#PBF meets industry standards.
7.What is the process for return or replacement of LT3782EFE#PBF?
All LT3782EFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3782EFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3782EFE#PBF part is unused and in its original packaging.
Return procedure for LT3782EFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT3782EFE#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

