My Inquiry
My Account
Analog Devices Inc. LT3782EUFD#PBF
- Part No.:
- LT3782EUFD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LT3782EUFD#PBF.pdf
- Description:
- IC REG CTRLR BOOST 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,072
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT3782EUFD#PBF from Analog Devices (formerly Linear Technology) is a current-mode, two-phase step-up DC/DC controller designed for high-efficiency interleaved boost conversion. It operates at up to 500kHz switching frequency, delivers 10V gate drive with 4A peak source/sink capability, supports 6V–40V input, and targets 50V/4A output applications in telecom infrastructure and industrial power supplies.
For engineers reviewing the LT3782EUFD#PBF datasheet, LT3782EUFD#PBF pinout, LT3782EUFD#PBF application, or LT3782EUFD#PBF equivalent, key selection considerations include programmable duty cycle clamp (50% or higher), synchronous gate signal timing with programmable falling-edge delay, slope compensation adjustment, and thermal performance in the 4mm × 5mm QFN package with exposed ground pad.
Technical Context
The LT3782EUFD#PBF implements dual-channel current-mode PWM control with precise 180° phase interleaving, using internal flip-flops to enforce fixed-phase relationship independent of external synchronization. Its transconductance error amplifier (200–370 μmho) regulates output voltage via FB pin feedback against a 2.42–2.488V reference, while dual current-sense amplifiers monitor 60mV threshold across SENSE1+/– and SENSE2+/– for per-phase overcurrent protection.
Switching frequency is set by RSET-to-GND resistor (154kHz–465kHz typical), with SYNC pin enabling external clock synchronization at twice the operating frequency. The DELAY pin provides programmable BGATE turn-on delay relative to SGATE turn-off to prevent cross-conduction in synchronous rectifier configurations using external drivers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 6V to 40V - supports wide industrial and telecom input rails including 12V, 24V, and 36V systems. |
| Switching Frequency | 150kHz to 500kHz - adjustable via RSET resistor; reduces filter size and improves transient response. |
| Gate Drive Capability | 10V output with 4A peak source/sink - drives high-power N-channel MOSFETs directly without level-shifting. |
| Current Sense Threshold | 60mV per channel - sets accurate per-phase current limit with minimal power loss in sense resistors. |
| Duty Cycle Clamp | Programmable to 50%, 75%, or ≥90% - prevents instability at high VIN/VOUT ratios and enables safe operation near duty cycle limits. |
| Operating Temperature | –40°C to +85°C - qualified for commercial and industrial ambient environments. |
| Slope Compensation | Adjustable via RSLOPE resistor - suppresses subharmonic oscillation in continuous conduction mode at high duty cycles. |
Pinout & Package
The LT3782EUFD#PBF is housed in a thermally enhanced 28-lead (4mm × 5mm) plastic QFN package with exposed ground pad (Pin 29), requiring soldering to PCB for optimal thermal performance (θJA = 37°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SGATE1 (Pin 1) | First-phase synchronous driver output | Drives external high-side MOSFET driver; requires buffer for top-switch control. |
| SGATE2 (Pin 26) | Second-phase synchronous driver output | 180° out-of-phase with SGATE1; enables interleaved synchronous rectification. |
| BGATE1 (Pin 22) | First-phase bottom-gate driver output | 10V, 4A capable; directly drives N-channel MOSFET source-connected switch. |
| BGATE2 (Pin 17) | Second-phase bottom-gate driver output | Matches BGATE1 timing and drive strength; ensures balanced phase current sharing. |
| DELAY (Pin 2) | Programmable falling-edge delay control | Sets BGATE turn-on delay after SGATE turn-off (100–500ns range) to avoid cross-conduction. |
| SENSE1+/– (Pins 4/5) | First-phase current sense differential inputs | 60mV threshold; requires RC filter and Kelvin layout for noise-immune current limiting. |
| SENSE2+/– (Pins 10/8) | Second-phase current sense differential inputs | Independent sensing path; enables per-phase current monitoring and fault isolation. |
| RSET (Pin 7) | Oscillator frequency programming input | Resistor to GND sets switching frequency; also used as reference for DCL and DELAY biasing. |
| DCL (Pin 3) | Duty cycle limit control | GND = 50% clamp; 1.2V = 75%; VRSET = ≥90% - prevents instability in high-gain boost stages. |
| FB (Pin 13) | Voltage feedback input | Connects to resistor divider from VOUT; regulates output using 2.44V internal reference. |
| VC (Pin 12) | Error amplifier output / current loop control | 0.7V threshold initiates switching; voltage level directly controls inductor peak current. |
| SS (Pin 11) | Soft-start timing capacitor node | 10μA constant current charges external capacitor; controls output voltage ramp rate. |
| RUN (Pin 14) | Enable/shutdown control | 2.45V threshold enables operation; 0.3V forces low-current shutdown; 80mV hysteresis prevents chatter. |
| GBIAS (Pin 25) | Internal 11V bias regulator output | Supplies internal circuitry; must connect to GBIAS1/GBIAS2 for gate driver biasing. |
| GBIAS1 (Pin 21) | First-phase gate driver bias supply | Connected to GBIAS; powers BGATE1 driver stage with low-impedance 2μF bypass cap required. |
| GBIAS2 (Pin 18) | Second-phase gate driver bias supply | Connected to GBIAS; powers BGATE2 driver stage; shares same bias rail for matched performance. |
| VEE1 (Pin 23) | First-phase gate driver ground return | Must tie to ground side of first current sense resistor to maintain accurate sensing reference. |
| VEE2 (Pin 16) | Second-phase gate driver ground return | Must tie to ground side of second current sense resistor; isolates phase grounding paths. |
| VCC (Pin 24) | Main supply input | Accepts 6–40V; requires local ceramic bypassing; powers logic, drivers, and internal regulators. |
| SLOPE (Pin 6) | Slope compensation adjustment | Resistor to GND increases internal ramp slope; critical for stability at >50% duty cycle. |
| SYNC (Pin 1) | External synchronization input | Accepts 0.8–2V pulses; system sync frequency must be 2× desired switching frequency. |
| GND (Pin 28) | Signal ground reference | Primary analog/digital ground; connects to exposed pad (Pin 29) for thermal and electrical integrity. |
| Exposed Pad (Pin 29) | Thermal and electrical ground | Fused to internal AGND; must be soldered to large PCB ground plane for θJA = 37°C/W. |
| NC (Pins 9,15,19,20) | No-connect terminals | May be tied to GND for mechanical stability; no electrical function. |
Key Features
| Feature | Design Value |
|---|---|
| Two-phase interleaved control | Reduces input/output ripple current by ~70% vs single-phase, enabling smaller capacitors and lower EMI. |
| Programmable synchronous gate delay | Prevents shoot-through in external synchronous rectifier designs by delaying BGATE turn-on after SGATE turn-off. |
| Adjustable slope compensation | Enables stable operation at high duty cycles (>50%) in continuous conduction mode without external compensation networks. |
| Per-phase current sensing | Independent SENSE1+/– and SENSE2+/– inputs allow balanced current sharing and fault detection per channel. |
| Thermally optimized QFN package | 4mm × 5mm footprint with exposed pad achieves 37°C/W junction-to-ambient thermal resistance for high-power density designs. |
Applications
| Telecom Power Supply | Industrial DC-DC Boost Module |
|---|---|
Use Scenario: Interleaved isolated boost stage in 48V telecom rectifier systems delivering 50V/4A to downstream converters. IC Role / Device Role / Timing Role: Two-phase current-mode controller managing parallel boost channels with synchronized 180° phase offset and shared voltage regulation. Use Value: Reduces output capacitor RMS ripple current by >90% at 50% duty cycle, cutting capacitor count and board area by 50% vs single-phase design. | Use Scenario: High-reliability 24V-to-50V boost converter in factory automation PLC power rails with strict thermal limits. IC Role / Device Role / Timing Role: Primary controller enforcing tight current matching between phases via independent sense amplifiers and matched gate drivers. Use Value: 4A peak gate drive and 10V bias enable direct driving of 100V-rated Si7852DP MOSFETs, eliminating external level shifters and reducing BOM count. |
| Interleaved Isolated Power Supply | High-Voltage Test Equipment Supply |
Use Scenario: Primary-side controller in dual-active-bridge or forward-derived isolated boost for medical imaging power systems. IC Role / Device Role / Timing Role: Generates precisely phased gate signals for primary-side switches while providing isolated feedback via optocoupler-coupled FB network. Use Value: Programmable DCL pin clamps maximum duty cycle to 75% during startup, preventing transformer saturation under low-line conditions. | Use Scenario: Lab-grade 10V–36V input to 50V/4A output bench supply with low-noise, low-ripple requirements. IC Role / Device Role / Timing Role: Dual-channel controller implementing soft-start (SS pin), UVLO (RUN pin), and slope compensation (SLOPE pin) for repeatable, jitter-free startup. Use Value: 200ns on-chip one-shot timer on SYNC pin tolerates wide pulse-width variation in system clock inputs, simplifying synchronization with arbitrary test equipment clocks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar two-phase boost controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3780EUFD#PBF | Single-phase architecture; lacks interleaved control, phase delay, and dual current sense inputs. | Requires external interleaving circuitry for ripple reduction; unsuitable for native two-phase current balancing. | Select only if single-phase topology suffices and board space allows added passive filtering. |
| LT3758EUFD#PBF | Single-phase boost/buck-boost controller; no second phase, no SGATE outputs, no DELAY pin. | Cannot implement interleaved operation; limited to ≤2.5A output due to lower gate drive current (2.5A vs 4A). | Choose when cost sensitivity outweighs ripple and thermal performance needs in <3A applications. |
Compared with LTC3780EUFD#PBF and LT3758EUFD#PBF, the LT3782EUFD#PBF uniquely integrates native two-phase control, per-phase current sensing, and programmable synchronous timing-enabling 50V/4A interleaved boost designs without external phase management logic or additional controllers.
Availability
LT3782EUFD#PBF is available at Aetrix Electronics and suitable for telecom infrastructure, industrial DC-DC modules, and interleaved isolated power supplies requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LT3782EUFD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for all Linear ICs including the LT3782 series.
The LT3782 product line was designed specifically for high-efficiency, high-current interleaved boost conversion in space-constrained industrial and telecom power systems where thermal management and ripple reduction are critical.
FAQ
What is the maximum switching frequency supported by the LT3782EUFD#PBF?
The LT3782EUFD#PBF supports a maximum switching frequency of 500kHz, achieved when the RSET resistor is set to 40kΩ. At this setting, the typical frequency is 465kHz with ±10% tolerance across temperature and supply voltage. Operation above 500kHz is not guaranteed and may compromise stability or current limit accuracy. The LT3782EUFD#PBF datasheet specifies 150kHz–500kHz as the validated range.
Does the LT3782EUFD#PBF support synchronous rectification?
Yes, the LT3782EUFD#PBF supports synchronous rectification through dedicated SGATE1 and SGATE2 pins that provide phase-aligned high-side drive signals. These outputs require external driver buffers to interface with high-side N-channel MOSFETs. The DELAY pin enables precise timing control to delay BGATE turn-on after SGATE turn-off, preventing cross-conduction. The LT3782EUFD#PBF does not integrate synchronous drivers internally but provides all necessary timing and control signals for robust external implementation.
What is the purpose of the exposed pad (Pin 29) on the LT3782EUFD#PBF?
The exposed pad (Pin 29) on the LT3782EUFD#PBF is fused internally to analog ground (AGND) and serves dual thermal and electrical functions. It must be soldered to a large PCB ground plane to achieve the specified θJA of 37°C/W. Failure to connect this pad results in significantly degraded thermal performance and potential device failure under load. The pad is not optional-it is an integral part of the thermal path and signal reference system for the LT3782EUFD#PBF.
Can the LT3782EUFD#PBF operate with input voltages below 6V?
No, the LT3782EUFD#PBF has a minimum specified input voltage of 6V per its Absolute Maximum Ratings and Electrical Characteristics tables. Below 6V, internal bias generation-including the 11V GBIAS regulator and gate drivers-cannot be guaranteed to function correctly. Startup behavior, current limit accuracy, and PWM stability are not characterized or warranted below 6V. For sub-6V applications, alternative controllers such as the LT3757 or LTC3787 should be evaluated instead of the LT3782EUFD#PBF.
How is the duty cycle limit configured on the LT3782EUFD#PBF?
The duty cycle limit on the LT3782EUFD#PBF is configured via the DCL pin: grounding DCL sets a hard 50% clamp; applying 1.2V (via resistor divider from RSET) sets 75%; connecting DCL directly to RSET enables natural maximum duty cycle (~90% at RSET > 80kΩ). The DCL pin draws only 0.2μA, minimizing divider loading. This feature is critical for preventing transformer saturation and instability in high-ratio boost applications, and is fully supported in the LT3782EUFD#PBF's QFN package variant.
LT3782EUFD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 6V ~ 40V
- Frequency - Switching:
- 154kHz ~ 465kHz
- Duty Cycle (Max):
- 94%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Reset, Soft Start
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LT3782EUFD#PBF FAQ
1.How can I place an order for LT3782EUFD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3782EUFD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3782EUFD#PBF reliable?
The price and inventory of LT3782EUFD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3782EUFD#PBF is usually 5 days.
3.What payment methods are accepted for LT3782EUFD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3782EUFD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3782EUFD#PBF?
LT3782EUFD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3782EUFD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3782EUFD#PBF?
For technical support, including LT3782EUFD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3782EUFD#PBF requirements.
6.How does Aetrix verify that LT3782EUFD#PBF is sourced from the original manufacturer or authorized distributors?
All LT3782EUFD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3782EUFD#PBF meets industry standards.
7.What is the process for return or replacement of LT3782EUFD#PBF?
All LT3782EUFD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3782EUFD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3782EUFD#PBF part is unused and in its original packaging.
Return procedure for LT3782EUFD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT3782EUFD#PBF Tags
-
UCC28C45DR
Texas Instruments
-
UCC28C40DR
Texas Instruments
-
UCC28C43DR
Texas Instruments
-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments
-
MIC2102YML-TR
Microchip Technology
-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments
-
LM5155DSSR
Texas Instruments
-
LM25085MYX/NOPB
Texas Instruments
-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
