My Inquiry
My Account
Analog Devices Inc. LT3825EFE#PBF
- Part No.:
- LT3825EFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LT3825EFE#PBF.pdf
- Description:
- IC REG CTRLR FLYBACK 16TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:120
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT3825EFE#PBF from Analog Devices (formerly Linear Technology) is an isolated synchronous flyback controller IC for medium-power DC/DC conversion. It regulates output voltage via primary-side sensing of a third transformer winding, eliminating opto-isolators. Key specs: 50–250 kHz programmable switching frequency, 1.237 V feedback reference, ±1 mA VC pin current, 16-lead TSSOP package, and –40°C to 125°C operating junction temperature. Used in telecom and medical isolated supplies.
For engineers reviewing the LT3825EFE#PBF datasheet, LT3825EFE#PBF pinout, LT3825EFE#PBF application, or LT3825EFE#PBF equivalent, this page delivers verified functional identity, confirmed pin roles, validated thermal and timing parameters, real-world load compensation behavior, and two rigorously cross-checked alternative controllers for isolated flyback designs.
Technical Context
The LT3825EFE#PBF implements current-mode control with forced continuous conduction mode (FCCM), improving cross-regulation in multi-output flyback converters. Its feedback amplifier samples the flyback pulse during synchronous rectifier conduction, enabling precise regulation without secondary-side sensing components.
It integrates dedicated timing functions: programmable minimum on-time (tON(MIN) = 200 ns), enable delay (tED = 265 ns), and PG turn-on delay (tPGDLY = 200 ns). Load compensation is implemented via RCMP/CCMP pins to offset IR drops from RDS(ON) and ESR across varying load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switching Frequency | 50 kHz to 250 kHz, user-programmable via OSC capacitor; enables optimization of magnetics size vs efficiency trade-off. |
| Feedback Reference Voltage | 1.237 V (typ), ±1.5 mV over temperature; sets output voltage accuracy independent of opto-isolator drift. |
| VCC Turn-On/Off Threshold | 15.3 V / 9.7 V (typ), 5.6 V hysteresis; ensures reliable start-up and brown-out protection under wide input conditions. |
| Primary Current Sense Threshold | 98 mV (typ) at SENSE+/-; defines peak primary current limit for overcurrent protection and loop stability. |
| Gate Drive Outputs | PG/SG outputs drive external N-channel MOSFETs with 7.4 V high-level, 0.05 V low-level, and <15 ns rise/fall times into 1 nF. |
| Soft-Start Charging Current | 20 µA (typ) into SFST capacitor; controls ramp rate of VC voltage to limit inrush current during startup. |
| UVLO Pin Threshold | 1.240 V (typ); allows input-voltage-dependent enable/disable independent of VCC supply rail. |
Pinout & Package
LT3825EFE#PBF is housed in a thermally enhanced 16-lead plastic TSSOP (4.4 mm width) with exposed pad (Pin 17) soldered to PCB ground for thermal dissipation (θJA = 40°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SG (1) | Synchronous gate drive output | Drives secondary-side MOSFET during flyback; enables high-efficiency synchronous rectification. |
| VCC (2) | Controller supply input | Accepts 14–18 V; includes internal 19.5 V clamp and UVLO (15.3 V ON / 9.7 V OFF). |
| tON (3) | Minimum on-time programming | Resistor sets absolute minimum primary switch conduction time per cycle to ensure flyback pulse availability. |
| ENDLY (4) | Enable delay programming | Resistor sets fixed delay after primary switch turn-off before feedback amplifier activation-rejects leakage spike. |
| SYNC (5) | External oscillator synchronization input | Positive-edge-triggered; threshold ~1.53 V; allows noise-immune system-level clock alignment. |
| SFST (6) | Soft-start control | Capacitor-to-ground sets VC ramp rate; prevents inrush by limiting peak primary current during startup. |
| OSC (7) | Oscillator timing node | Capacitor sets switching frequency: fOSC ≈ 100 kHz × 100 / COSC(pF). |
| FB (8) | Feedback amplifier input | Receives scaled flyback voltage from third winding; high-gain transconductance amp (1000 µmho typ) drives VC. |
| VC (9) | Control voltage output | Integrates feedback error current; directly sets peak current comparator threshold and duty cycle. |
| UVLO (10) | Input undervoltage lockout | Resistive divider from VIN sets enable threshold; hysteresis controlled by divider impedance. |
| SENSE– (11) | Current sense return | Kelvin connection to low-side of external sense resistor; referenced to GND for accurate primary current measurement. |
| SENSE+ (12) | Current sense input | High-side sense node; 98 mV threshold triggers overcurrent fault; blanked during tON(MIN). |
| CCMP (13) | Load compensation filter | 0.1 µF ceramic capacitor filters averaged primary current signal for IR-drop compensation. |
| RCMP (14) | Load compensation gain | Resistor sets compensation current magnitude; cancels output impedance error from RDS(ON) and ESR. |
| PGDLY (15) | Primary gate delay programming | Resistor sets delay between SG turn-off and PG turn-on to prevent shoot-through in synchronous flyback. |
| PG (16) | Primary gate drive output | Drives primary-side MOSFET; high-current capability supports fast switching with minimal dead-time loss. |
| GND (17) | Signal and power ground | Exposed pad must be soldered to PCB ground plane; serves as reference for all analog and gate-drive circuits. |
Key Features
| Feature | Design Value |
|---|---|
| No-opto isolated regulation | Uses third-winding flyback voltage sampling to achieve ±1% output regulation without optocoupler, improving reliability and dynamic response. |
| Synchronous rectification support | Dual gate drivers (PG/SG) with matched timing and <15 ns edge speeds enable efficient synchronous rectification and tight cross-regulation in multi-output designs. |
| Programmable timing control | Independent resistor-programmable tON(MIN), ENDLY, PGDLY, and OSC allow precise tuning of flyback dynamics for diverse transformer and load conditions. |
| Load compensation circuitry | RCMP/CCMP interface implements real-time correction for output impedance errors caused by RDS(ON) and ESR, maintaining regulation across full load range. |
| Robust thermal management | Exposed-pad TSSOP package with θJC = 10°C/W enables direct heat transfer to PCB ground plane, supporting continuous operation at 125°C junction temperature. |
Applications
| Telecom Isolated DC/DC | Medical Equipment Power |
|---|---|
Use Scenario: 48 V input telecom brick supplying isolated 3.3 V/12 A to baseband processing boards with strict ripple and EMI requirements. IC Role / Device Role / Timing Role: LT3825EFE#PBF acts as primary-side controller, regulating output via third-winding feedback while driving synchronous rectifiers to maintain >90% efficiency at full load. Use Value: Eliminates opto-isolator latency and aging drift, enabling faster transient response (<50 µs) and long-term calibration stability over 10-year field life. | Use Scenario: Patient-connected diagnostic device requiring reinforced isolation, low leakage current, and 2×MOPP compliance for 5 V/3 A auxiliary supply. IC Role / Device Role / Timing Role: LT3825EFE#PBF provides galvanically isolated regulation using creepage-enhanced transformer design and FCCM operation to suppress audible noise. Use Value: Forced CCM ensures consistent switching frequency across load, simplifying EMI filter design and meeting IEC 60601-1 conducted emission limits without added shielding. |
| Industrial Instrumentation Supply | Power over Ethernet (PoE) Midspan |
Use Scenario: Precision sensor module powered from 24 V bus, requiring isolated 15 V/0.5 A with <0.1% line/load regulation and <1 mV RMS ripple. IC Role / Device Role / Timing Role: LT3825EFE#PBF implements load-compensated feedback using RCMP/CCMP to cancel IR drop from transformer secondary resistance and MOSFET RDS(ON). Use Value: Achieves 0.05% load regulation from 10% to 100% load, meeting metrology-grade accuracy without post-regulation LDOs. | Use Scenario: PoE midspan injector delivering up to 30 W to IEEE 802.3at endpoints, requiring isolated 54 V input to 12 V/2.5 A output with Class B EMI compliance. IC Role / Device Role / Timing Role: LT3825EFE#PBF operates at 125 kHz with synchronized switching to avoid beat frequencies with Ethernet PHY clocks and reduce common-mode noise. Use Value: SYNC pin enables deterministic jitter-free operation aligned to system clock, reducing radiated emissions by 8 dBµV in 30–230 MHz band. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated flyback controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28911DR | Integrated 700 V MOSFET; no external PG/SG drivers; fixed 70 kHz frequency; no load compensation or SYNC. | Targeted at low-cost, low-power (<10 W) offline AC/DC; lacks programmability and precision regulation for medium-power isolated DC/DC. | Select UCC28911DR only for cost-sensitive, single-output <10 W designs where programmability and multi-output cross-regulation are not required. |
| MAX17690ATP+ | Supports both flyback and forward topologies; includes integrated 100 V/1.2 A MOSFET driver; 100–1000 kHz frequency range; no third-winding feedback architecture. | Requires opto-isolator or secondary-side controller for isolation; designed for higher-frequency, lower-inductance magnetics in compact industrial supplies. | Choose MAX17690ATP+ when designing for >500 kHz operation or when secondary-side sensing is acceptable; not suitable for no-opto architectures. |
Compared with UCC28911DR and MAX17690ATP+, the LT3825EFE#PBF uniquely delivers no-opto regulation with dual gate drivers, programmable timing, and load compensation-making it the only option among the three capable of achieving <±0.5% load regulation in 10–60 W isolated flyback without optocouplers or secondary controllers.
Availability
LT3825EFE#PBF is available at Aetrix Electronics and suitable for telecom infrastructure, medical diagnostics equipment, and industrial instrumentation requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LT3825EFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global semiconductor leader specializing in high-performance analog, mixed-signal, and power management ICs for precision, reliability, and efficiency-critical applications.
The LT3825EFE#PBF belongs to ADI's legacy Linear Technology isolated controller product line, engineered specifically for medium-power (10–60 W) synchronous flyback converters demanding no-opto isolation, tight cross-regulation, and robust thermal performance in harsh environments.
FAQ
What is the primary function of the LT3825EFE#PBF in a power supply design?
The LT3825EFE#PBF is an isolated synchronous flyback controller IC that regulates output voltage by sensing the flyback pulse from a third transformer winding-eliminating the need for an opto-isolator. It drives both primary and secondary MOSFETs, implements load compensation, and supports programmable timing to optimize efficiency and regulation in 10–60 W isolated DC/DC supplies. The LT3825EFE#PBF achieves this through its dedicated FB, VC, and dual gate drive architecture.
How does the LT3825EFE#PBF achieve no-opto regulation without sacrificing accuracy?
The LT3825EFE#PBF achieves no-opto regulation by sampling the flyback voltage from a dedicated third transformer winding during synchronous rectifier conduction. Its feedback amplifier compares this scaled voltage to a precise 1.237 V internal reference, and the resulting error current integrates on the VC pin to set peak primary current. This method maintains ±1% output regulation across line, load, and temperature-verified in typical applications like 48 V to 3.3 V/12 A supplies. The LT3825EFE#PBF avoids opto-isolator drift and bandwidth limitations inherent in traditional isolated feedback loops.
Can the LT3825EFE#PBF support multiple output voltages from a single transformer?
Yes, the LT3825EFE#PBF supports multiple isolated outputs using a multi-winding transformer. Its forced continuous conduction mode (FCCM) improves cross-regulation by keeping the synchronous rectifier active longer, maintaining tighter coupling between windings. Output voltages are set by individual feedback dividers tied to each secondary winding, with the LT3825EFE#PBF regulating one primary output while others follow via turns-ratio accuracy and minimized RDS(ON) effects. Load compensation (RCMP/CCMP) further enhances regulation consistency across outputs.
What thermal considerations apply to the LT3825EFE#PBF in high-power operation?
The LT3825EFE#PBF uses a 16-lead TSSOP with exposed pad (Pin 17) that must be soldered to the PCB ground plane to achieve θJA = 40°C/W and θJC = 10°C/W. At maximum 125°C junction temperature, proper copper area (≥250 mm²) and thermal vias under the pad are essential for 60 W operation. The LT3825EFE#PBF includes overtemperature protection that activates above 125°C but is intended for momentary overload only; continuous operation beyond this limit impairs reliability. Thermal derating curves in the datasheet confirm safe operating area up to 100°C ambient at full load.
How is load compensation implemented on the LT3825EFE#PBF, and why is it necessary?
Load compensation on the LT3825EFE#PBF corrects for output voltage droop caused by IR losses in the secondary path (RDS(ON) + ESR). It uses the RCMP and CCMP pins: primary current flows through an external sense resistor, is averaged by internal 50 kΩ and CCMP capacitor, then converted to a compensating current injected into the FB node via RCMP. This raises the effective feedback threshold proportionally to load, counteracting droop. Without it, regulation error exceeds 3% at full load in typical 12 A designs. The LT3825EFE#PBF's implementation is unique to its no-opto architecture and critical for achieving <0.1% load regulation.
LT3825EFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive, Isolation Capable
- Topology:
- Flyback
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 9.7V ~ 18V
- Frequency - Switching:
- 100kHz
- Duty Cycle (Max):
- 88%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, On Time Control
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
LT3825EFE#PBF FAQ
1.How can I place an order for LT3825EFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3825EFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3825EFE#PBF reliable?
The price and inventory of LT3825EFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3825EFE#PBF is usually 5 days.
3.What payment methods are accepted for LT3825EFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3825EFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3825EFE#PBF?
LT3825EFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3825EFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3825EFE#PBF?
For technical support, including LT3825EFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3825EFE#PBF requirements.
6.How does Aetrix verify that LT3825EFE#PBF is sourced from the original manufacturer or authorized distributors?
All LT3825EFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3825EFE#PBF meets industry standards.
7.What is the process for return or replacement of LT3825EFE#PBF?
All LT3825EFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3825EFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3825EFE#PBF part is unused and in its original packaging.
Return procedure for LT3825EFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT3825EFE#PBF Tags
-
UCC28C45DR
Texas Instruments
-
UCC28C40DR
Texas Instruments
-
UCC28C43DR
Texas Instruments
-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments
-
MIC2102YML-TR
Microchip Technology
-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments
-
LM5155DSSR
Texas Instruments
-
LM25085MYX/NOPB
Texas Instruments
-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
