Analog Devices Inc. LT5572EUF#PBF
- Part No.:
- LT5572EUF#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- RF Modulators
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
LT5572EUF#PBF.pdf
- Description:
- RF MODULATOR 1.5GHZ-2.5GHZ 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,040
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT5572EUF#PBF from Analog Devices (acquired Linear Technology) is a high-linearity direct quadrature modulator IC for wireless infrastructure transmitters, operating from 1.5GHz to 2.5GHz RF with –2.5dB conversion gain, +21.6dBm OIP3 at 2GHz, –41.2dBc image rejection, and integrated LO quadrature generator. It enables DC-coupled I/Q baseband-to-RF upconversion in DCS, PCS, and UMTS band basestations.
For engineers reviewing the LT5572EUF#PBF datasheet, LT5572EUF#PBF pinout, LT5572EUF#PBF application, or LT5572EUF#PBF equivalent, key selection criteria include RF frequency range (1.5–2.5GHz), baseband common-mode voltage (0.5V), 16-lead 4mm × 4mm QFN package, and performance trade-offs between carrier leakage (–39.4dBm), noise floor (–152.5dBm/Hz at POUT = 4dBm), and supply current (145mA typical).
Technical Context
The LT5572EUF#PBF implements a fully integrated direct-conversion transmitter architecture: differential baseband I/Q inputs drive voltage-to-current converters feeding double-balanced mixers; an on-chip RF balun sums mixer outputs and transforms to 50Ω single-ended RF output. The LO path includes a single-ended buffer and precision quadrature phase generator delivering accurate 0°/90° LO signals to both mixers.
Its high-impedance (90kΩ) DC-coupled baseband interface requires 0.5V common-mode bias and supports up to 460MHz baseband bandwidth; RF and LO ports are AC-coupled, 50Ω matched, and operate across –40°C to 85°C ambient temperature with 4.5V–5.25V supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Frequency Range | 1.5GHz to 2.5GHz - defines usable cellular bands including DCS (1.71–1.88GHz), PCS (1.85–1.99GHz), and UMTS (2.11–2.17GHz). |
| Conversion Gain | –2.5dB - indicates net signal attenuation through modulation path; requires external PA gain staging for system-level output power. |
| OIP3 | +21.6dBm at 2GHz - quantifies third-order linearity for multi-carrier W-CDMA operation; enables –67.7dBc 4-channel ACPR at 2.14GHz. |
| Image Rejection | –41.2dBc at 2GHz - measures suppression of unwanted sideband without external calibration; limited by internal I/Q amplitude/phase imbalance (0.07dB/0.9°). |
| LO Feedthrough | –39.4dBm at 2GHz - specifies residual carrier leakage at RF output; impacts receiver desensitization in TDD systems. |
| Supply Current | 145mA at 5V - determines thermal load and power supply sizing; drops to 50µA in shutdown mode via EN pin control. |
| Baseband Input Impedance | 90kΩ differential - enables high-impedance DAC interfacing without external termination; requires 0.5V DC bias for optimal linearity. |
Pinout & Package
LT5572EUF#PBF is housed in a 16-lead plastic QFN package (4mm × 4mm) with exposed thermal pad (Pin 17) that must be soldered to PCB ground for RF performance and thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (1) | Enable control input | Logic-high (>1V) activates modulator; logic-low (<0.5V) places device in 50µA sleep mode; internal 75kΩ pull-down ensures default OFF state. |
| GND (2,4,6,9,10,12,15,17) | Ground reference | Pins 2/4 return LO signal; pins 10/12 return RF balun; pin 17 (exposed pad) is primary thermal/RF ground - all must connect to low-inductance PCB ground plane. |
| LO (3) | Single-ended LO input | 50Ω AC-coupled port accepting –10dBm to +5dBm LO drive; internal buffer and quadrature generator produce precise 0°/90° mixer LO signals. |
| BBPI / BBMI (14/16) | Differential I-channel baseband input | 90kΩ impedance, 0.5V common-mode bias point; accepts DC-coupled differential voltage signals for direct I-path modulation. |
| BBPQ / BBMQ (7/5) | Differential Q-channel baseband input | Identical to BBPI/BBMI; phase-orthogonal path enabling complex modulation; I/Q imbalance directly degrades image rejection. |
| VCC (8,13) | Power supply | 4.5V–5.25V operation; dual pins internally connected; requires local 0.1µF decoupling per pin to suppress supply noise coupling into RF path. |
| RF (11) | Single-ended RF output | 50Ω AC-coupled port delivering modulated RF; internal balun converts differential mixer outputs; external coupling capacitor recommended above 3dBm output. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated LO quadrature generator | Eliminates need for external 90° hybrid coupler or polyphase filter; maintains <1° phase error near 2GHz for stable image rejection. |
| DC-coupled high-Z baseband interface | Supports 0.5V common-mode bias and eliminates AC-coupling capacitors in baseband path - critical for low-frequency LTE/WiMAX modulation. |
| On-chip RF balun | Provides differential-to-single-ended conversion and 50Ω impedance match without external transformers - reduces BOM count and layout sensitivity. |
| Low-noise RF output stage | –152.5dBm/Hz noise floor at 20MHz offset with 4dBm output enables high dynamic range in multi-carrier basestation receivers. |
| Enable-controlled shutdown | Reduces supply current from 145mA to 50µA in <1.3µs; supports TDD timing and power cycling in time-division duplex systems. |
Applications
| W-CDMA Basestation Transmitter | TD-SCDMA Infrastructure |
|---|---|
|
Use Scenario: 4-carrier downlink transmission at 2.14GHz in macrocell basestation with 64-DPCH test model. IC Role / Device Role / Timing Role: Direct-conversion quadrature modulator converting baseband I/Q DAC outputs to RF; handles full 3.84MHz chip-rate bandwidth. Use Value: Achieves –67.7dBc 4-channel ACPR and –152.5dBm/Hz noise floor, meeting 3GPP TS 25.104 spectral mask requirements without external calibration. |
Use Scenario: Time-division duplex (TDD) base transceiver station supporting 1.28Mcps TD-SCDMA in 2.01–2.025GHz band. IC Role / Device Role / Timing Role: High-linearity upconverter synchronized to TDD frame timing; EN pin enables rapid on/off switching between transmit/receive slots. Use Value: 0.25µs turn-on time and 1.3µs turn-off time ensure minimal guard interval overhead; –41.2dBc image rejection meets China MIIT spectral purity mandates. |
| GSM/EDGE Multi-Band Transmitter | PHS/CDMA2000 Basestation |
|
Use Scenario: Dual-band (900MHz/1800MHz) EDGE transmitter requiring high EVM under 8PSK modulation. IC Role / Device Role / Timing Role: RF modulator in digital predistortion (DPD) feedback loop; processes wideband I/Q signals with minimal group delay variation. Use Value: +21.6dBm OIP3 and <0.07dB I/Q gain imbalance enable >35dB ACLR improvement when combined with DPD algorithms. |
Use Scenario: CDMA2000 1xRTT basestation operating in PCS 1900MHz band with stringent adjacent channel power ratio requirements. IC Role / Device Role / Timing Role: Final-stage modulator in IF-stripped architecture; interfaces directly to wideband DAC with 0.5V CM bias. Use Value: –39.4dBm carrier leakage and 460MHz baseband bandwidth support 1.2288MHz CDMA channel spacing while maintaining <1% RMS EVM. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar direct quadrature modulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADL5375-05 | Wider RF range (300MHz–4GHz), higher OIP3 (+24.5dBm), but requires external LO splitter and consumes 220mA. | Better suited for multi-band small cell radios needing 0.3–4GHz coverage; less optimal for fixed-band macro basestations due to higher power and complexity. | Select ADL5375-05 when wider frequency agility or higher linearity justifies added LO routing and thermal design effort. |
| TRF3705 | Narrower RF range (1.7–2.2GHz), lower OIP3 (+18.5dBm), integrated LO buffer only - no on-chip quadrature generation. | Requires external 90° LO splitter; suitable for cost-sensitive microcell designs where image rejection >35dBc is acceptable. | Choose TRF3705 only if external quadrature LO source exists and system-level image cancellation is implemented. |
Compared with ADL5375-05 and TRF3705, the LT5572EUF#PBF delivers superior integration (on-chip quadrature LO generation), tighter I/Q matching (0.07dB/0.9°), and optimized power efficiency (145mA) for fixed-band 1.5–2.5GHz infrastructure transmitters - reducing bill-of-materials and layout risk.
Availability
LT5572EUF#PBF is available at Aetrix Electronics and suitable for wireless infrastructure basestations, macrocell transmitters, and 3G/4G small cell radio units requiring stable component supply, long-term lifecycle support, and traceable sourcing for telecom OEMs.
Supply support for LT5572EUF#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and RF ICs, formed through acquisition of Linear Technology in 2017.
The LT5572EUF#PBF belongs to ADI's high-linearity RF modulator product line, designed specifically for wireless infrastructure transmitters demanding low distortion, integrated LO synthesis, and robust thermal performance in basestation environments.
FAQ
What is the recommended baseband common-mode voltage for optimal performance of the LT5572EUF#PBF?
The LT5572EUF#PBF achieves best linearity and image rejection at a 0.5V DC common-mode voltage applied to all four baseband inputs (BBPI, BBMI, BBPQ, BBMQ). Deviating from this value - for example to 0.6V - increases carrier leakage and degrades OIP3 by up to 3dB, as confirmed in Table 1 of the datasheet. Maintaining 0.5V ensures the internal PNP emitter followers operate within their linear region.
Does the LT5572EUF#PBF require external LO quadrature generation?
No, the LT5572EUF#PBF integrates a precision LO quadrature phase generator and buffers, eliminating the need for external 90° hybrids or polyphase filters. This internal circuitry delivers stable 0° and 90° LO signals to the I and Q mixers across 1.5–2.5GHz, achieving <1° phase error at 2GHz - a key factor enabling its –41.2dBc image rejection without calibration.
How does the LT5572EUF#PBF handle power-down sequencing?
The LT5572EUF#PBF uses a dedicated EN pin (Pin 1) for controlled shutdown: applying <0.5V disables the device, reducing supply current to 50µA in 1.3µs; applying >1V enables full operation with 145mA draw. An internal 75kΩ pull-down resistor guarantees safe default-OFF state if EN is left floating - preventing unintended RF output during power-up/down transitions.
What is the maximum RF output power achievable with the LT5572EUF#PBF at 2.14GHz?
The LT5572EUF#PBF delivers up to +6.2dBm CW RF output power at 2.14GHz when driven with full-scale 2VP-P differential baseband signals (0V–1V swing per side). This limit arises from internal baseband voltage headroom constraints at 0.5V common-mode bias - exceeding it risks clipping and increased HD2/HD3 distortion, as shown in Figure G19 of the datasheet.
Can the LT5572EUF#PBF be used in TDD systems requiring fast transmit/receive switching?
Yes, the LT5572EUF#PBF supports TDD operation via its EN pin, achieving 0.25µs turn-on time (EN low→high) and 1.3µs turn-off time (EN high→low), allowing rapid activation/deactivation between transmit and receive slots. Its 50µA sleep current minimizes power consumption during receive periods, making it suitable for TD-SCDMA and TDD-LTE basestation architectures.
LT5572EUF#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Modulator
- LO Frequency:
- 1.5GHz ~ 2.5GHz
- RF Frequency:
- 1.5GHz ~ 2.5GHz
- P1dB:
- 9.3dBm
- Noise Floor:
- -158.6dBm/Hz
- Output Power:
- 1.4dBm
- Current - Supply:
- 145 mA
- Voltage - Supply:
- 4.5V ~ 5.25V
- Test Frequency:
- 2GHz
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (4x4)
LT5572EUF#PBF FAQ
1.How can I place an order for LT5572EUF#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT5572EUF#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT5572EUF#PBF reliable?
The price and inventory of LT5572EUF#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT5572EUF#PBF is usually 5 days.
3.What payment methods are accepted for LT5572EUF#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT5572EUF#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT5572EUF#PBF?
LT5572EUF#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT5572EUF#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT5572EUF#PBF?
For technical support, including LT5572EUF#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT5572EUF#PBF requirements.
6.How does Aetrix verify that LT5572EUF#PBF is sourced from the original manufacturer or authorized distributors?
All LT5572EUF#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT5572EUF#PBF meets industry standards.
7.What is the process for return or replacement of LT5572EUF#PBF?
All LT5572EUF#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT5572EUF#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT5572EUF#PBF part is unused and in its original packaging.
Return procedure for LT5572EUF#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT5572EUF#PBF Tags

-
LTC5599IUF#TRPBF
Analog Devices Inc.

-
LTC5599IUF#PBF
Analog Devices Inc.

-
LTC5589IUF#PBF
Analog Devices Inc.

-
ADL5375-05ACPZ-R7
Analog Devices Inc.

-
ADL5385ACPZ-R7
Analog Devices Inc.

-
AD8346ARUZ-REEL7
Analog Devices Inc.

-
LTC5588IPF-1#PBF
Analog Devices Inc.

-
ADRF6755ACPZ-R7
Analog Devices Inc.

-
TRF370417IRGET
Texas Instruments

-
HMC631LP3ETR
Analog Devices Inc.

-
TRF3705IRGET
Texas Instruments

-
LTC5589IUF#TRPBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

