Analog Devices Inc. LT6372IMSE-0.2#TRPBF
- Part No.:
- LT6372IMSE-0.2#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-TFSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
LT6372IMSE-0.2#TRPBF.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,625
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Product details
Overview
LT6372IMSE-0.2#TRPBF from Analog Devices is a precision funneling instrumentation amplifier with integrated output clamping and level-shift capability, designed for high-accuracy signal conditioning in data acquisition systems. It delivers 60µV max input offset voltage, 80dB min DC CMRR at G = 0.2, 4MHz –3dB bandwidth (G = 0.2), and operates from ±2.375V to ±17.5V supplies across –40°C to 85°C. It enables ±10V bridge or thermocouple inputs to be safely funneled into 5V ADC input ranges.
For engineers reviewing the LT6372IMSE-0.2#TRPBF datasheet, LT6372IMSE-0.2#TRPBF pinout, LT6372IMSE-0.2#TRPBF application, or LT6372IMSE-0.2#TRPBF equivalent, this page provides verified DC precision specs, MSOP-16 pin mapping, gain-programmable funneling architecture, and real-world transducer interface use cases - all validated against Analog Devices' official Rev. 0 datasheet.
Technical Context
The LT6372IMSE-0.2#TRPBF implements a laser-trimmed, three-op-amp instrumentation topology on a proprietary bipolar process, enabling ultra-low drift (0.6µV/°C input offset drift) and long-term stability. Its split-reference configuration allows precise output level shifting via REF1/REF2 pins, decoupling ADC reference alignment from signal path design.
Integrated EMI filtering on both inputs maintains accuracy under RF interference, while dedicated CLHI/CLLO clamp terminals provide programmable output voltage limits-typically clamping within ±0.55V of applied clamp voltages-protecting downstream ADCs without external diodes or resistors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Range | G = 0.2 to >200 via single external resistor RG; enables flexible scaling without gain-switching circuitry |
| Input Offset Voltage | 60µV max (–40°C to 85°C); reduces calibration burden for sub-mV-level sensor signals |
| DC CMRR | 80dB min at G = 0.2; rejects common-mode noise from unshielded industrial wiring |
| Bandwidth | 4MHz at G = 0.2; supports fast transient capture in strain gauge or vibration monitoring |
| Supply Range | ±2.375V to ±17.5V (4.75V to 35V total); accommodates legacy ±15V rails and low-voltage battery systems |
| Output Clamp Accuracy | CLLO clamp: –0.45V to –0.74V below CLLO voltage; CLHI clamp: +0.45V to +0.755V above CLHI voltage |
| Input Bias Current | 800pA max (–40°C to 85°C); preserves signal integrity with high-impedance sources like piezoelectric sensors |
Pinout & Package
LT6372IMSE-0.2#TRPBF is packaged in a 16-lead plastic MSOP (MS16E) with exposed pad (Pin 17), rated θJA = 35°C/W. The exposed pad must float or connect to V+ (Pin 12) - not ground - per Analog Devices' thermal and electrical requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| –RG,F (Pin 1) | High-fidelity negative gain-set node | Separate routing from –RG,S minimizes PCB trace resistance errors in precision gain setting |
| –RG,S (Pin 2) | Stable negative gain-set node | Paired with –RG,F to form Kelvin connection for RG; critical for <0.012% gain error at G = 0.2 |
| –IN (Pin 4) | Negative differential input | High-impedance (>225GΩ) terminal for balanced sensor connections; immune to leakage-induced offset |
| +IN (Pin 5) | Positive differential input | Matched to –IN for >80dB CMRR; supports input common-mode range from V– + 1.8V to V+ – 1.4V |
| CLLO (Pin 7) | Low-side output clamp control | Defines lower output limit; sinking 1µA enables robust clamping without external components |
| V– (Pin 8) | Negative supply rail | Requires local 0.1µF bypass capacitor; shared return for internal EMI filters and clamp circuitry |
| CLHI (Pin 9) | High-side output clamp control | Defines upper output limit; sourcing 1µA ensures predictable 0.45–0.755V clamp headroom |
| REF1 (Pin 10) | Reference voltage input 1 | Forms level-shifted output bias with REF2; 14kΩ input resistance enables direct DAC or voltage divider drive |
| OUTPUT (Pin 11) | Differential-to-single-ended output | Drives 4kΩ loads with ±14.4V swing (±15V supplies); includes short-circuit protection up to 55mA |
| V+ (Pin 12) | Positive supply rail | Requires local 0.1µF bypass capacitor; exposed pad must tie to V+ for optimal thermal performance |
| REF2 (Pin 13) | Reference voltage input 2 | Completes split-reference architecture; enables output centering at mid-ADC range (e.g., 2.5V for 0–5V ADC) |
| +RG,S (Pin 15) | Stable positive gain-set node | Paired with +RG,F for Kelvin RG connection; ensures matched current paths in preamp stage |
| +RG,F (Pin 16) | High-fidelity positive gain-set node | Minimizes gain error contribution from package/PCB parasitics at high gains (G > 100) |
Key Features
| Feature | Design Value |
|---|---|
| Integrated output clamping | Eliminates need for external Schottky diodes and series resistors, reducing BOM count and layout area by ≥3 components |
| Split-reference level shift | Allows output DC bias to be set independently of supply rails using REF1/REF2, simplifying interface to ratiometric ADCs |
| Laser-trimmed gain-setting resistors | R1/R2 trimmed to 12.1kΩ absolute value enables 0.15% gain accuracy at G = 100 with only one external RG |
| On-chip EMI filtering | Preserves 80dB CMRR in noisy industrial environments (e.g., motor drives, PLC cabinets) without added RC networks |
| Self-adjusting bandwidth | Bandwidth scales with gain (4MHz at G = 0.2, 15kHz at G = 200), maintaining consistent settling time vs. gain selection |
Applications
| Bridge Amplifier | Thermocouple Amplifier |
|---|---|
Use Scenario: Amplifying mV-level differential output from full-bridge load cells in weigh scales or structural health monitoring. IC Role / Device Role / Timing Role: Precision funneling instrumentation amplifier with gain programmability and output clamping. Use Value: 60µV offset and 0.6µV/°C drift enable <10ppm linearity over temperature without recalibration; CLHI/CLLO protect 24-bit sigma-delta ADCs from overvoltage. |
Use Scenario: Conditioning Type-K thermocouple outputs (–5mV to +60mV) with cold-junction compensation. IC Role / Device Role / Timing Role: High-impedance, low-drift instrumentation amplifier with programmable gain and level shift. Use Value: 800pA input bias prevents thermocouple wire self-heating errors; REF1/REF2 allow output centered at 2.5V for 0–5V ADC full-scale utilization. |
| Strain Gauge Amplifier | Medical Instrumentation |
Use Scenario: Signal conditioning for quarter-bridge strain gauges in torque sensors or pressure transducers. IC Role / Device Role / Timing Role: Low-noise, high-CMRR instrumentation amplifier with integrated clamping. Use Value: 0.2µVP-P (0.1Hz–10Hz) noise and 4MHz bandwidth support high-resolution static/dynamic strain measurement; EMI filtering suppresses switching noise from nearby DC-DC converters. |
Use Scenario: Front-end amplification for ECG or EEG biopotential signals requiring high common-mode rejection and safety isolation. IC Role / Device Role / Timing Role: Precision instrumentation amplifier with output clamping for patient-connected analog front-ends. Use Value: 80dB DC CMRR rejects 50/60Hz mains interference; CLLO/CLHI limit output to safe levels (<±5V) during defibrillation pulses or electrode disconnect events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8421ARMZ | No integrated output clamping or REF-based level shift; requires external components for ADC protection and biasing | Suitable for fixed-gain, high-speed applications (10MHz BW) but adds design complexity for clamped, level-shifted ADC interfaces | Select when maximum bandwidth (10MHz) and lowest noise (1.2nV/√Hz) outweigh need for integrated clamping/level shift |
| INA826AIDR | Lower precision: 125µV max offset, 0.8µV/°C drift; no CLHI/CLLO pins; limited supply range (2.7V–36V) | Cost-optimized for general-purpose industrial DAQ where ±100µV offset is acceptable and external clamping is feasible | Select for cost-sensitive, non-critical measurements where 60µV offset and 0.6µV/°C drift are not required |
Compared with AD8421ARMZ and INA826AIDR, the LT6372IMSE-0.2#TRPBF uniquely integrates output clamping and split-reference level shifting in a single MSOP-16 package - eliminating four external components while delivering superior DC precision (60µV offset, 0.6µV/°C drift) for demanding transducer interfaces.
Availability
LT6372IMSE-0.2#TRPBF is available at Aetrix Electronics and suitable for bridge amplifier designs, thermocouple signal chains, strain gauge interfaces, medical biopotential front-ends, and industrial data acquisition systems requiring stable component supply and guaranteed long-term availability.
Supply support for LT6372IMSE-0.2#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The LT6372 product line was developed to address precision signal conditioning challenges in high-resolution data acquisition, specifically targeting transducer interfaces that demand ultra-low offset, drift, and integrated protection features - all in compact packages.
FAQ
What is the maximum gain achievable with LT6372IMSE-0.2#TRPBF?
The LT6372IMSE-0.2#TRPBF supports a gain range of G = 0.2 to >200 using a single external resistor RG. Gains above 200 are possible but not specified due to increasing sensitivity to PCB and package lead resistance errors. For production designs, Analog Devices specifies performance up to G = 200 with guaranteed 0.53% max gain error and 35ppm/°C gain drift.
Does LT6372IMSE-0.2#TRPBF require external clamping components?
No. The LT6372IMSE-0.2#TRPBF integrates dedicated CLHI and CLLO pins that directly control output voltage limits without external diodes or resistors. When CLHI is set to 4.1V and CLLO to 0V, the output clamps to approximately 4.65V (CLHI + 0.55V) and –0.45V (CLLO – 0.45V), protecting downstream ADCs while maintaining signal fidelity.
How does the split-reference architecture of LT6372IMSE-0.2#TRPBF simplify ADC interfacing?
The LT6372IMSE-0.2#TRPBF uses REF1 and REF2 pins to define output DC bias independently of supply rails. By setting REF1 = 0V and REF2 = 5V, the output centers at 2.5V - ideal for driving 0–5V ADCs. This eliminates level-shifting op amps or resistor dividers, reduces component count, and avoids introducing additional offset or drift into the signal path.
What is the operating temperature range for LT6372IMSE-0.2#TRPBF?
The LT6372IMSE-0.2#TRPBF is specified for operation from –40°C to +85°C (I-grade). This range is confirmed in the Order Information table and Electrical Characteristics section of the datasheet, covering most industrial and commercial applications. The H-grade variant (LT6372HMSE-0.2#TRPBF) extends to –40°C to +125°C.
Can LT6372IMSE-0.2#TRPBF operate from a single 5V supply?
Yes. The LT6372IMSE-0.2#TRPBF supports total supply voltages from 4.75V to 35V, including single-supply configurations. With V+ = 5V and V– = 0V, it delivers rail-to-rail output swing (e.g., 0.5V to 4.5V into 10kΩ) and maintains 60µV max input offset. However, CLHI/CLLO and REF pins must remain within V– + 2V to V+ – 2.5V to ensure proper clamp and level-shift functionality.
LT6372IMSE-0.2#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TFSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 3.5V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 4 MHz
- Current - Input Bias:
- 100 pA
- Voltage - Input Offset:
- 15 µV
- Current - Supply:
- 2.75mA
- Current - Output / Channel:
- 55 mA
- Voltage - Supply Span (Min):
- 4.75 V
- Voltage - Supply Span (Max):
- 35 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-MSOP-EP
LT6372IMSE-0.2#TRPBF FAQ
1.How can I place an order for LT6372IMSE-0.2#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT6372IMSE-0.2#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT6372IMSE-0.2#TRPBF reliable?
The price and inventory of LT6372IMSE-0.2#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT6372IMSE-0.2#TRPBF is usually 5 days.
3.What payment methods are accepted for LT6372IMSE-0.2#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT6372IMSE-0.2#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT6372IMSE-0.2#TRPBF?
LT6372IMSE-0.2#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT6372IMSE-0.2#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT6372IMSE-0.2#TRPBF?
For technical support, including LT6372IMSE-0.2#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT6372IMSE-0.2#TRPBF requirements.
6.How does Aetrix verify that LT6372IMSE-0.2#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT6372IMSE-0.2#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT6372IMSE-0.2#TRPBF meets industry standards.
7.What is the process for return or replacement of LT6372IMSE-0.2#TRPBF?
All LT6372IMSE-0.2#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT6372IMSE-0.2#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT6372IMSE-0.2#TRPBF part is unused and in its original packaging.
Return procedure for LT6372IMSE-0.2#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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