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Analog Devices Inc. LT6372IUDC-1#TRPBF
- Part No.:
- LT6372IUDC-1#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LT6372IUDC-1#TRPBF.pdf
- Description:
- IC INST AMP 1 CIRCUIT 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,625
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Product details
Overview
LT6372IUDC-1#TRPBF from Analog Devices is a precision instrumentation amplifier with integrated output clamping and programmable gain (G = 1 to >1000) via external resistor. It delivers 60µV max input offset voltage, 86dB min DC CMRR at G = 1, and 3.1MHz –3dB bandwidth at unity gain-enabling high-fidelity bridge and thermocouple signal conditioning for industrial data acquisition systems interfacing to 16-bit ADCs like LTC2367-16.
For engineers reviewing the LT6372IUDC-1#TRPBF datasheet, LT6372IUDC-1#TRPBF pinout, LT6372IUDC-1#TRPBF application, or LT6372IUDC-1#TRPBF equivalent, key selection criteria include its split-reference level-shift architecture, ±0.6µV/°C input offset drift, integrated RFI filtering on inputs, and dual clamp pins (CLLO/CLHI) enabling direct ADC input protection without external diodes or resistors.
Technical Context
The LT6372IUDC-1#TRPBF implements an enhanced three-op-amp topology with laser-trimmed 12.1kΩ internal resistors (R1/R2), enabling accurate gain setting via single external RG with G = 1 + 24.2kΩ/RG. Its proprietary bipolar process ensures exceptional long-term stability and low thermal hysteresis (±3µV input offset hysteresis over –40°C to 125°C).
It features a split-reference difference amplifier stage that references output to the average of REF1 and REF2, allowing precise level shifting to match ADC mid-scale (e.g., VREF/2). Integrated EMI filtering on both inputs maintains DC precision in harsh RF environments, while CLLO and CLHI pins provide programmable output voltage limits with typical clamp offsets of –0.57V and +0.45V respectively.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Range | G = 1 to >1000 set by single external resistor; enables flexible sensor interface scaling without multiple op-amps |
| Input Offset Voltage | 60µV max (–40°C to 85°C); reduces calibration burden for µV-level bridge signals |
| CMRR | 86dB min at G = 1 (DC–60Hz); rejects common-mode noise from long sensor leads |
| Bandwidth | 3.1MHz at G = 1; supports fast transient response in dynamic strain gauge monitoring |
| Supply Range | 4.75V to 35V dual supply; accommodates industrial ±15V rails and low-voltage 5V systems |
| Output Clamp Accuracy | CLLO clamp: –0.57V typical (VOUT – VCLLO); CLHI clamp: +0.45V typical (VOUT – VCLHI); protects ADC inputs within ±0.75V tolerance |
| Input Noise Density | 7nV/√Hz at 1kHz; preserves SNR in low-amplitude transducer applications |
Pinout & Package
The LT6372IUDC-1#TRPBF is housed in a 20-lead 3mm × 4mm plastic QFN package (UDC) with exposed pad connected to V– (Pin 7). Thermal resistance θJA = 52°C/W. Pin numbering follows top-view orientation with Pin 1 at top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| –RG,F (Pin 19) | High-side negative gain resistor feed | Separate routing path from –RG,S minimizes PCB trace resistance error in high-precision gain setting |
| –RG,S (Pin 20) | Low-side negative gain resistor feed | Paired with –RG,F to form Kelvin connection for RG; critical for <0.01% gain error at G = 1 |
| –IN (Pin 2) | Negative differential input | High-impedance (>225GΩ) node; accepts signals from Wheatstone bridges or thermocouples without loading |
| +IN (Pin 5) | Positive differential input | Matched to –IN for <1.5nA input offset current; enables true differential sensing |
| CLLO (Pin 8) | Lower output clamp reference | Sets absolute lower limit of output swing; must be driven-not floated-to enable clamping function |
| V– (Pin 7) | Negative power supply | Exposed pad internally tied to V–; requires low-ESR bypass capacitor to ground for stability |
| CLHI (Pin 10) | Upper output clamp reference | Defines maximum safe output voltage; used with CLLO to bound ADC input range |
| REF1 / REF2 (Pins 12, 15) | Split reference inputs | Form voltage divider to level-shift output to VREF/2; eliminates need for external bias network |
| OUTPUT (Pin 13) | Amplified, level-shifted, clamped output | Single-ended output referenced to REF1/REF2 average; drives ADC directly with rail-to-rail capability |
| +RG,S / +RG,F (Pins 17, 18) | Positive gain resistor feeds | Complete Kelvin connection for RG; all four RG terminals required for guaranteed 35ppm/°C gain drift |
Key Features
| Feature | Design Value |
|---|---|
| Integrated output clamping | CLLO/CLHI pins allow programmable output voltage limits without external components-reducing BOM count and layout area for ADC protection |
| Split-reference level shift | REF1/REF2 inputs enable precise output centering at VREF/2 for unipolar ADCs-eliminating external op-amp bias networks |
| Laser-trimmed gain resistors | R1/R2 trimmed to 12.1kΩ ±0.12% ensures accurate gain setting with single RG-no calibration needed for G = 100 |
| On-chip RFI filtering | Integrated input filters maintain DC precision in noisy industrial environments (e.g., motor drives, PLC cabinets) without external RC networks |
| Low input bias current | 800pA max (–40°C to 85°C) enables high-impedance sensor interfaces (e.g., pH electrodes, piezoresistive sensors) without signal degradation |
Applications
| Bridge Amplifier | Data Acquisition |
|---|---|
Use Scenario: Amplifying mV-level differential output from full-bridge load cells in weigh scales or structural health monitoring. IC Role / Device Role / Timing Role: Precision instrumentation amplifier providing gain, common-mode rejection, and output clamping before 16-bit SAR ADC. Use Value: 60µV offset and 86dB CMRR ensure sub-0.01% linearity over temperature-critical for NIST-traceable metrology. | Use Scenario: Signal conditioning front-end for multi-channel industrial DAQ systems sampling thermocouples, RTDs, and strain gauges. IC Role / Device Role / Timing Role: Programmable-gain, level-shifted amplifier driving LTC2367-16 ADC with integrated clamping to prevent overvoltage damage. Use Value: Single-supply-compatible REF1/REF2 interface simplifies system-level level-shifting-reducing component count vs. discrete op-amp solutions. |
| Thermocouple Amplifier | Medical Instrumentation |
Use Scenario: Cold-junction compensated amplification of Type K thermocouple outputs in furnace controllers or environmental test chambers. IC Role / Device Role / Timing Role: High-impedance, low-drift amplifier with integrated RFI filtering rejecting EMI from nearby switching power supplies. Use Value: ±0.6µV/°C input offset drift ensures <1°C error over –40°C to 85°C operating range-meeting IEC 61000-4-3 immunity requirements. | Use Scenario: Biopotential signal conditioning in portable ECG or EEG monitors requiring ultra-low noise and DC accuracy. IC Role / Device Role / Timing Role: Low-noise (7nV/√Hz), low-input-bias amplifier with output clamping protecting downstream ADC from electrode pop artifacts. Use Value: 0.2µVP-P 0.1Hz–10Hz noise enables detection of µV-level cardiac depolarization signals without additional filtering stages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8421ARMZ | Fixed G = 10, 20, 50, or 100; no external RG; 150µV max offset; 2.2MHz BW at G = 10 | Lacks programmable gain and output clamping; requires external level-shift circuitry for ADC interfacing | Select when fixed gain suffices and board space permits discrete clamp diodes |
| INA826AIDGKR | G = 1–1000 via single RG; 125µV max offset; 1.5MHz BW at G = 1; no integrated clamping or level-shift | Requires external REF buffer and clamp diodes; higher offset increases calibration overhead | Select for cost-sensitive designs where external components are acceptable |
Compared with AD8421ARMZ and INA826AIDGKR, the LT6372IUDC-1#TRPBF uniquely integrates output clamping, split-reference level shifting, and laser-trimmed gain resistors-reducing total solution size by up to 40% and eliminating three external components typically needed for ADC protection and biasing.
Availability
LT6372IUDC-1#TRPBF is available at Aetrix Electronics and suitable for industrial data acquisition, medical instrumentation, and precision sensor interface applications requiring stable component supply across extended temperature ranges (–40°C to 85°C).
Supply support for LT6372IUDC-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LT6372 product line was designed specifically for high-accuracy sensor signal conditioning in harsh environments-emphasizing low drift, integrated protection, and simplified ADC interfacing without sacrificing bandwidth or noise performance.
FAQ
What is the maximum guaranteed gain error for LT6372IUDC-1#TRPBF at G = 1?
The LT6372IUDC-1#TRPBF has a maximum guaranteed gain error of 0.01% at G = 1 over the –40°C to 85°C temperature range. This specification is achieved through laser trimming of internal 12.1kΩ resistors and applies with proper Kelvin routing of the external gain-setting resistor RG. The LT6372IUDC-1#TRPBF datasheet confirms this value under "Electrical Characteristics" with Note 4 stating it excludes external resistor tolerance effects.
How does the LT6372IUDC-1#TRPBF implement output level shifting without external components?
The LT6372IUDC-1#TRPBF uses a split-reference architecture with dedicated REF1 and REF2 pins. The output voltage is referenced to the average of these two pins, enabling direct level shifting to VREF/2 by connecting REF1 to ground and REF2 to the ADC's reference voltage. This eliminates the need for external op-amps or resistor dividers. The LT6372IUDC-1#TRPBF datasheet Figure TA01a demonstrates this configuration driving the LTC2367-16 ADC.
What are the absolute maximum voltage ratings for the CLLO and CLHI pins on LT6372IUDC-1#TRPBF?
The CLLO and CLHI pins on the LT6372IUDC-1#TRPBF have absolute maximum ratings of (V– – 0.3V) to (V+ + 0.3V), per the Absolute Maximum Ratings table. Their functional operating ranges are narrower: CLLO operates between V– + 3V and V+ – 2V, while CLHI operates between V– + 2V and V+ – 2.5V. Exceeding these ranges disables clamping. These values are specified in the "Electrical Characteristics" section under CLLO/CLHI Input Operating Voltage Range.
Can the LT6372IUDC-1#TRPBF operate from a single 5V supply?
Yes, the LT6372IUDC-1#TRPBF supports single-supply operation down to 4.75V total supply voltage (e.g., V+ = 5V, V– = 0V). However, output swing is reduced: at VS = 5V and RL = 10kΩ, the guaranteed output voltage swing is –2.0V to +1.6V. Input common-mode range becomes limited to V– + 1.8V to V+ – 1.4V. These specifications are confirmed in the "Electrical Characteristics" table under VCM and VOUT parameters for VS = ±2.375V (i.e., 4.75V total).
What is the purpose of the four separate RG pins (–RG,F, –RG,S, +RG,F, +RG,S) on LT6372IUDC-1#TRPBF?
The four RG pins on the LT6372IUDC-1#TRPBF enable a Kelvin connection to the external gain-setting resistor RG, minimizing errors from PCB trace resistance and solder joint variations. –RG,F and +RG,F connect to one end of RG, while –RG,S and +RG,S connect to the other end-forming two independent current paths. This configuration ensures the programmed gain remains accurate even with milliohm-level parasitic resistances, as detailed in the "Pin Functions" section of the LT6372IUDC-1#TRPBF datasheet.
LT6372IUDC-1#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 11V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 3.1 MHz
- Current - Input Bias:
- 100 pA
- Voltage - Input Offset:
- 10 µV
- Current - Supply:
- 2.75mA
- Current - Output / Channel:
- 55 mA
- Voltage - Supply Span (Min):
- 4.75 V
- Voltage - Supply Span (Max):
- 35 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x4)
LT6372IUDC-1#TRPBF FAQ
1.How can I place an order for LT6372IUDC-1#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT6372IUDC-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT6372IUDC-1#TRPBF reliable?
The price and inventory of LT6372IUDC-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT6372IUDC-1#TRPBF is usually 5 days.
3.What payment methods are accepted for LT6372IUDC-1#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT6372IUDC-1#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT6372IUDC-1#TRPBF?
LT6372IUDC-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT6372IUDC-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT6372IUDC-1#TRPBF?
For technical support, including LT6372IUDC-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT6372IUDC-1#TRPBF requirements.
6.How does Aetrix verify that LT6372IUDC-1#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT6372IUDC-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT6372IUDC-1#TRPBF meets industry standards.
7.What is the process for return or replacement of LT6372IUDC-1#TRPBF?
All LT6372IUDC-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT6372IUDC-1#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT6372IUDC-1#TRPBF part is unused and in its original packaging.
Return procedure for LT6372IUDC-1#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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