Analog Devices Inc. LT6402IUD-12#PBF
- Part No.:
- LT6402IUD-12#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Amplifiers
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
LT6402IUD-12#PBF.pdf
- Description:
- IC OPAMP DIFF 2 CIRCUIT 16QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT6402IUD-12#PBF from Analog Devices (formerly Linear Technology) is a 300MHz fixed-gain (12dB) differential amplifier and ADC driver optimized for high-speed data acquisition systems. It features dual output paths - unfiltered (+OUT/–OUT) and integrated 75MHz low-pass filtered outputs (+OUTFILTERED/–OUTFILTERED) - with adjustable output common-mode voltage via VOCM pin, enabling direct DC-coupled interfacing to 12-/14-bit ADCs such as the LTC2249 in communications IF sampling receivers.
For engineers reviewing the LT6402IUD-12#PBF datasheet, LT6402IUD-12#PBF pinout, LT6402IUD-12#PBF application, or LT6402IUD-12#PBF equivalent, key selection criteria include its 300MHz –3dB bandwidth, 2.6nV/√Hz input-referred noise at 20MHz, –82dBc HD3 distortion at 20MHz, 100Ω differential input impedance, and QFN-16 (3mm × 3mm) package with exposed thermal pad tied to VEEC.
Technical Context
The LT6402IUD-12#PBF employs a closed-loop triple-amplifier topology: two matched gain stages (A/B) drive differential outputs, while a third amplifier controls output common-mode voltage. Its fixed 12dB gain (4V/V) is independent of load due to low output impedance (~0.3Ω unfiltered, 50Ω filtered), and internal 200Ω feedback resistors set precise 100Ω differential input impedance.
It integrates a user-configurable on-die filter: +OUTFILTERED/–OUTFILTERED pins embed a 50Ω series resistor and three 14pF capacitors (14pF-to-VEE per pin + 14pF differential), yielding a nominal 75MHz –3dB lowpass response. The VOCM pin offers 200MHz small-signal bandwidth and sets output common mode from 1.2V to 3.4V, supporting direct interface to ADC reference voltages without transformers or AC-coupling caps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| –3dB Bandwidth | 300MHz (unfiltered outputs); enables baseband-to-IF signal conditioning up to UHF band |
| Fixed Gain | 12dB (4V/V, ±0.4dB tolerance); eliminates external gain-setting components and ensures stable performance across temperature |
| Input-Referred Noise | 2.6nV/√Hz at 20MHz; supports high-resolution digitization of low-amplitude signals without SNR degradation |
| Harmonic Distortion | –82dBc HD3 at 20MHz, 2VP-P; meets SFDR requirements for 14-bit ADC drivers in LTE/WiMAX receivers |
| Differential Input Impedance | 100Ω (matched, frequency-stable); simplifies single-ended-to-differential conversion with minimal external matching |
| Output Common-Mode Range | 1.2V to 3.4V (adjustable via VOCM pin); aligns directly with common ADC reference voltages (e.g., LTC22xx VCM = 1.65V) |
| Supply Current | 30mA typical at 5V; enables low-power operation in battery-backed or thermally constrained systems |
Pinout & Package
The LT6402IUD-12#PBF is housed in a 16-lead 3mm × 3mm plastic QFN (UD package) with 0.75mm profile and exposed thermal pad (Pin 17) that must be soldered to PCB and connected to VEEC (Pin 12).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +INA / +INB (Pins 15, 16) | Positive differential input pair | Internally tied; accepts DC- or AC-coupled signals; self-biases to VOCM voltage when AC-coupled |
| –INA / –INB (Pins 14, 13) | Negative differential input pair | Internally tied; symmetric to +INA/+INB; enables true differential or single-ended input operation |
| VOCM (Pin 2) | Output common-mode control input | High-impedance node setting average DC level of +OUT/–OUT; bandwidth ~200MHz; requires 0.1μF bypass |
| +OUT / –OUT (Pins 5, 8) | Unfiltered differential outputs | Low-impedance (<0.3Ω), 300MHz bandwidth; require 10–25Ω series isolation when driving ADC inputs |
| +OUTFILTERED / –OUTFILTERED (Pins 6, 7) | Integrated 75MHz lowpass filtered outputs | 50Ω source impedance; includes internal RC network (50Ω + 42pF equiv.); reduces external anti-aliasing component count |
| ENABLE (Pin 11) | Power-down control | TTL-compatible input; <0.8V enables (30mA ICC), >2V disables (250μA ICC) |
| VCCA/VCCB/VCCC (Pins 3, 10, 1) | Positive supply rails | All must be tied to same 4–5.5V rail; each requires local 0.1μF + 1000pF bypass |
| VEEA/VEEB/VEEC (Pins 4, 9, 12) | Negative supply rails | All must be tied to same ground or negative rail; exposed pad (Pin 17) connects to VEEC |
Key Features
| Feature | Design Value |
|---|---|
| Dual-output architecture | Simultaneous access to full-bandwidth (+OUT/–OUT) and anti-aliased (+OUTFILTERED/–OUTFILTERED) signals eliminates need for external filter redesign |
| Adjustable VOCM interface | Enables direct coupling to ADCs with varying reference voltages (e.g., 1.65V for 3V ADCs, 2.5V for 5V ADCs) without level-shifting circuitry |
| Minimal external components | Requires only power-supply bypass caps (0.1μF + 1000pF per VCC/VEE pin); no transformers, termination resistors, or AC-coupling caps needed for DC-coupled operation |
| Single-ended input compatibility | Maintains –82dBc HD3 and 2.6nV/√Hz noise when driven single-ended, removing need for baluns in cost-sensitive RF front-ends |
| Thermally enhanced QFN | 3mm × 3mm footprint with exposed pad (θJA = 68°C/W) supports sustained 300MHz operation in compact industrial and telecom modules |
Applications
| Communications IF Sampling Receiver | High-Speed Data Acquisition System |
|---|---|
Use Scenario: Digitizing 10–25MHz IF signals from SAW-filtered radio front-ends in LTE base stations or spectrum analyzers. IC Role / Device Role / Timing Role: Differential ADC driver providing gain, filtering, and common-mode level translation between SAW output and LTC2249 14-bit ADC. Use Value: Integrated 75MHz filter on +OUTFILTERED/–OUTFILTERED pins replaces discrete RC networks, reducing BOM count by 4 components while maintaining –91.5dBc IMD at 10MHz. | Use Scenario: Capturing DC–20MHz sensor waveforms (e.g., ultrasound transducers, precision instrumentation) with 14-bit resolution. IC Role / Device Role / Timing Role: Low-noise, low-distortion gain block converting single-ended sensor output to differential format for ADC input. Use Value: 2.6nV/√Hz input noise and –82dBc HD3 ensure >78dB SNR and >90dB SFDR at 20MHz, meeting IEEE 1057 Class A calibration requirements. |
| SAW Filter Interfacing/Buffering | Level-Shifting Interface for Mixed-Voltage ADCs |
Use Scenario: Driving 50Ω differential SAW filters in GPS/GNSS front-ends where impedance matching and phase linearity are critical. IC Role / Device Role / Timing Role: High-Z buffer and impedance transformer between low-output-impedance DAC and SAW filter input. Use Value: 100Ω differential input impedance matches standard SAW filter ports; 0.3Ω output impedance prevents passband ripple caused by source mismatch. | Use Scenario: Interfacing LT6402IUD-12#PBF (5V supply) to 3V ADCs (e.g., LTC2255) requiring 1.8V common-mode input. IC Role / Device Role / Timing Role: Precision common-mode voltage translator using VOCM pin as programmable reference. Use Value: VOCM range (1.2–3.4V) allows direct connection to ADC's VCM pin or simple resistor-divider biasing, eliminating dedicated level-shift ICs and associated propagation delay. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar differential ADC driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADL5562ACPZ-R7 | Higher bandwidth (4.3GHz), higher noise (3.3nV/√Hz), no integrated filter, 5V-only supply | Better suited for >100MHz IF/RF sampling; lacks on-chip filtering and VOCM flexibility | Select when ultra-wideband gain staging is required and external filtering is acceptable |
| THS4561IRGET | Lower power (18mA), lower bandwidth (1.8GHz), no filtered outputs, VOCM range limited to 0.5–3.5V | Optimized for portable instrumentation; missing integrated 75MHz filter and precise 100Ω input match | Select for battery-powered systems where power efficiency outweighs filter integration needs |
Compared with ADL5562ACPZ-R7 and THS4561IRGET, the LT6402IUD-12#PBF uniquely combines 300MHz bandwidth, integrated 75MHz filtering, 100Ω input impedance, and wide VOCM adjustability - making it the optimal choice for space-constrained, high-SFDR IF receiver designs requiring minimal external components.
Availability
LT6402IUD-12#PBF is available at Aetrix Electronics and suitable for communications infrastructure, test equipment, and medical imaging systems requiring stable component supply, extended temperature operation (–40°C to 85°C), and long-term production continuity.
Supply support for LT6402IUD-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LT6402 family was developed by Linear Technology (acquired by ADI in 2017) specifically for high-fidelity, low-component-count ADC driving in DC–300MHz signal chains - emphasizing noise, distortion, and layout simplicity over raw bandwidth.
FAQ
What is the operating temperature range for the LT6402IUD-12#PBF?
The LT6402IUD-12#PBF is specified for continuous operation from –40°C to +85°C. This industrial-grade temperature range is guaranteed per datasheet Note 4, with full electrical performance validated across the entire span - unlike the commercial-grade LT6402CUD-12#PBF, which is only tested from 0°C to 70°C.
Can the LT6402IUD-12#PBF drive ADCs without external AC-coupling capacitors?
Yes, the LT6402IUD-12#PBF supports true DC-coupled operation. Its VOCM pin allows precise setting of output common-mode voltage (1.2V–3.4V), and its inputs accept DC-biased signals - eliminating the need for AC-coupling capacitors or transformers when interfacing with ADCs like the LTC2249 that accept DC-coupled differential inputs.
How does the integrated filter on the LT6402IUD-12#PBF work, and can its cutoff frequency be modified?
The LT6402IUD-12#PBF's internal filter on +OUTFILTERED/–OUTFILTERED pins uses a 50Ω series resistor and 42pF equivalent shunt capacitance (three 14pF caps) to achieve a nominal 75MHz –3dB point. Cutoff frequency can be increased by adding parallel resistors (e.g., 50Ω external resistors double bandwidth to 150MHz) or decreased by adding shunt capacitors (e.g., 42pF to ground halves bandwidth to 37.5MHz).
What is the recommended power supply bypassing scheme for the LT6402IUD-12#PBF?
Each VCC (Pins 1, 3, 10) and VEE (Pins 4, 9, 12) pin requires local bypassing with a 0.1μF ceramic capacitor (X7R, 0603) placed within 2mm of the pin, plus a 1000pF capacitor in parallel. The VOCM pin (Pin 2) also requires a 0.1μF capacitor to ground for optimal distortion performance and noise rejection.
Does the LT6402IUD-12#PBF support single-ended input operation, and how does performance compare to differential input?
Yes, the LT6402IUD-12#PBF delivers nearly identical performance with single-ended inputs: at 20MHz, HD3 is –82dBc (vs –83dBc differential) and input noise remains 2.6nV/√Hz. This is enabled by its internal topology, which avoids common-mode amplifier limitations - allowing direct replacement of baluns in cost-sensitive applications without SNR or SFDR penalty.
LT6402IUD-12#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Differential
- Applications:
- Driver
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-QFN (3x3)
LT6402IUD-12#PBF FAQ
1.How can I place an order for LT6402IUD-12#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT6402IUD-12#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT6402IUD-12#PBF reliable?
The price and inventory of LT6402IUD-12#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT6402IUD-12#PBF is usually 5 days.
3.What payment methods are accepted for LT6402IUD-12#PBF?
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4.How is shipping managed for LT6402IUD-12#PBF?
LT6402IUD-12#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT6402IUD-12#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT6402IUD-12#PBF?
For technical support, including LT6402IUD-12#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT6402IUD-12#PBF requirements.
6.How does Aetrix verify that LT6402IUD-12#PBF is sourced from the original manufacturer or authorized distributors?
All LT6402IUD-12#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT6402IUD-12#PBF meets industry standards.
7.What is the process for return or replacement of LT6402IUD-12#PBF?
All LT6402IUD-12#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT6402IUD-12#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT6402IUD-12#PBF part is unused and in its original packaging.
Return procedure for LT6402IUD-12#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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