Analog Devices Inc. LT8362EDD#TRPBF

Overview

LT8362EDD#TRPBF from Analog Devices is a current-mode DC/DC converter IC with a 60V, 2A internal power switch, operating from 2.8V to 60V input. It supports boost, SEPIC, and inverting topologies via a single FBX feedback pin, delivers 48V output at 700mA (VIN=24V), and achieves ultralow 9µA quiescent current in Burst Mode for battery-powered medical diagnostics and portable electronics.

For engineers reviewing the LT8362EDD#TRPBF datasheet, LT8362EDD#TRPBF pinout, LT8362EDD#TRPBF application, or LT8362EDD#TRPBF equivalent, key selection factors include its programmable 300kHz–2MHz switching frequency, SYNC/MODE pin configurable operation modes (Burst, pulse-skip, SSFM), BIAS pin for efficiency optimization, and thermally enhanced 10-lead 3mm × 3mm DFN package with exposed PGND/GND pad.

Technical Context

The LT8362EDD#TRPBF implements fixed-frequency current-mode control with external RT resistor programming and dual-path error amplification-A1 active for positive-output (FBX = +1.6V reference) and A2 for negative-output (FBX = –0.8V reference) configurations. Its oscillator supports synchronization to external clocks (300kHz–2MHz) and Spread Spectrum Frequency Modulation (±14–28% deviation) to reduce EMI peaks.

Protection architecture includes programmable UVLO via EN/UVLO pin (1.576V rising, 1.555V falling thresholds), thermal shutdown (>170°C), overcurrent detection (3.75A switch discharge trigger), and frequency foldback during start-up or fault. The BIAS pin enables dynamic sourcing of INTVCC (3.2V LDO) from either VIN or an auxiliary supply (4.4V ≤ BIAS ≤ VIN), reducing input current draw and improving full-load efficiency.

Key Specifications

Pinout & Package

LT8362EDD#TRPBF uses a thermally enhanced 10-lead (3mm × 3mm) plastic DFN package with exposed PGND/GND pad (Pin 11) that must be soldered to PCB ground plane for thermal and electrical performance. Pin count and layout differ from the 16-lead MSOP variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DC/DC converter applications.

Compared with LT8362EDD#TRPBF, LT8364EDD#TRPBF offers higher current headroom without layout change, while MAX20096ATPA/VY+ trades topology flexibility and EMI features for automotive qualification-neither is pin-compatible, but both address overlapping high-voltage boost use cases with distinct trade-offs in current, efficiency, and compliance scope.

Availability

LT8362EDD#TRPBF is available at Aetrix Electronics and suitable for medical diagnostic equipment, portable electronics, industrial sensor transmitters, and telecom remote units requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for LT8362EDD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and communications markets since 1965.

The LT8362EDD#TRPBF belongs to Analog Devices' Power by Linear™ family of high-voltage monolithic DC/DC converters, designed specifically for space-constrained, wide-input industrial and portable systems demanding ultralow IQ, flexible topology, and robust EMI control.

FAQ

What topology configurations does the LT8362EDD#TRPBF support?

The LT8362EDD#TRPBF supports boost, SEPIC, and inverting converter topologies using a single FBX feedback pin. Positive output voltages (e.g., 48V boost) use the +1.60V internal reference, while negative outputs (e.g., –15V) use the –0.80V reference-no external mode-select components or pin reconfiguration is needed. This flexibility is confirmed in the Applications Information section and Block Diagram of the LT8362EDD#TRPBF datasheet.

How does the BIAS pin improve efficiency in the LT8362EDD#TRPBF?

The BIAS pin on the LT8362EDD#TRPBF allows the internal 3.2V INTVCC regulator to draw current from an auxiliary supply (4.4V ≤ BIAS ≤ VIN) instead of VIN, reducing input current draw by up to 1.6mA at full load. In SEPIC applications where VOUT < VIN, connecting BIAS to VOUT cuts total input power consumption and improves full-load efficiency by ≥3%, as verified in Electrical Characteristics and Applications Information sections.

What is the minimum recommended output capacitance for stable Burst Mode operation in the LT8362EDD#TRPBF?

For stable Burst Mode operation with <15mV output ripple, the LT8362EDD#TRPBF requires ≥4.7µF low-ESR ceramic output capacitance, as shown in the Typical Application schematic (TA01a). Increasing capacitance further reduces ripple proportionally-e.g., 10µF lowers ripple to ~7mV-but minimum effective value depends on load step magnitude and acceptable transient deviation per the LT8362EDD#TRPBF's Burst Frequency vs Load Current curve (Figure F01).

Can the LT8362EDD#TRPBF be synchronized to an external clock, and what are the voltage requirements?

Yes, the LT8362EDD#TRPBF SYNC/MODE pin accepts external square-wave clocks from 300kHz to 2MHz with 20–80% duty cycle, valley <0.4V and peak >1.7V (up to 6V absolute max). When synchronized, the LT8362EDD#TRPBF disables Burst Mode and operates in pulse-skip mode aligned to the external clock-this is explicitly defined in the Pin Functions and Applications Information sections of the datasheet.

What thermal design considerations apply to the LT8362EDD#TRPBF in its 10-lead DFN package?

The LT8362EDD#TRPBF's 10-lead 3mm × 3mm DFN package requires the exposed PGND/GND pad (Pin 11) to be soldered to a continuous PCB copper ground plane to achieve θJA = 43°C/W. Without this, junction temperature rise exceeds specification limits at >0.8W dissipation. Thermal design guidance-including minimum pad size, solder stencil aperture, and via count-is provided in the Package Description and Layout Guidelines sections of the LT8362EDD#TRPBF datasheet.