Analog Devices Inc. LT8570EDD#PBF
- Part No.:
- LT8570EDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LT8570EDD#PBF.pdf
- Description:
- IC REG BOOST CUK ADJ 750MA 8DFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,279
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Product details
Overview
LT8570EDD#PBF from Analog Devices (formerly Linear Technology) is a 65V, 0.5A monolithic PWM DC/DC converter IC supporting boost, SEPIC, and inverting topologies. It features an adjustable 200kHz–1.5MHz switching frequency, integrated soft-start, synchronization capability, and user-configurable undervoltage lockout. It delivers stable bias voltage for TFT-LCD panels in industrial displays.
For engineers reviewing the LT8570EDD#PBF datasheet, LT8570EDD#PBF pinout, LT8570EDD#PBF application, or LT8570EDD#PBF equivalent, key selection criteria include its 65V switch rating, 0.5A current limit, 2.55V–40V input range, thermally enhanced 3mm × 3mm DFN package, and dual-mode feedback architecture enabling both positive and negative output configurations.
Technical Context
The LT8570EDD#PBF employs constant-frequency current-mode control with internal slope compensation to ensure stability at duty cycles >50%. Its dual-path error amplifier (A1/A2) supports both noninverting (1.204V reference) and inverting (3mV reference) feedback modes via the same FBX pin.
It integrates frequency foldback during startup (reducing fOSC to 1/6 nominal), a high-gain SHDN pin tolerant of slow-rising enable signals, and thermal shutdown at ~165°C with automatic soft-start restart upon cooling. The 0.04Ω typical VCE(SAT) switch enables high efficiency in compact layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Rating | 65V collector-emitter breakdown - supports wide-input industrial and automotive supply rails up to 40V input. |
| Current Limit | 0.5A (typical) - sets maximum peak switch current; enables ≥125mA output at 12V in boost mode with margin. |
| Input Voltage Range | 2.55V to 40V - accommodates single-cell LiFePO₄, 12V/24V systems, and unregulated adapter inputs. |
| Switching Frequency | 200kHz to 1.5MHz (adjustable via RT resistor or external SYNC clock) - allows optimization of size vs. EMI vs. efficiency. |
| Feedback Reference | 1.204V (noninverting) or 3mV (inverting) - enables single-resistor VOUT programming for both positive and negative outputs. |
| Package | 8-lead 3mm × 3mm DFN with exposed GND pad - provides low θJA = 43°C/W for high-power density without heatsink. |
| Operating Temp | –40°C to +125°C junction - qualified for extended-temperature industrial and transportation applications. |
Pinout & Package
LT8570EDD#PBF is housed in an 8-lead, 3mm × 3mm plastic DFN package with exposed GND pad (Pin 9), requiring soldering to PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FBX (Pin 1) | Configurable feedback input | Accepts either pull-up (1.204V ref) for boost/SEPIC or pull-down (3mV ref) for inverting operation - eliminates need for external op-amp. |
| VC (Pin 2) | Error amplifier output | Connects to RC network for loop compensation - determines phase margin and transient response stability. |
| VIN (Pin 3) | Main power input | Supplies internal circuitry and switch driver; requires local 0.47–1µF ceramic bypass capacitor. |
| SW (Pin 4) | Switch collector node | Drives external inductor/diode; high di/dt path - must minimize trace area to reduce EMI radiation. |
| SHDN (Pin 5) | Enable/disable control | Hysteresis of 40mV between 1.21V (falling) and 1.40V (rising) - supports resistor-divider UVLO and noise-immune sequencing. |
| RT (Pin 6) | Oscillator timing input | Resistor-to-ground sets free-running frequency; open-circuit disables internal oscillator for SYNC-only operation. |
| SS (Pin 7) | Soft-start ramp node | Charged by internal 280kΩ current source to ~2.1V; external capacitor controls startup dV/dt and inrush limiting. |
| SYNC (Pin 8) | External clock input | Accepts 0.4V–1.3V logic-level clock; drives internal oscillator when above threshold - enables EMI spread-spectrum or multi-phase sync. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-mode feedback architecture | Single FBX pin supports both noninverting (1.204V) and inverting (3mV) configurations - reduces BOM count and layout complexity for ±VOUT designs. |
| Programmable undervoltage lockout | SHDN pin accepts resistor divider to set precise turn-on threshold - enables custom brown-out protection without external supervisor IC. |
| Frequency foldback during startup | Reduces switching frequency to 1/6 nominal when FBX is between 300mV–920mV - improves controllability and limits inrush current during soft-start. |
| Thermally enhanced DFN package | Exposed GND pad lowers thermal resistance to 43°C/W - sustains full 0.5A switch current at 125°C ambient without derating. |
| Synchronization capability | SYNC pin accepts external clock with 35–65% duty cycle - allows EMI reduction via clock dithering or interleaving with other converters. |
Applications
| TFT-LCD Bias Supply | VFD Display Power |
|---|---|
|
Use Scenario: Generating +15V and –10V bias rails for active-matrix LCD panels in industrial HMIs and medical monitors. IC Role / Device Role / Timing Role: Configured as dual-output SEPIC/inverting converter; regulates both rails independently using shared switch and single IC. Use Value: Eliminates need for two separate regulators - reduces board area by >40% and component count while maintaining tight cross-regulation. |
Use Scenario: Providing isolated high-voltage anode supply (≈+30V) and grid bias (≈–15V) for vacuum fluorescent displays in automotive instrument clusters. IC Role / Device Role / Timing Role: Operated in inverting topology with coupled inductors; delivers low-ripple negative output synchronized to boost-derived positive rail. Use Value: Achieves <15mVPP output ripple without post-filtering - meets stringent display contrast and flicker requirements. |
| GPS Receiver LNA Supply | DSL Modem Line Driver |
|
Use Scenario: Generating clean +5.5V supply for low-noise RF amplifiers in GPS/GNSS modules operating from 3.3V or 5V system rails. IC Role / Device Role / Timing Role: Used in low-duty-cycle boost configuration with 1.5MHz switching; minimizes inductor size and avoids AM band interference. Use Value: Delivers <25µVRMS output noise at 100mA load - preserves GPS signal SNR and acquisition sensitivity. |
Use Scenario: Powering line-driver amplifiers in xDSL modems requiring ±12V rails from a 12V input, with fast transient response to burst data traffic. IC Role / Device Role / Timing Role: Implements dual inductor inverting topology with independent soft-start on each rail to prevent latch-up during power-up sequencing. Use Value: Supports 500mA peak current per rail with <10µs recovery from 80% load step - maintains DSL line stability during packet bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3589EUF#PBF | 4-switch buck-boost with I2C interface; 600mA, 20V max switch; no inverting mode support. | Requires digital configuration; limited to single-output buck-boost; lacks native inverting topology. | Choose for programmable VOUT, sequencing, and telemetry - not for fixed-rail inverting bias supplies. |
| LT3580EMS8E#PBF | Pin-compatible predecessor; identical 65V/0.5A switch but no SYNC pin or frequency foldback. | No external clock sync or startup foldback - less suitable for EMI-sensitive or high-inrush applications. | Valid drop-in replacement where SYNC and foldback are unused; verify thermal performance with newer layout. |
Compared with LTC3589EUF#PBF and LT3580EMS8E#PBF, the LT8570EDD#PBF uniquely combines inverting/SEPIC/boost flexibility, analog-programmable UVLO, and frequency foldback in a thermally optimized DFN - making it optimal for space-constrained analog bias generation where digital control is unnecessary.
Availability
LT8570EDD#PBF is available at Aetrix Electronics and suitable for TFT-LCD bias supplies, GPS receiver LNA power, and DSL modem line drivers requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for LT8570EDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheets, and application engineering for legacy Linear parts including the LT8570 family.
The LT8570 series was designed specifically for compact, high-voltage bias generation in display and communication equipment - emphasizing topology flexibility, analog configurability, and thermal robustness over digital control.
FAQ
What topology configurations does the LT8570EDD#PBF support?
The LT8570EDD#PBF supports three distinct DC/DC topologies: boost, SEPIC, and inverting - all using the same IC and FBX pin architecture. In boost mode, it generates positive VOUT > VIN; in SEPIC, VOUT can be higher, lower, or equal to VIN with inherent output disconnect; in inverting mode, it produces regulated negative output. Each configuration uses different external component connections but shares identical LT8570EDD#PBF pin functions and internal control logic.
How is the output voltage set on the LT8570EDD#PBF?
The LT8570EDD#PBF uses a single feedback resistor (RFBX) from VOUT to the FBX pin to set output voltage. For noninverting topologies (boost/SEPIC), RFBX = (VOUT − 1.204V)/83.3µA; for inverting topologies, RFBX = (VOUT + 3mV)/83.3µA. This dual-reference design eliminates external op-amps and allows precise ±VOUT regulation with one passive component - a key feature of the LT8570EDD#PBF.
Does the LT8570EDD#PBF require external compensation components?
Yes, the LT8570EDD#PBF requires external compensation: a series RC network (RC and CC) plus a parallel capacitor (CP) connected from VC to GND. Typical values are RC = 5k–50kΩ, CC = 470pF–2.2nF, and CP = 10pF–100pF. These components stabilize the voltage loop; improper selection causes ringing or poor transient response. The LT8570EDD#PBF datasheet provides design equations and test waveforms to validate compensation.
What is the purpose of the frequency foldback feature in the LT8570EDD#PBF?
Frequency foldback in the LT8570EDD#PBF reduces the switching frequency to 1/6 of nominal when the FBX pin voltage is between 300mV and 920mV - typically during startup or light-load conditions. This increases minimum off-time, improving switch current control and reducing inrush. Once regulation is established and FBX exits that range, normal frequency resumes. This behavior is intrinsic to the LT8570EDD#PBF's analog control architecture and requires no external configuration.
Can the LT8570EDD#PBF synchronize to an external clock?
Yes, the LT8570EDD#PBF supports external clock synchronization via the SYNC pin (Pin 8). A logic-level clock with 0.4V low and >1.3V high, 35–65% duty cycle, and frequency within 200kHz–1.5MHz will override the internal oscillator. Driving SYNC below 0.4V reverts to free-running operation. This capability enables EMI reduction through clock dithering or phase alignment with other converters - a verified function of the LT8570EDD#PBF per its datasheet timing specifications.
LT8570EDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive or Negative
- Topology:
- Boost, Cuk, SEPIC
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.55V
- Voltage - Input (Max):
- 40V
- Voltage - Output (Min/Fixed):
- 0.003V, 1.204V
- Voltage - Output (Max):
- 65V (Switch)
- Current - Output:
- 750mA (Switch)
- Frequency - Switching:
- 200kHz ~ 1.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-DFN (3x3)
LT8570EDD#PBF FAQ
1.How can I place an order for LT8570EDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT8570EDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT8570EDD#PBF reliable?
The price and inventory of LT8570EDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT8570EDD#PBF is usually 5 days.
3.What payment methods are accepted for LT8570EDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT8570EDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT8570EDD#PBF?
LT8570EDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT8570EDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT8570EDD#PBF?
For technical support, including LT8570EDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT8570EDD#PBF requirements.
6.How does Aetrix verify that LT8570EDD#PBF is sourced from the original manufacturer or authorized distributors?
All LT8570EDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT8570EDD#PBF meets industry standards.
7.What is the process for return or replacement of LT8570EDD#PBF?
All LT8570EDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT8570EDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT8570EDD#PBF part is unused and in its original packaging.
Return procedure for LT8570EDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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