My Inquiry
My Account
Analog Devices Inc. LT8582EDKD#TRPBF
- Part No.:
- LT8582EDKD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-WFDFN Exposed Pad
- Datasheet:
-
LT8582EDKD#TRPBF.pdf
- Description:
- IC REG BST CUK ADJ 3.3A DL 24DFN
- Quantity:
- Payment:
- Shipping:
Inventory:8,276
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT8582EDKD#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel, 42V, 3A combined-current PWM DC/DC converter IC designed for high-efficiency boost, inverting, SEPIC, and flyback power conversion. It integrates two independent master/slave NPN switch pairs (SWA/SWB), 2.5 MHz max switching frequency, fault protection (input overvoltage, overtemperature, output short-circuit), and power-good signaling. It delivers ±12V at 550 mA each from a 5V input in local bias supply applications.
For engineers reviewing the LT8582EDKD#TRPBF datasheet, LT8582EDKD#TRPBF pinout, LT8582EDKD#TRPBF application, or LT8582EDKD#TRPBF equivalent, key selection considerations include dual-channel independent configuration flexibility, 24-pin 7mm × 4mm DFN package with exposed thermal pad, master/slave current sharing (1.7A/1.3A), and integrated soft-start, frequency foldback, and SHDN pin hysteresis for robust system sequencing.
Technical Context
The LT8582EDKD#TRPBF implements constant-frequency current-mode control per channel, with independent RT-set oscillator and SYNC capability. Each channel features separate FBX feedback inputs (1.204 V positive / 7 mV negative reference), VC error amplifier outputs, and GATE-driven external PMOS for output disconnect during fault or shutdown.
Its fault detection logic operates in sample mode when FBX deviates >4% from regulation, triggering current-limited sampling and frequency foldback (1/6 nominal fOSC) below 144 mV or above 1.03 V FBX. Overcurrent faults trigger on SWA > 2 A min or SWA+SWB > 3.5 A min, while overvoltage lockout activates at VIN > 22.2 V min and die temperature exceeds 165°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5 V to 22 V operating; 40 V transient rating - supports wide industrial and automotive input rails with robust overvoltage tolerance. |
| Switch Rating | 42 V collector voltage, 3 A combined SWA+SWB current limit - enables high-voltage boost and inverting topologies up to ~40 V output. |
| Switching Frequency | 200 kHz to 2.5 MHz (RT- or SYNC-programmable) - allows optimization of size vs. efficiency; 1.5 MHz typical in ±12 V design. |
| Feedback Reference | 1.204 V (positive) / 7 mV (negative) - precise regulation thresholds for noninverting and inverting configurations respectively. |
| Quiescent Current | 2.5 mA active, <1 μA shutdown - enables low-power standby operation in battery-backed or always-on systems. |
| Thermal Range | –40°C to +125°C junction - qualified for under-hood automotive and industrial environments without derating. |
| VCE(SAT) | 270 mV at 2.75 A - low conduction loss improves efficiency in high-current boost/SEPIC stages. |
Pinout & Package
LT8582EDKD#TRPBF is housed in a thermally enhanced 24-pin 7 mm × 4 mm plastic DFN package (DKD) with exposed GND pad (Pin 25) requiring PCB soldering for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SWA1, SWA2 (Pins 1, 12) | Master NPN collector | Handles ≥1.7 A peak current; connects to inductor node in boost/SEPIC; requires minimal trace area for EMI control. |
| SWB1, SWB2 (Pins 24, 13) | Slave NPN collector | Handles ≥1.3 A peak current; tied to SWA for 3 A combined limit or used independently in flyback/inverting topologies. |
| FBX1, FBX2 (Pins 6, 7) | Feedback input | Accepts positive (1.204 V ref) or negative (7 mV ref) regulation signals; determines output polarity and accuracy. |
| PG1, PG2 (Pins 3, 10) | Open-drain power-good | Active-high when FBX within ±4% of target; requires external pull-up; enables event-based sequencing of downstream rails. |
| GATE1, GATE2 (Pins 4, 9) | PMOS gate driver | Pull-down current source (up to 1 mA); ramps with SS voltage to enable soft turn-on of external disconnect FETs. |
| SHDN1, SHDN2 (Pins 22, 15) | Channel enable/disable | 1.31 V threshold with 35 mV hysteresis; supports slow-ramping control signals and configurable UVLO via resistor divider. |
| RT1, RT2 (Pins 21, 16) | Oscillator timing | Resistor-to-GND sets free-running frequency; 31.6 kΩ → 2.5 MHz, 407 kΩ → 200 kHz - enables precise noise spectrum placement. |
| SS1, SS2 (Pins 20, 17) | Soft-start capacitor node | Charged by internal 250 kΩ to ~1.84 V; controls ramp rate of switch current and GATE pull-down for inrush limiting. |
| CLKOUT1, CLKOUT2 (Pins 23, 14) | Channel synchronization output | CH1: fixed 50% duty, 180° out-of-phase; CH2: duty varies linearly with junction temperature - enables multi-IC sync or thermal monitoring. |
| VIN1, VIN2 (Pins 2, 11) | Input supply | Each channel has dedicated input pin; must be locally bypassed with low-ESR ceramic capacitors for stable operation. |
| VC1, VC2 (Pins 5, 8) | Error amplifier output | Connects to external compensation network (R-C-RC) to stabilize loop response across topology and load conditions. |
| GND (Pin 25) | Power/thermal ground | Exposed pad; must be soldered to large PCB ground plane for thermal dissipation (θJA = 34°C/W) and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent boost/inverting/SEPIC/flyback channels | Enables compact dual-rail generation (e.g., +12 V and –12 V) from single 5 V input without external controllers or magnetics sharing. |
| Integrated fault protection suite | Detects and responds to input overvoltage (>22.2 V), overtemperature (>165°C), and output short-circuit via sample-mode current sensing and automatic shutdown/restart timeout. |
| Adjustable undervoltage lockout (UVLO) | Configurable per channel using SHDN pin resistor divider - allows precise power sequencing and brown-out recovery at system-defined VIN thresholds. |
| High-gain SHDN input with hysteresis | Accepts slowly varying enable signals (e.g., microcontroller GPIO, analog supervisor) without oscillation; 35 mV hysteresis prevents false toggling near threshold. |
| Synchronized clock outputs with thermal indication | CLKOUT2 duty cycle varies linearly with junction temperature - provides real-time thermal monitoring without external sensors or ADC resources. |
Applications
| Vacuum Fluorescent Display (VFD) Bias Supply | TFT-LCD Panel Bias Supply |
|---|---|
Use Scenario: Generating high-voltage AC or DC bias for VFD anode and grid electrodes from low-voltage system rail. IC Role / Device Role / Timing Role: Dual-channel LT8582EDKD#TRPBF configured as boost (anode) and inverting (grid) converters, delivering isolated ±30 V to ±100 V rails with tight regulation. Use Value: Eliminates need for discrete transformer-based supplies; reduces BOM count and board space while maintaining fast startup and fault-safe shutdown during display flicker or arc events. | Use Scenario: Providing positive (VON) and negative (VOFF) gate drive voltages for TFT pixel switching transistors in LCD panels. IC Role / Device Role / Timing Role: LT8582EDKD#TRPBF channels independently configured as boost and inverting converters to generate +15 V and –10 V from 3.3 V or 5 V system supply. Use Value: Enables precise, low-noise bias control with power-good sequencing to prevent panel latch-up; integrated short-circuit protection avoids catastrophic failure during ESD or panel defects. |
| Automotive Engine Control Unit (ECU) Power | Industrial Local Power Supply |
Use Scenario: Deriving auxiliary rails (e.g., +5 V sensor bias, –5 V op-amp reference) in harsh under-hood environments subject to load dump and cold cranking. IC Role / Device Role / Timing Role: LT8582EDKD#TRPBF operates from 5–24 V battery input; uses internal 40 V transient rating and –40°C to +125°C qualification for reliable operation. Use Value: Withstands 40 V load dump pulses without external TVS; fault protection prevents cascading failure in safety-critical ECU subsystems; GATE-driven PMOS enables clean power cycling. | Use Scenario: Compact, high-density local DC/DC conversion for FPGA I/O banks, ADC/DAC references, or isolated communication interfaces in programmable logic controllers. IC Role / Device Role / Timing Role: LT8582EDKD#TRPBF replaces multiple single-channel converters; its 7 mm × 4 mm DFN footprint saves >40% board area versus discrete solutions. Use Value: Dual-channel independence allows asynchronous start-up and fault containment; RT-programmable frequency avoids sensitive EMI bands; exposed pad ensures thermal stability at full 3 A load. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3891EFE#PBF | Single-channel, 60 V input, synchronous buck controller; no integrated switches or inverting capability. | Requires external MOSFETs and external inverting stage; suited for high-current buck only, not dual-polarity generation. | Select when higher efficiency >95% is required at >5 A loads, and ± rail generation is handled separately. |
| MAX20404ATPA/VY+ | Dual-channel, 36 V input, 2 A per channel, buck-only; no inverting/SEPIC support; integrated FETs but no slave switch. | Lacks master/slave topology flexibility and high-voltage capability; limited to unidirectional outputs up to 15 V. | Choose for cost-sensitive, space-constrained applications needing only dual positive rails below 15 V with minimal external components. |
Compared with LTC3891EFE#PBF and MAX20404ATPA/VY+, the LT8582EDKD#TRPBF uniquely supports dual independent inverting/boost/SEPIC topologies with integrated 42 V/3 A switches, making it the only option capable of generating tightly regulated ±12 V from 5 V in a single IC without transformers or additional controllers.
Availability
LT8582EDKD#TRPBF is available at Aetrix Electronics and suitable for vacuum fluorescent display (VFD) bias supplies, TFT-LCD panel bias generation, automotive engine control unit (ECU) auxiliary power, and industrial local power supply designs requiring stable component supply and long-term manufacturability.
Supply support for LT8582EDKD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, formed through the acquisition of Linear Technology in 2017.
The LT8582EDKD#TRPBF belongs to ADI's Power by Linear™ portfolio of high-reliability DC/DC converters, engineered specifically for demanding local power supply applications requiring dual-rail generation, fault resilience, and compact thermal packaging in automotive, industrial, and display systems.
FAQ
What is the maximum switching frequency supported by the LT8582EDKD#TRPBF?
The LT8582EDKD#TRPBF supports a maximum switching frequency of 2.5 MHz when configured with an RT resistor of 31.6 kΩ. This high-frequency capability enables use of smaller inductors and capacitors, reducing solution size for space-constrained applications such as portable displays and automotive ECUs. The LT8582EDKD#TRPBF also supports synchronization to an external clock up to 2.5 MHz, ensuring deterministic timing in noise-sensitive systems.
Can the LT8582EDKD#TRPBF generate both positive and negative output voltages simultaneously?
Yes, the LT8582EDKD#TRPBF can generate simultaneous positive and negative outputs - for example, +12 V and –12 V - from a single 5 V input. Channel 1 is configured as a boost converter and Channel 2 as an inverting converter, leveraging independent FBX1 (1.204 V reference) and FBX2 (7 mV reference) inputs. The LT8582EDKD#TRPBF's dual master/slave switch architecture enables this without external transformers or additional controllers.
How does the LT8582EDKD#TRPBF handle output short-circuit conditions?
The LT8582EDKD#TRPBF detects output shorts via sample-mode current sensing: when FBX deviates >4% from regulation, it samples inductor current every cycle. If sampled current exceeds 2 A (SWA) or 3.5 A (SWA+SWB), it triggers a fault - disabling switches, pulling PG low, and entering a timeout sequence where the SS pin charges/discharges to limit thermal stress. The LT8582EDKD#TRPBF also drives the GATE pin high-impedance to turn off an external PMOS, isolating the output.
What is the purpose of the CLKOUT2 pin on the LT8582EDKD#TRPBF?
The CLKOUT2 pin on the LT8582EDKD#TRPBF provides a clock output synchronized to Channel 2's internal oscillator, with a duty cycle that varies linearly with junction temperature - enabling direct thermal monitoring without external sensors. Unlike CLKOUT1 (fixed 50% duty, 180° out-of-phase), CLKOUT2's temperature-dependent waveform allows real-time die temperature estimation using a simple RC filter and ADC, supporting thermal-aware system management in the LT8582EDKD#TRPBF.
Is the LT8582EDKD#TRPBF pin-compatible with other members of the LT858x family?
The LT8582EDKD#TRPBF shares identical pinout and package (24-pin 7 mm × 4 mm DFN) with the LT8582IDKD#TRPBF and LT8582EDKD#PBF variants. Differences are limited to temperature grade (E-grade: –40°C to +125°C) and packaging (tape-and-reel). No functional or pinout changes exist between these variants - the LT8582EDKD#TRPBF may be substituted for LT8582IDKD#TRPBF in most designs, though long-term reliability at full temperature range should be verified per application requirements.
LT8582EDKD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive or Negative
- Topology:
- Boost, Cuk, Flyback, SEPIC
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 22V
- Voltage - Output (Min/Fixed):
- 2.5V
- Voltage - Output (Max):
- 42V (Switch)
- Current - Output:
- 3.3A (Switch)
- Frequency - Switching:
- 200kHz ~ 2.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-DFN (7x4)
LT8582EDKD#TRPBF FAQ
1.How can I place an order for LT8582EDKD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT8582EDKD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT8582EDKD#TRPBF reliable?
The price and inventory of LT8582EDKD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT8582EDKD#TRPBF is usually 5 days.
3.What payment methods are accepted for LT8582EDKD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT8582EDKD#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT8582EDKD#TRPBF?
LT8582EDKD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT8582EDKD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT8582EDKD#TRPBF?
For technical support, including LT8582EDKD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT8582EDKD#TRPBF requirements.
6.How does Aetrix verify that LT8582EDKD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT8582EDKD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT8582EDKD#TRPBF meets industry standards.
7.What is the process for return or replacement of LT8582EDKD#TRPBF?
All LT8582EDKD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT8582EDKD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT8582EDKD#TRPBF part is unused and in its original packaging.
Return procedure for LT8582EDKD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT8582EDKD#TRPBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
