Analog Devices Inc. LT8709EFE#PBF
- Part No.:
- LT8709EFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LT8709EFE#PBF.pdf
- Description:
- IC REG CTRLR MULT TOP 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,470
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT8709EFE#PBF from Analog Devices (formerly Linear Technology) is a synchronous PWM controller for negative-to-negative or negative-to-positive DC/DC conversion, featuring rail-to-rail output current monitoring, 100kHz–750kHz adjustable switching frequency, –4.5V to –80V input range, and 20-lead TSSOP package. It supports buck, boost, buck-boost, and inverting topologies in telecom power supplies and cathodic protection systems.
For engineers reviewing the LT8709EFE#PBF datasheet, LT8709EFE#PBF pinout, LT8709EFE#PBF application, or LT8709EFE#PBF equivalent, key selection considerations include its EN/FBIN input voltage regulation capability, MODE-selectable CCM/DCM operation, rail-to-rail ISP/ISN current sense accuracy (±7 mV typical), PG pin with 100 µs anti-glitch delay, and thermal shutdown at 175°C junction temperature.
Technical Context
The LT8709EFE#PBF integrates dual error amplifiers (FBY and IMON paths), a programmable oscillator with RT/SYNC control, and independent gate drivers (BG for NFET, TG for PFET) referenced to INTVCC and BIAS–INTVEE rails. Its EN/FBIN pin provides both chip enable and high-impedance input voltage regulation via an internal transconductance amplifier (140 µS).
It implements three distinct current-sense functions: CSP–CSN for NFET peak current limiting (50 mV typ), ISP–ISN for average output current regulation (50 mV typ), and IMON for proportional voltage output (11.9× gain + 51.8 mV offset). The MODE pin selects between forced CCM (threshold 1.175 V) and DCM/pulse-skipping (threshold 1.224 V), with hysteresis of 49 mV.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | –4.5V to –80V: Enables direct use with high-voltage negative rails without external level-shifting. |
| Switching Frequency | 100kHz–750kHz: Adjustable via RT resistor or external SYNC clock; foldback to 20% during overload. |
| Output Current Sense Accuracy | ±7 mV (ISP–ISN): Ensures precise 8.5A output current regulation in –12V/8.5A inverting configuration. |
| EN/FBIN Regulation Threshold | 1.607 V (typ): Controls input current to prevent collapse of high-impedance negative sources. |
| Power Good Detection | 74.9 µA FBY current threshold with 100 µs anti-glitch delay: Provides reliable system-level power sequencing. |
| Thermal Shutdown | 175°C (typ): Protects against sustained overloads while allowing short-term peak power delivery. |
| Package | 20-Lead TSSOP with exposed –VIN pad: Enables high-current PCB routing and thermal dissipation up to θJC = 10°C/W. |
Pinout & Package
LT8709EFE#PBF is housed in a 20-lead plastic TSSOP package (FE grade) with exposed pad (Pin 21) electrically connected to –VIN and requiring soldering to the PCB for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FBY (1) | Feedback reference input | Voltage-referred-to-GND; sets output regulation point for negative (–1.234 V) or positive (–15.8 mV) outputs. |
| VC (2) | Error amplifier output | Drives external compensation network to stabilize voltage loop; referenced to –VIN. |
| SS (3) | Soft-start control | Charged by internal 260 kΩ to ~2.7 V; discharged during fault conditions to force restart. |
| PG (4) | Power good indicator | Active-high open-drain output asserting when FBY current reaches 90% of regulation value. |
| IMON (5) | Average output current monitor | Provides 11.9× scaled (VISP–ISN) + 51.8 mV output; requires 10–100 nF filter capacitor. |
| ISN / ISP (6,7) | Kelvin current sense inputs | Detect average output current across external sense resistor; 50 mV full-scale corresponds to 8.5 A. |
| BIAS (8) | TG driver high-side rail | Supplies top gate drive voltage for PFET; must be bypassed locally to –VIN. |
| INTVEE (9) | TG driver low-side rail | 6.18 V below BIAS; enables TG switching when BIAS–INTVEE > 3.42 V (typ). |
| TG (10) | PFET gate driver output | Swings between BIAS–INTVEE (low) and BIAS (high); 15 ns rise time into 3300 pF. |
| BG (11) | NFET gate driver output | Swings between –VIN (low) and INTVCC (high); 24 ns rise time into 3300 pF. |
| INTVCC (12) | Internal LDO regulator output | 6.3 V ±0.1 V LDO powering BG driver and logic; UVLO at 3.88 V rising edge. |
| GND (13) | Positive input supply reference | Local ground node; must be bypassed to –VIN; functional down to V–VIN if BIAS–V–VIN ≥ 4.5 V. |
| CSN / CSP (14,15) | NFET peak current sense inputs | Monitor switch current for cycle-by-cycle limiting; 50 mV threshold at minimum duty cycle. |
| EN/FBIN (16) | Enable & input regulation input | Enables chip above 1.7 V; regulates input current between 1.55–1.662 V; bias current <25 µA at 1.7 V. |
| MODE (17) | CCM/DCM selection | Forces continuous conduction mode below 1.175 V; enables pulse-skipping above 1.224 V. |
| RT (18) | Oscillator timing input | Resistor to –VIN sets free-running frequency; 46.4 kΩ yields 640 kHz (typ). |
| SYNC (19) | External clock input | Accepts 0.4 V–1.5 V logic levels; overrides internal oscillator when driven above 1.5 V. |
| –VIN (20) | Negative input supply | Main power input and internal reference; exposed pad (Pin 21) must be soldered to PCB plane. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail output current monitoring | ISP–ISN sensing with 50 mV full-scale and 11.9× gain on IMON enables accurate 8.5 A regulation without external op-amps. |
| Input voltage regulation via EN/FBIN | High-gain (140 µS) amplifier maintains stable input current under weak negative sources, preventing rail collapse. |
| Configurable topology support | Single feedback pin (FBY) and dual current sense paths allow buck, boost, buck-boost, and inverting configurations without redesign. |
| Programmable CCM/DCM operation | MODE pin selects forced continuous conduction (for low-noise) or pulse-skipping (for light-load efficiency) with 49 mV hysteresis. |
| Robust fault protection | Integrated thermal shutdown (175°C), frequency foldback, soft-start reset, and PG anti-glitch (100 µs) ensure reliable startup and recovery. |
Applications
| Telecom Power Supplies | Cathodic Protection Systems |
|---|---|
Use Scenario: Generating –48 V backup power from –60 V battery banks in central office equipment. IC Role / Device Role / Timing Role: Negative-input, negative-output synchronous buck controller regulating –48 V at 5 A with input voltage regulation. Use Value: EN/FBIN pin prevents battery sag during high-current transients; PG pin enables system-level brownout detection. |
Use Scenario: Driving sacrificial anodes in pipeline corrosion protection using –24 V to –30 V input. IC Role / Device Role / Timing Role: High-power negative-input, negative-output inverter delivering –12 V/8.5 A with rail-to-rail current monitoring. Use Value: ISP–ISN sense accuracy ensures precise 8.5 A output current; IMON pin provides analog feedback for remote monitoring. |
| Negative Input to Positive Output Conversion | High-Impedance Negative Rail Regulation |
Use Scenario: Converting –24 V telecom supply to +5 V for auxiliary logic in base station radios. IC Role / Device Role / Timing Role: Negative-input, positive-output synchronous boost controller with FBY referenced to GND. Use Value: Single FBY pin simplifies feedback design; MODE pin enables DCM for >90% efficiency at 100 mA load. |
Use Scenario: Regulating –16 V to –30 V input from photovoltaic-powered sensor nodes with microamp leakage. IC Role / Device Role / Timing Role: Input voltage regulator using EN/FBIN to clamp NFET current and maintain stable –VIN. Use Value: EN/FBIN's 1.607 V threshold and 140 µS transconductance provide precise current limiting without external circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar negative-input DC/DC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3891EFE#PBF | Wider input range (–4V to –150V), integrated MOSFET drivers only (no external PFET/NFET control), no rail-to-rail ISP–ISN sense. | Designed for high-voltage industrial supplies; lacks IMON analog monitor output and EN/FBIN input regulation. | Select LTC3891EFE#PBF when input exceeds –80 V or integrated drivers suffice; avoid when ISP–ISN precision or EN/FBIN regulation is required. |
| LT8390EFE#PBF | Positive-input only (4.5V–60V), supports buck-boost/inverting but not negative-input topologies; includes spread-spectrum modulation. | Not usable for negative-input designs; requires level-shifting circuitry for –VIN applications. | Select LT8390EFE#PBF for positive-input high-efficiency buck-boost; LT8709EFE#PBF remains mandatory for native negative-input operation. |
Compared with LTC3891EFE#PBF and LT8390EFE#PBF, the LT8709EFE#PBF uniquely supports native negative-input operation with rail-to-rail ISP–ISN sensing and EN/FBIN-based input regulation-critical for telecom and cathodic protection where negative rails dominate and precision current control is non-negotiable.
Availability
LT8709EFE#PBF is available at Aetrix Electronics and suitable for telecom equipment power supplies, cathodic protection systems, and negative-input to positive-output conversion requiring stable component supply, long-term lifecycle support, and guaranteed –40°C to 125°C operation.
Supply support for LT8709EFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LT8709EFE#PBF belongs to Linear's high-voltage negative-input controller product line, designed specifically for robust, efficient power conversion in telecom infrastructure, industrial instrumentation, and corrosion protection systems where negative supply rails are standard.
FAQ
What is the absolute maximum input voltage rating for the LT8709EFE#PBF?
The LT8709EFE#PBF has an absolute maximum input voltage rating of –80 V on the –VIN pin relative to GND. Exceeding this voltage risks permanent damage. The device operates over a functional input range of –4.5 V to –80 V, with guaranteed performance across –40°C to 125°C junction temperature. Pin voltages are referenced to –VIN unless otherwise specified, and the exposed pad (Pin 21) must be soldered to the –VIN plane.
How does the EN/FBIN pin regulate input current in the LT8709EFE#PBF?
The EN/FBIN pin on the LT8709EFE#PBF uses an internal transconductance amplifier (140 µS) to regulate input current when the applied voltage is between 1.55 V and 1.662 V (typ). Within this window, the amplifier commands NFET current to maintain stable –VIN under high-impedance sources. Below 1.3 V, the part shuts down with 1 µA quiescent current; above 1.7 V, it initiates soft-start.
Can the LT8709EFE#PBF be used in a negative-input to positive-output boost configuration?
Yes, the LT8709EFE#PBF supports negative-input to positive-output boost conversion. In this configuration, the FBY pin is referenced to GND, and the output voltage is set using RFBY = (VOUT + 15.8 mV)/83.9 µA. BIAS must connect to INTVCC, and INTVEE to –VIN. The LT8709EFE#PBF's rail-to-rail ISP–ISN sensing and MODE-selectable DCM ensure stable regulation across load ranges.
What is the purpose of the IMON pin on the LT8709EFE#PBF and how is it used?
The IMON pin on the LT8709EFE#PBF outputs a voltage proportional to average output current: VIMON = 11.9 × (VISP – VISN + 51.8 mV). It provides analog monitoring of load current without external components. A 10–100 nF capacitor between IMON and –VIN filters switching noise. At 8.5 A output, IMON reads ~1.213 V, enabling real-time current telemetry or closed-loop current limiting in the LT8709EFE#PBF.
Does the LT8709EFE#PBF support external clock synchronization, and what are the voltage thresholds?
Yes, the LT8709EFE#PBF supports external clock synchronization via the SYNC pin. A logic-high SYNC signal must exceed 1.5 V (min), and logic-low must be below 0.4 V (max), both referenced to –VIN. The SYNC input accepts duty cycles from 20% to 80%, and the recommended fSYNC/fOSC ratio is ≥3/4. Driving SYNC below 0.4 V reverts the controller to its internal RT-set oscillator.
LT8709EFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up, Step-Down, Step-Up/Step-Down
- Output Configuration:
- Positive or Negative
- Topology:
- Buck, Boost, Buck-Boost
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- -4.5V ~ -80V
- Frequency - Switching:
- 100kHz ~ 750kHz
- Duty Cycle (Max):
- -
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Power Good, Soft Start
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
LT8709EFE#PBF FAQ
1.How can I place an order for LT8709EFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT8709EFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT8709EFE#PBF reliable?
The price and inventory of LT8709EFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT8709EFE#PBF is usually 5 days.
3.What payment methods are accepted for LT8709EFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT8709EFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT8709EFE#PBF?
LT8709EFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT8709EFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT8709EFE#PBF?
For technical support, including LT8709EFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT8709EFE#PBF requirements.
6.How does Aetrix verify that LT8709EFE#PBF is sourced from the original manufacturer or authorized distributors?
All LT8709EFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT8709EFE#PBF meets industry standards.
7.What is the process for return or replacement of LT8709EFE#PBF?
All LT8709EFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT8709EFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT8709EFE#PBF part is unused and in its original packaging.
Return procedure for LT8709EFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT8709EFE#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

