Analog Devices Inc. LTC1040CSW#TRPBF
- Part No.:
- LTC1040CSW#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Comparators
- Package:
- 18-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC1040CSW#TRPBF.pdf
- Description:
- IC COMPARATOR 2 GEN PUR 18SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1040CSW#TRPBF from Analog Devices (formerly Linear Technology) is a monolithic CMOS dual micropower sampled-data comparator with dual differential inputs per channel, 0.75mV max offset, ±0.1% max tracking error between input pairs, and 1.5µW typical supply power at 1 sample/second. It operates from single 2.8V–16V or split ±2.8V–±8V supplies and is used in battery-powered window comparators and remote sensing systems.
For engineers reviewing the LTC1040CSW#TRPBF datasheet, LTC1040CSW#TRPBF pinout, LTC1040CSW#TRPBF application, or LTC1040CSW#TRPBF equivalent, key selection considerations include guaranteed tracking error, rail-to-rail input common-mode range, pulsed VP-P output for ratiometric sensor networks, and internal/external strobe control of sampling frequency.
Technical Context
The LTC1040CSW#TRPBF uses switched-capacitor sampling architecture with an 80µs comparator ON time, enabling ultra-low average current by powering circuitry only during active comparison cycles. Its dual differential input structure sums VIN1 and VIN2 algebraically to determine output polarity, eliminating conventional single-ended input limitations.
It features two independent comparators (A and B), each with four input terminals (A1+/A1−/A2+/A2−), plus shared timing control via STROBE and OSC pins. Output logic includes AOUT/BOUT, wired-OR A+B, and ON/OFF status - all TTL/CMOS-compatible with V+ referenced levels, independent of V−.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | Single: 2.8V to 16V; Split: ±2.8V to ±8V - supports direct interfacing with 3.3V, 5V, and industrial ±5V rails. |
| Max Offset Voltage | ±0.75mV over full temperature range - ensures stable trip-point accuracy in precision threshold detection. |
| Tracking Error | ±0.1% between input pairs - guarantees matched gain across differential paths for balanced bridge or ratiometric applications. |
| Average Supply Current | 1.5µW at 1 sample/second - enables multi-year operation on coin-cell batteries in remote monitoring nodes. |
| Input Common-Mode Range | V− to V+ - allows direct sensing of signals referenced to either supply rail, e.g., high-side current sense with 0.1Ω shunt. |
| Response Time | 60–100µs - fixed by internal oscillator; independent of overdrive voltage, simplifying timing-critical designs. |
| Sampling Frequency Control | Externally set via REXT (100kΩ–10MΩ) + CEXT - enables programmable trade-off between power and update rate. |
Pinout & Package
Package: 18-lead plastic SO wide (SOIC-W), JEDEC MS-013AC, body width 7.5mm, thermal resistance θJA = 85°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (STROBE) | External trigger input | Edge-sensitive; initiates comparison cycle when pulled high; pulse width ≥ tD avoids strobe-edge-induced offset shift. |
| 2 (ON/OFF) | Status output | High when comparator is active (80µs ON period); used for synchronizing external circuitry or power gating. |
| 3 (A+B) | Wired-OR logic output | High only when both AOUT and BOUT are high - directly implements window-in-range detection without external gates. |
| 4 (AOUT) | Comparator A logic output | CMOS-level output referenced to V+; drives loads up to 360µA high / 1.6mA low without pull-ups. |
| 5 (A1+) | Comparator A positive input pair | One terminal of differential input pair A1; used with A1− to form first algebraic sum node. |
| 6 (A1−) | Comparator A negative input pair | Second terminal of differential input pair A1; sum with A1+ determines AOUT polarity. |
| 7 (A2+) | Comparator A second positive input | One terminal of differential input pair A2; enables flexible configuration (e.g., reference + signal summation). |
| 8 (A2−) | Comparator A second negative input | Second terminal of differential input pair A2; completes dual-differential structure for A channel. |
| 9 (GND) | Analog ground reference | Return path for V− and logic ground; must be low-impedance to minimize sampling noise coupling. |
| 10 (V−) | Negative supply rail | Accepts −2.8V to −8V in split mode or GND in single-supply mode; input common-mode extends to this rail. |
| 11 (VP-P) | Pulsed power output | Switches between V+ and high-Z at 80µs ON time; powers ratiometric sensor bridges only during active sampling. |
| 12 (OSC) | Oscillator timing input | Connects to REXT-to-V+ and CEXT-to-GND to set self-oscillating sampling frequency (e.g., 5Hz @ R=1MΩ, C=0.1µF). |
| 13 (BOUT) | Comparator B logic output | Functionally identical to AOUT; enables independent dual-threshold or hysteresis implementation. |
| 14 (B1+) | Comparator B positive input pair | First terminal of differential input pair B1; used with B1− to form second algebraic sum node. |
| 15 (B1−) | Comparator B negative input pair | Second terminal of differential input pair B1; sum with B1+ determines BOUT polarity. |
| 16 (B2+) | Comparator B second positive input | Enables independent reference injection or floating differential configurations for B channel. |
| 17 (B2−) | Comparator B second negative input | Completes dual-differential input structure for B channel; supports fully floating sensor interfaces. |
| 18 (V+) | Positive supply rail | Accepts +2.8V to +16V; powers all logic and analog circuitry; VP-P output switches to this rail during ON time. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input common-mode range | Operates with inputs at V+ or V− - enables direct high-side current sensing and ground-referenced thermistor interfaces without level-shifting. |
| Dual differential input per comparator | Each channel accepts two independent differential pairs (e.g., A1+/A1− and A2+/A2−) - supports true floating bridge comparisons and ratiometric references. |
| Pulsed VP-P output | Delivers V+ only during 80µs active window - powers external resistive networks (e.g., strain gauges) only when needed, reducing system power by >99% vs continuous bias. |
| Guaranteed tracking error ≤0.1% | Ensures matched gain between input pairs - critical for accurate window comparator symmetry and hysteresis stability across temperature. |
| Stable input errors over time/temperature | No drift specification required beyond initial offset - eliminates recalibration in long-life battery-powered instrumentation. |
Applications
| Battery-Powered Thermostat | Remote Load Current Monitor |
|---|---|
|
Use Scenario: Precision heating/cooling control in wireless HVAC sensors using thermistor and 3.3V coin-cell supply. IC Role / Device Role / Timing Role: Dual comparator implements independent upper/lower trip points with 20mV hysteresis; internal RC oscillator sets 0.1Hz sampling to extend battery life. Use Value: 1.5µW average power enables >5-year operation; rail-to-rail inputs interface directly with thermistor divider without op-amp buffering. |
Use Scenario: Industrial motor controller detecting overcurrent via 0.1Ω shunt in 24V DC bus with isolated reporting. IC Role / Device Role / Timing Role: Single comparator channel compares shunt voltage against reference; VP-P output powers shunt network only during sampling to eliminate standby loss. Use Value: Input common-mode range to V+ allows high-side sensing; ±0.1% tracking ensures accurate trip threshold across supply and temperature variations. |
| Window Comparator for Sensor Diagnostics | Low-Power Analog-to-Frequency Converter |
|
Use Scenario: Validating output range of MEMS pressure sensor in portable medical device with 3V supply. IC Role / Device Role / Timing Role: Both comparators configured as window detector (AOUT = VIN > VU, BOUT = VIN < VL); A+B output asserts only when signal is in-spec. Use Value: Guaranteed ±0.1% tracking error maintains tight window symmetry; dual differential inputs reject common-mode noise from sensor cable runs. |
Use Scenario: Converting analog temperature signal to frequency for EMI-resistant transmission over long cables in building automation. IC Role / Device Role / Timing Role: LTC1040CSW#TRPBF used in sigma-delta modulator loop with RC filter; output duty cycle encodes VIN linearly. Use Value: Sampling architecture provides inherent noise shaping; 60–100µs response time enables >1kHz effective bandwidth with minimal ripple. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual micropower comparator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLC372CDR | CMOS dual comparator, no sampling architecture; 20µA quiescent current; no VP-P output or tracking spec. | Higher power prevents coin-cell use; lacks rail-to-rail inputs and dual differential topology. | Select only if continuous comparison is required and µW-level power is not critical. |
| MAX9062ASA+ | Micropower dual comparator (1.1µA), rail-to-rail inputs, but single-ended only; no dual differential inputs or VP-P output. | Cannot implement true floating bridge or ratiometric sensor bias without external components. | Choose when basic low-power threshold detection suffices and sampling control is unnecessary. |
Compared with TLC372CDR and MAX9062ASA+, the LTC1040CSW#TRPBF uniquely delivers sub-µW average power via sampling, dual differential inputs per channel, and VP-P output - making it irreplaceable for battery-operated window comparators requiring long-term stability and floating sensor interfaces.
Availability
LTC1040CSW#TRPBF is available at Aetrix Electronics and suitable for battery-powered thermostats, remote current monitors, sensor diagnostic windows, and low-power analog-to-frequency converters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC1040CSW#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog portfolio, including legacy LTC products known for innovation in micropower, rail-to-rail, and switched-capacitor architectures.
The LTC1040CSW#TRPBF belongs to Linear Technology's micropower comparator family, designed specifically for energy-constrained systems requiring precision threshold detection without continuous power draw - such as IoT sensors, portable instrumentation, and remote monitoring nodes.
FAQ
What is the maximum sampling frequency achievable with LTC1040CSW#TRPBF using external REXT and CEXT?
The LTC1040CSW#TRPBF supports sampling frequencies from approximately 0.1Hz to 10kHz depending on REXT and CEXT values. With REXT = 100kΩ and CEXT = 100pF, fS reaches ~10kHz. The datasheet specifies REXT must remain between 100kΩ and 10MΩ for reliable oscillation; CEXT has no upper limit. At 10kHz, average supply current rises to ~30µA, still orders of magnitude below conventional comparators.
How does the dual differential input structure of LTC1040CSW#TRPBF improve accuracy in bridge sensor applications?
The LTC1040CSW#TRPBF's dual differential inputs (e.g., A1+/A1− and A2+/A2−) allow direct connection of both arms of a Wheatstone bridge to separate input pairs, enabling true ratiometric comparison where excitation and signal share the same VP-P source. This cancels out supply variation effects and leverages the guaranteed ±0.1% tracking error between input pairs - achieving higher accuracy than single-ended interfaces requiring external instrumentation amplifiers.
Can LTC1040CSW#TRPBF operate from a single 3.3V supply, and what are the input voltage limits?
Yes, LTC1040CSW#TRPBF operates from single 2.8V to 16V supplies. At 3.3V, input common-mode range extends from V− (GND) to V+ (3.3V), and inputs tolerate voltages from GND −0.3V to 3.6V. The device maintains ±0.75mV max offset and ±0.1% tracking error across this range, making it suitable for modern low-voltage microcontroller interfaces without level-shifting.
What is the purpose of the VP-P output on LTC1040CSW#TRPBF, and how should it be used?
The VP-P output on LTC1040CSW#TRPBF is a pulsed power rail that switches to V+ only during the 80µs comparator ON time. It is intended to bias ratiometric sensor networks (e.g., strain gauges, RTDs) exclusively during sampling - eliminating continuous power loss. To avoid settling errors, source impedances seen by inputs must be ≤10kΩ, and bypass capacitors are required for higher impedances per the input resistance formula RIN = 1/(fS × 33pF).
Does LTC1040CSW#TRPBF require external pull-up resistors on its logic outputs?
No, LTC1040CSW#TRPBF does not require external pull-up resistors. Its AOUT, BOUT, A+B, and ON/OFF outputs are push-pull CMOS structures powered from V+ and GND, capable of sourcing 360µA (logic high) and sinking 1.6mA (logic low) while maintaining valid TTL/CMOS voltage levels across the full supply range. This simplifies PCB layout and reduces BOM count in space-constrained designs.
LTC1040CSW#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Package/Case:
- 18-SOIC (0.295", 7.50mm Width)
- Series:
- LTCMOS™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- General Purpose
- Number of Elements:
- 2
- Output Type:
- CMOS, TTL
- Voltage - Supply, Single/Dual (±):
- 2.8V ~ 16V, ±2.8V ~ 8V
- :
- 4.5mV @ ±8V
- Voltage - Input Offset (Max):
- 300pA @ ±5V
- Current - Input Bias (Max):
- -
- Current - Output (Typ):
- 3mA
- Current - Quiescent (Max):
- -
- CMRR, PSRR (Typ):
- -
- Propagation Delay (Max):
- -
- Hysteresis:
- -40°C ~ 85°C
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- Surface Mount
- :
- 18-SO
LTC1040CSW#TRPBF FAQ
1.How can I place an order for LTC1040CSW#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1040CSW#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of LTC1040CSW#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1040CSW#TRPBF is usually 5 days.
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Once your LTC1040CSW#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1040CSW#TRPBF?
For technical support, including LTC1040CSW#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1040CSW#TRPBF requirements.
6.How does Aetrix verify that LTC1040CSW#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1040CSW#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1040CSW#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1040CSW#TRPBF?
All LTC1040CSW#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1040CSW#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1040CSW#TRPBF part is unused and in its original packaging.
Return procedure for LTC1040CSW#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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