Analog Devices Inc. LTC1060ACN#PBF
- Part No.:
- LTC1060ACN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Filters - Active
- Package:
- 20-DIP (0.300", 7.62mm)
- Datasheet:
-
LTC1060ACN#PBF.pdf
- Description:
- IC FILTER 30KHZ UNIV SWTCH 20DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1060ACN#PBF from Analog Devices (formerly Linear Technology) is a dual, high-precision switched-capacitor universal filter IC supporting 2nd-order lowpass, bandpass, highpass, notch, and allpass configurations. It delivers guaranteed ±0.3% clock-to-center frequency accuracy over temperature, 88dB dynamic range at ±2.5V, and center frequency × Q product up to 1.6MHz - enabling stable telecom and instrumentation filtering up to 30kHz with ±5V supply.
For engineers reviewing the LTC1060ACN#PBF datasheet, LTC1060ACN#PBF pinout, LTC1060ACN#PBF application, or LTC1060ACN#PBF equivalent, this device is selected for precision analog signal conditioning where tunable filter response, low crosstalk (70dB), and single/dual-supply flexibility (±2.37V to ±8V) are critical in sensor front-ends, tracking filters, and spectral analysis systems.
Technical Context
The LTC1060ACN#PBF implements two independent switched-capacitor filter blocks, each configurable via external resistors and a master clock to realize classical filter responses (Butterworth, Chebyshev, Bessel). Its internal architecture uses non-overlapping clock generation and level-shifted TTL/CMOS-compatible inputs to drive sampling switches with guaranteed offset voltage control.
Center frequency tuning is achieved by ratioing an external clock (up to 1.5MHz) to f₀ via programmable modes (50:1 or 100:1), with Q accuracy maintained across temperature (±0.5% for LTC1060A grade) and low temperature coefficients (–10 ppm/°C for f₀, 20 ppm/°C for Q).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Filter Type | Dual universal switched-capacitor building block supporting LP/BP/HP/notch/allpass functions |
| Center Frequency Range | 0.1 Hz to 20 kHz (with f₀×Q ≤ 400 kHz); extends to 16 kHz under high-Q conditions |
| Clock-to-f₀ Accuracy | ±0.3% over full temperature range (–40°C to +85°C), enabling precise frequency tracking |
| Dynamic Range | 88 dB at ±2.5V supply, supporting high-fidelity audio and instrumentation signal paths |
| Max Clock Frequency | 1.5 MHz (guaranteed operation up to 500 kHz for optimal Q/f₀ accuracy) |
| Crosstalk | 70 dB between channels, ensuring isolation in dual-path filtering applications |
| Supply Voltage Range | ±2.37 V to ±8 V (dual) or single 5 V, with internal analog/digital supply separation |
Pinout & Package
Package: 20-lead PDIP (N package), JEDEC MS-001, 0.3" wide, θJA = 100°C/W, TJMAX = 100°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 20 | Lowpass Output A / B | Analog outputs for LP response of Filter A/B; rail-to-rail swing limited by supply |
| 2, 19 | Bandpass Output A / B | Primary BP outputs; used for center-frequency-selective amplification and detection |
| 3, 18 | Notch/Highpass/Allpass Output A / B | Configurable output node supporting multiple 2nd-order transfer functions |
| 4, 17 | Inverting Input A / B | Differential input path for signal injection into integrator summers |
| 5, 16 | S1 Input A / B | Signal feedforward pin enabling mode variants (e.g., allpass, modified Q tuning) |
| 6 | SA/B Control | Selects summer configuration: ties S2 to LP output (high) or ground (low) for noise optimization |
| 7, 8 | VA+, VD+ | Separate analog and digital positive supplies; internally connected but require individual bypassing |
| 9 | LSh (Level Shift) | Bias reference for clock input threshold; sets 1.5 V ±0.1 V logic threshold relative to AGND |
| 10, 11 | CLKA, CLKB | TTL/CMOS-compatible clock inputs driving non-overlapping internal sampling clocks |
| 12 | 50/100/HOLD | Selects clock ratio mode (50:1 or 100:1) or halts filter operation for sample-and-hold hold state |
| 13, 14 | VA–, VD– | Separate analog and digital negative supplies; must share common DC bias source |
| 15 | AGND | Analog ground reference; must be clean and tied to system ground or mid-supply in single-supply operation |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed f₀ × Q product | Up to 1.6 MHz enables high-selectivity bandpass filtering without external op amps |
| Pinout compatibility with MF10 | Direct drop-in replacement for legacy designs using MF10-based filter topologies |
| Mode-selectable clock ratios | 50:1 or 100:1 fCLK/f₀ selection via Pin 12 simplifies design across frequency bands |
| Hold function on Pin 12 | Stops filter operation and holds last BP/LP sample with 20 mV step and 150 µV/s droop |
| Low-offset internal op amps | DC offset voltages as low as 2 mV ensure minimal baseline error in precision measurement paths |
Applications
| Telecom Channel Selection | Instrumentation Signal Conditioning |
|---|---|
Use Scenario: Isolating voice-band signals (300–3400 Hz) in DSL line drivers while rejecting adjacent channel interference. IC Role / Device Role / Timing Role: Dual-channel notch/bandpass filter providing simultaneous channel equalization and echo cancellation. Use Value: 70 dB inter-channel crosstalk and ±0.3% f₀ stability over temperature maintain SNR > 45 dB across operating life. | Use Scenario: Extracting narrowband vibration signatures from accelerometer outputs in structural health monitoring. IC Role / Device Role / Timing Role: High-Q (Q = 50) bandpass filter centered at resonant frequency of mechanical system. Use Value: f₀ × Q product up to 1.6 MHz allows 32 kHz center frequency with Q = 50, resolving sub-Hz shifts in resonance. |
| Audio Spectrum Analyzer Front-End | Biomedical ECG Filtering |
Use Scenario: Real-time frequency-domain decomposition of audio signals using cascaded 4th-order bandpass sections. IC Role / Device Role / Timing Role: Two LTC1060ACN#PBF units cascaded to form 4th-order biquad with Butterworth response. Use Value: Guaranteed ±0.1% gain accuracy at f₀ and low 15 mV RMS noise enable < 0.5% amplitude error in FFT bins. | Use Scenario: Removing 50/60 Hz mains interference while preserving ST-segment morphology in portable ECG devices. IC Role / Device Role / Timing Role: Precision notch filter (Q = 100) tuned to line frequency using external clock synchronization. Use Value: Notch depth > 80 dB at 50 Hz with ±0.3% f₀ accuracy ensures > 40 dB rejection even at end-of-life temperature extremes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar universal switched-capacitor filter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC1060CN#PBF | Same architecture but ±0.8% fCLK/f₀ accuracy over temperature (vs. ±0.3% for LTC1060ACN#PBF) | Acceptable for non-critical industrial filtering where tighter f₀ tolerance is not required | Select when cost sensitivity outweighs need for guaranteed high-accuracy tracking |
| MF10CN | Legacy TI part; no guaranteed f₀ accuracy spec, higher typical offset (±15 mV), lower max f₀ (10 kHz) | Functional substitute only in legacy repair or low-performance designs | Use only if existing PCB layout mandates pin-compatible replacement without performance validation |
Compared with LTC1060CN#PBF and MF10CN, the LTC1060ACN#PBF provides superior temperature-stable f₀ accuracy and higher f₀×Q capability, making it the preferred choice for telecom, test equipment, and medical applications demanding repeatable filter response across environmental stress.
Availability
LTC1060ACN#PBF is available at Aetrix Electronics and suitable for telecom infrastructure, precision instrumentation, and biomedical device manufacturing requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC1060ACN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-precision analog IC portfolio, emphasizing performance, reliability, and application-specific integration.
The LTC1060ACN#PBF belongs to Linear Technology's universal filter building block family, designed specifically for analog signal conditioning systems requiring field-tunable, temperature-stable filter responses without microcontroller intervention.
FAQ
What is the guaranteed clock-to-center frequency accuracy of the LTC1060ACN#PBF over temperature?
The LTC1060ACN#PBF guarantees ±0.3% clock-to-center frequency (fCLK/f₀) accuracy over its full operating temperature range of –40°C to +85°C. This specification applies in Mode 1 with Q = 10 and fCLK = 250 kHz (50:1) or 500 kHz (100:1), and is a key differentiator from the standard-grade LTC1060CN#PBF (±0.8%). The LTC1060ACN#PBF achieves this via enhanced process trimming and temperature-compensated internal circuitry.
Can the LTC1060ACN#PBF operate from a single 5V supply?
Yes, the LTC1060ACN#PBF supports single 5V operation. In this configuration, AGND (Pin 15) must be biased at 2.5 V (mid-supply) and bypassed with a 0.1 µF capacitor. The LSh pin (Pin 9) and negative supply pins (13, 14) connect to system ground. Performance includes 12 mW power consumption and center frequencies up to 10 kHz - verified per the datasheet's "Single 5V, Gain of 1000 4th Order Bandpass Filter" application circuit.
How does the HOLD function work on Pin 12 of the LTC1060ACN#PBF?
When Pin 12 (50/100/HOLD) is shorted to the negative supply (VA–/VD–), the LTC1060ACN#PBF halts filter operation and places both bandpass and lowpass outputs into sample-and-hold mode. The hold step is 20 mV, and output droop is 150 µV/second - enabling precise transient capture without external S/H circuitry. This behavior is fully specified and tested across temperature for the LTC1060ACN#PBF.
What is the maximum clock frequency supported by the LTC1060ACN#PBF?
The absolute maximum clock frequency for the LTC1060ACN#PBF is 1.5 MHz, as stated in Absolute Maximum Ratings. However, for guaranteed f₀ and Q accuracy, the datasheet limits practical use to ≤500 kHz under ±2.37V to ±5V supplies. At 1.5 MHz, Q enhancement and center frequency errors increase significantly - confirmed by Graph 4 (TPC04) showing >8% Q error at 1.4 MHz with ±7.5V supply.
Is the LTC1060ACN#PBF pin-compatible with the MF10 series?
Yes, the LTC1060ACN#PBF is explicitly pinout compatible with the MF10 family (e.g., MF10CN), sharing identical 20-pin PDIP pin assignments and functional mapping. Linear Technology designed the LTC1060ACN#PBF as a direct performance upgrade, retaining layout compatibility while improving f₀ accuracy, dynamic range, and temperature stability - confirmed in the "FEATURES" section of the datasheet.
LTC1060ACN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Filter Type:
- Universal Switched Capacitor
- Frequency - Cutoff or Center:
- 30kHz
- Number of Filters:
- 2
- Filter Order:
- 4th
- Voltage - Supply:
- ±2.37V ~ 5V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 20-PDIP
LTC1060ACN#PBF FAQ
1.How can I place an order for LTC1060ACN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1060ACN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1060ACN#PBF reliable?
The price and inventory of LTC1060ACN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1060ACN#PBF is usually 5 days.
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LTC1060ACN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1060ACN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1060ACN#PBF?
For technical support, including LTC1060ACN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1060ACN#PBF requirements.
6.How does Aetrix verify that LTC1060ACN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1060ACN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1060ACN#PBF meets industry standards.
7.What is the process for return or replacement of LTC1060ACN#PBF?
All LTC1060ACN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1060ACN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1060ACN#PBF part is unused and in its original packaging.
Return procedure for LTC1060ACN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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