Analog Devices Inc. LTC1152CN8#PBF
- Part No.:
- LTC1152CN8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
LTC1152CN8#PBF.pdf
- Description:
- IC OPAMP ZERO-DRIFT 1 CIRC 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1152CN8#PBF from Analog Devices (formerly Linear Technology) is a zero-drift, rail-to-rail input/output operational amplifier in 8-lead PDIP package, featuring 10 µV max input offset voltage, 100 nV/°C max offset drift, 115 dB min CMRR, 0.7 MHz gain-bandwidth product, and shutdown capability reducing supply current to 1 µA. It enables high-accuracy single-supply transducer amplification and precision current sensing at the positive rail.
For engineers reviewing the LTC1152CN8#PBF datasheet, LTC1152CN8#PBF pinout, LTC1152CN8#PBF application, or LTC1152CN8#PBF equivalent, key selection considerations include verified rail-to-rail input common-mode range extending beyond both rails, internal charge pump operation (4.7 MHz), C-Load™ capacitive drive capability, and confirmed ±1 µV typical offset over full temperature range.
Technical Context
The LTC1152CN8#PBF employs a chopper-stabilized architecture with synchronized 2.3 kHz nulling clock and 4.7 MHz internal charge pump to achieve rail-to-rail input operation-extending 0.3 V beyond V+ and V−-while maintaining DC precision. Its input stage uses auto-zeroing to correct offset in real time, delivering <±1 µV typical VOS across temperature and common-mode range.
Output drive is optimized for heavy loads: it sources/sinks ≥10 mA into 1 kΩ while sustaining rail-to-rail swing (e.g., 4.4 V out on 5 V single supply), and features configurable compensation via COMP pin (Pin 5) to drive infinite capacitive load when 0.1 µF is added between Pins 5 and 6. Shutdown mode disables internal clocks and places output in high-impedance state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | ±10 µV max - ensures ≤10 µV DC error at room temperature, critical for 16-bit+ data acquisition accuracy. |
| Offset Drift | ±100 nV/°C max - guarantees <1 µV total drift over 0°C to 70°C operating range, enabling stable long-term measurements. |
| CMRR | 115 dB min - rejects >5.6 M:1 common-mode interference, essential for high-side current sensing near supply rails. |
| Supply Voltage Range | 2.7 V to 14 V total - supports single 3 V/5 V and dual ±1.5 V/±2.5 V operation without external level-shifting. |
| Gain-Bandwidth Product | 0.7 MHz - provides sufficient bandwidth for low-frequency instrumentation (e.g., 100 Hz–1 kHz sensor signals) with unity-gain stability up to 1000 pF. |
| Shutdown Current | 1 µA max - enables ultra-low-power sleep modes in battery-powered systems without external power gating. |
| Input Noise (0.1–10 Hz) | 2 µVP-P - delivers low-frequency noise performance suitable for strain gauge and thermopile amplification. |
Pinout & Package
Package: 8-lead PDIP (N8), 0.300-inch wide body, through-hole mounting, JEDEC MS-001 compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN) | Shutdown control input | CMOS-compatible logic input; pulled high internally by 1 µA; drives output to high-Z and reduces ICC to 1 µA when low. |
| 2 (–IN) | Inverting input | Accepts signals from V– – 0.3 V to V+ + 0.3 V; no external clamping needed for rail-referenced inputs. |
| 3 (+IN) | Non-inverting input | Same rail-to-rail common-mode range as Pin 2; enables true unity-gain buffer of 0–5 V signals on single 5 V supply. |
| 4 (V–) | Negative supply terminal | Connects to ground (single supply) or negative rail (dual supply); internal charge pump referenced to this node. |
| 5 (COMP) | Compensation node | External capacitor (e.g., 0.1 µF to OUT) enables infinite capacitive load drive and bandwidth limiting to ~200 Hz. |
| 6 (OUT) | Amplifier output | Rail-to-rail swing into 1 kΩ; open-loop output resistance ≈140 Ω at 5 V supply; high-Z during shutdown. |
| 7 (V+) | Positive supply terminal | Accepts up to 14 V total supply; internal charge pump generates ~V+ + 2 V for input stage biasing. |
| 8 (CP) | Charge pump output | Internal 4.7 MHz switching node; optional 0.1 µF cap to V+ reduces feedthrough noise; shorting to V– destroys device. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input common-mode range | Extends 0.3 V beyond both supply rails - eliminates need for level-shifting in high-side current sensing and single-supply transducer interfaces. |
| C-Load™ capacitive drive | Stable with any capacitive load via COMP pin compensation - removes need for isolation resistors in driving ADC inputs or long cables. |
| Zero-drift architecture | Typical 1 µV offset and 10 nV/°C drift - achieves sub-µV DC accuracy over temperature without manual calibration. |
| Internal charge pump | No external components required - enables rail-to-rail input operation while maintaining 115 dB CMRR and 120 dB PSRR. |
| Shutdown mode | 1 µA quiescent current and high-Z output - allows multiplexing multiple LTC1152CN8#PBF units on shared bus without contention. |
Applications
| High-Resolution Data Acquisition | Rail-to-Rail Transducer Buffer |
|---|---|
|
Use Scenario: Amplifying low-level outputs from 24-bit delta-sigma ADC front-ends with minimal DC error and noise. IC Role / Device Role / Timing Role: Precision DC-coupled gain stage with 2 µVP-P 0.1–10 Hz noise and <±1 µV offset to preserve ENOB. Use Value: Enables direct interface to thermocouples and bridge sensors without offset trimming, reducing BOM and calibration cost. |
Use Scenario: Unity-gain buffering of 0–5 V industrial sensor signals powered from same 5 V rail. IC Role / Device Role / Timing Role: Rail-to-rail input/output op amp ensuring full-scale signal integrity without clipping or phase reversal. Use Value: Eliminates need for dual supplies or external level shifters, simplifying PCB layout and power design. |
| High-Side Power Supply Current Sensing | Low-Voltage Precision Instrumentation |
|
Use Scenario: Measuring load current in 3.3 V or 5 V systems using a 10 mΩ shunt placed between supply and load. IC Role / Device Role / Timing Role: Differential amplifier with input common-mode at VCC, rejecting supply ripple while amplifying mV-level sense voltage. Use Value: Achieves <1% gain error and <10 µV offset contribution even with VIN+ = VCC, enabling accurate real-time power monitoring. |
Use Scenario: Signal conditioning for portable medical devices operating from single 3 V coin cell batteries. IC Role / Device Role / Timing Role: Low-power, zero-drift amplifier supporting 2.7 V minimum supply and 1 µA shutdown current. Use Value: Extends battery life while maintaining µV-level DC accuracy over temperature, critical for ECG and pulse oximetry front-ends. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar zero-drift, rail-to-rail op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2050CS8#PBF | Lower 0.5 µV max VOS, higher 1.5 MHz GBW, but no internal charge pump - requires external level-shifting for true rail-to-rail input at V+. | Preferred for higher-speed precision applications where input common-mode does not reach V+, e.g., photodiode TIA feedback paths. | Select LTC2050CS8#PBF only if rail-to-rail input is not required at the positive rail; otherwise LTC1152CN8#PBF remains optimal. |
| AD8628ARZ | Similar 1 µV max VOS and rail-to-rail I/O, but lacks shutdown pin and internal charge pump - input CMR limited to V– to V+ – 0.1 V. | Suitable for non-shutdown, dual-supply instrumentation where input never reaches V+, such as bipolar sensor interfaces. | Choose AD8628ARZ for cost-sensitive, non-shutdown designs with relaxed input CMR requirements; LTC1152CN8#PBF is superior for single-supply rail-referenced use. |
Compared with LTC2050CS8#PBF and AD8628ARZ, the LTC1152CN8#PBF uniquely combines verified rail-to-rail input *including V+*, integrated shutdown, and C-Load™ drive - making it the only option among the three that enables true single-supply unity-gain buffering of 0–5 V signals without external components or performance trade-offs.
Availability
LTC1152CN8#PBF is available at Aetrix Electronics and suitable for high-accuracy instrumentation, single-supply transducer interfacing, and rail-referenced current sensing requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for LTC1152CN8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs for precision measurement and control.
The LTC1152CN8#PBF belongs to Linear's zero-drift op amp family, designed specifically for applications demanding microvolt-level DC accuracy, rail-to-rail operation on low supply voltages, and robustness in noisy industrial environments.
FAQ
What is the maximum total supply voltage for the LTC1152CN8#PBF?
The LTC1152CN8#PBF supports a total supply voltage of up to 14 V, meaning it operates with single supplies from 2.7 V to 14 V or dual supplies totaling ≤14 V (e.g., ±2.5 V, ±3 V, or ±5 V). Exceeding 14 V risks permanent damage per Absolute Maximum Ratings. The internal charge pump output (Pin 8) reaches ~V+ + 2 V, so V+ must remain within safe limits relative to V–.
Does the LTC1152CN8#PBF require external components to achieve rail-to-rail input operation?
No, the LTC1152CN8#PBF does not require external components for rail-to-rail input operation. Its internal 4.7 MHz charge pump generates a boosted voltage (~V+ + 2 V) to bias the input stage, enabling common-mode input range from V– – 0.3 V to V+ + 0.3 V. This is confirmed in the datasheet's "Internal Charge Pump" section and Figure 1 block diagram.
Can the LTC1152CN8#PBF drive large capacitive loads without oscillation?
Yes, the LTC1152CN8#PBF can drive arbitrarily large capacitive loads when externally compensated: connecting 0.1 µF between COMP (Pin 5) and OUT (Pin 6) ensures stability with infinite capacitance. Without compensation, it remains unity-gain stable up to 1000 pF. This C-Load™ capability is explicitly documented in the "Compensation/Bandwidth Limiting" section and Figure 3.
What is the typical input offset voltage of the LTC1152CN8#PBF over temperature?
The LTC1152CN8#PBF exhibits a typical input offset voltage of ±1 µV at 25°C, with maximum drift of ±100 nV/°C over its 0°C to 70°C operating range. This results in <±0.7 µV total offset variation across the full temperature range, verified in Electrical Characteristics tables and Typical Performance curves (Figure G09).
How does the shutdown feature affect the output state of the LTC1152CN8#PBF?
When the SHDN pin (Pin 1) is pulled low, the LTC1152CN8#PBF enters shutdown mode: supply current drops to 1 µA max, internal clocks halt, and the output stage transitions to a high-impedance state - confirmed in the "Shutdown" section and Electrical Characteristics table (IOSD = ±10 nA max leakage). This allows multiple LTC1152CN8#PBF units to share a common output bus without contention.
LTC1152CN8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- C-Load™
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Zero-Drift
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.5V/µs
- Gain Bandwidth Product:
- 700 kHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 10 pA
- Voltage - Input Offset:
- 1 µV
- Current - Supply:
- 2.2mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 14 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
LTC1152CN8#PBF FAQ
1.How can I place an order for LTC1152CN8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1152CN8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1152CN8#PBF reliable?
The price and inventory of LTC1152CN8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1152CN8#PBF is usually 5 days.
3.What payment methods are accepted for LTC1152CN8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1152CN8#PBF transactions.
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4.How is shipping managed for LTC1152CN8#PBF?
LTC1152CN8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1152CN8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1152CN8#PBF?
For technical support, including LTC1152CN8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1152CN8#PBF requirements.
6.How does Aetrix verify that LTC1152CN8#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1152CN8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1152CN8#PBF meets industry standards.
7.What is the process for return or replacement of LTC1152CN8#PBF?
All LTC1152CN8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1152CN8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1152CN8#PBF part is unused and in its original packaging.
Return procedure for LTC1152CN8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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