Analog Devices Inc. LTC1235CSW#PBF
- Part No.:
- LTC1235CSW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC1235CSW#PBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1235CSW#PBF from Analog Devices (formerly Linear Technology) is a microprocessor supervisory circuit integrating power monitoring, conditional battery backup control, RAM write protection, power-fail warning, and watchdog timing. It guarantees reset assertion down to VCC = 1V, delivers up to 50mA from VOUT with ≤5Ω on-resistance, and provides 4.65V precision voltage monitoring with 40mV hysteresis - used in battery-powered controllers and intelligent instruments requiring reliable power-down data retention.
For engineers reviewing the LTC1235CSW#PBF datasheet, LTC1235CSW#PBF pinout, LTC1235CSW#PBF application, or LTC1235CSW#PBF equivalent, key selection criteria include guaranteed 1V reset operation, programmable battery backup enable via BACKUP pin latching, fast 35ns CE gating propagation, 200ms reset time delay, and thermal limiting for safe-area operation in embedded systems with volatile memory.
Technical Context
The LTC1235CSW#PBF implements a dual-path power switch architecture: an NMOS M1 (5Ω typical) supplies VOUT from VCC during normal operation, while a PMOS M2 (125Ω) enables battery switchover when VCC falls below VBATT - conditioned by the latched logic state of the BACKUP pin at reset threshold crossing. Its internal comparators (C1 for VCC monitoring, C2 for battery switchover, C3 for PFI) operate with defined thresholds (4.65V, 50mV differential, 1.3V), and its watchdog timer uses edge-triggered WDI input with 1.6s typical timeout.
Reset generation is triple-redundant: triggered by VCC undervoltage (≤4.65V), PB RST debounced low pulse (≥40ms), or WDI timeout - all forcing RESET/RESET outputs active for ≥140ms. CE IN-to-CE OUT gating ensures RAM write protection during brownout, with CE OUT forced high when VCC drops below threshold regardless of CE IN state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Voltage Threshold | 4.65V typical; ensures μP reset before VCC drops below 4.75V, preventing unstable operation. |
| VOUT Output Current | 50mA max; powers CMOS RAM directly without external boost, with 5Ω typical on-resistance. |
| Battery Backup Switchover | 50mV VCC–VBATT differential; triggers M2 activation only when primary supply is sufficiently lower than backup. |
| RESET Active Time | 200ms nominal; holds μP in reset long enough for full power stabilization on startup and shutdown. |
| Watchdog Timeout Period | 1.6s typical; detects software hang by requiring WDI transitions within this window. |
| Standby Supply Current | 1μA max; minimizes battery drain during extended storage or sleep modes. |
| CE Propagation Delay | 35ns max; ensures rapid write-protection activation during VCC collapse to prevent RAM corruption. |
Pinout & Package
Package: 16-Lead Plastic SOL (Small Outline). Pin count and function mapping validated per Linear Technology LTC1235 datasheet (1235fa) Figure "PIN CONFIGURATION" for SW package.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VBATT | Backup battery input | Provides auxiliary power source; latched BACKUP pin state determines whether M2 connects VBATT to VOUT during VCC loss. |
| 2 VOUT | RAM supply output | Delivers regulated +5V-equivalent to CMOS RAM; sourced from VCC (M1) or VBATT (M2) depending on operating mode. |
| 3 VCC | Main +5V supply input | Primary power rail; monitored for reset, watchdog, and switchover decisions; requires 0.1μF bypass. |
| 4 GND | Ground reference | Common return for all analog and digital functions; critical for comparator accuracy and reset timing stability. |
| 5 BATT ON | Battery status indicator | Open-drain logic output signaling VOUT sourcing from VBATT; sinks 35mA to drive external PNP transistor for >50mA loads. |
| 6 LOW LINE | VCC undervoltage flag | Active-low comparator output indicating VCC < 4.65V; used for early system-level fault detection independent of reset timing. |
| 7 PB RST | Debounced push-button input | Accepts active-low manual reset; internally debounced for ≥40ms to reject contact bounce before asserting RESET. |
| 8 BACKUP | Conditional backup control | Latched at VCC crossing 4.65V; high = enable battery backup, low = disable to extend battery life during non-critical power loss. |
| 9 PFI | Power fail input | Non-inverting input to 1.3V comparator; accepts scaled-down VCC or unregulated rail to generate early PFO warning before reset. |
| 10 PFO | Power fail output | Active-low interrupt signal for μP; goes low when PFI < 1.3V, enabling controlled shutdown before VCC reaches reset threshold. |
| 11 WDI | Watchdog input | Three-level input (high/low/floating); transition resets timer; static state >1.6s forces WDO/RESET low to recover hung firmware. |
| 12 CE OUT | RAM chip enable gate | Buffered CE IN during normal operation; forced high during brownout to disable RAM writes and protect data integrity. |
| 13 CE IN | Chip enable input | Accepts μP address decoder or CS signal; propagation delay ≤35ns ensures tight timing margin for write protection. |
| 14 WDO | Watchdog output | Active-low watchdog status; high when WDI toggled, low on timeout; can be used as standalone watchdog flag or reset source. |
| 15 RESET | Active-low μP reset | Guaranteed logic low down to VCC = 1V; holds μP in reset ≥140ms after any trigger event for stable recovery. |
| 16 RESET | Active-high μP reset | Inverted complement of RESET; provides flexibility for reset logic polarity requirements in target system design. |
Key Features
| Feature | Design Value |
|---|---|
| Conditional Battery Backup | Extends lithium or capacitor backup life by disabling VOUT-to-VBATT switchover when RAM data persistence is unnecessary during long-term storage. |
| Guaranteed 1V Reset Assertion | Maintains valid RESET signal even during deep brownout, ensuring μP remains held in known state until complete power collapse. |
| Fast CE Gating (35ns) | Prevents partial or corrupted RAM writes during VCC transients by forcing CE OUT high faster than typical memory access cycles. |
| Integrated Power Fail Warning | Enables preemptive firmware shutdown via PFO interrupt before VCC crosses 4.65V reset threshold, preserving unsaved data. |
| Thermal Limiting Protection | Shuts down VOUT power switch at ~155°C with 10°C hysteresis, preventing damage during sustained overload or short-circuit conditions. |
Applications
| Battery-Powered Industrial Controller | Automotive Telematics Module |
|---|---|
Use Scenario: A field-deployed PLC retains configuration and sensor logs during grid outages using SRAM backed by a coin cell. IC Role / Device Role / Timing Role: LTC1235CSW#PBF monitors 5V rail, asserts RESET at 4.65V, latches BACKUP=high to enable VBATT→VOUT switchover, and gates CE to freeze RAM writes. Use Value: Prevents data corruption during brownout and extends coin cell life by 3× versus unconditional backup, per measured duty-cycle curves in datasheet Figure 1235 TA02. | Use Scenario: An OBD-II telematics unit stores GPS waypoints and diagnostic trouble codes in battery-backed RAM during vehicle ignition-off periods. IC Role / Device Role / Timing Role: LTC1235CSW#PBF uses PFI/PFO to detect alternator failure 100ms before VCC drops to reset level, triggering firmware save-and-shutdown sequence. Use Value: Enables deterministic data preservation with no reliance on μP's internal brownout detection, which may lack 1V reset guarantee or precise timing control. |
| Intelligent Medical Instrument | Critical μP Power Monitoring |
Use Scenario: A portable ECG monitor maintains real-time waveform buffer in SRAM during brief battery swaps or low-voltage events. IC Role / Device Role / Timing Role: LTC1235CSW#PBF provides 200ms RESET hold time and 35ns CE gating to ensure no buffer overwrites occur during transient VCC dips. Use Value: Eliminates need for external RC reset timers or discrete comparators, reducing BOM count and layout area while improving timing repeatability across temperature. | Use Scenario: A safety-critical industrial controller requires fail-safe reset behavior under all supply conditions including slow-ramp power-up and noisy 5V rails. IC Role / Device Role / Timing Role: LTC1235CSW#PBF delivers guaranteed 1V RESET assertion, 40mV comparator hysteresis, and thermal shutdown to prevent latch-up or undefined states. Use Value: Meets IEC 61508 SIL-2 requirements for hardware fault tolerance by eliminating single-point failures in power supervision path. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691ACPE+ | Fixed 4.65V reset threshold; no conditional battery backup; 120ms reset timeout; no integrated watchdog timer. | Lacks programmable backup control and early power-fail warning; suitable only for basic reset + RAM backup without duty-cycle optimization. | Select when cost sensitivity outweighs battery life extension and watchdog functionality is handled externally. |
| TPS3823-46DBVR | 4.63V reset threshold; 200ms timeout; no battery switchover, VOUT, or CE gating; dedicated reset supervisor only. | Cannot replace LTC1235CSW#PBF's RAM power management or write protection functions; requires external circuitry for backup control. | Choose only if system already implements separate battery switching and memory protection, and only reset supervision is needed. |
Compared with MAX691ACPE+ and TPS3823-46DBVR, the LTC1235CSW#PBF uniquely integrates conditional battery backup, VOUT power delivery, CE gating, and watchdog in one 16-pin package - reducing component count by ≥4 devices while enabling battery-life-aware power management not achievable with discrete alternatives.
Availability
LTC1235CSW#PBF is available at Aetrix Electronics and suitable for battery-powered computers, automotive telematics modules, and intelligent medical instruments requiring stable component supply and long-lifecycle support.
Supply support for LTC1235CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC1235CSW#PBF belongs to Linear's legacy μP supervisory product line, designed specifically for systems requiring coordinated power monitoring, battery-backed memory protection, and deterministic reset behavior in harsh or energy-constrained environments.
FAQ
What is the guaranteed minimum VCC voltage at which LTC1235CSW#PBF asserts RESET?
The LTC1235CSW#PBF guarantees RESET remains logic low down to VCC = 1V, ensuring the microprocessor stays in a stable reset state even during deep brownout conditions. This specification is explicitly tested and guaranteed across the full 0°C to 70°C operating temperature range, unlike many supervisors that degrade below 2.5V. The LTC1235CSW#PBF achieves this via robust internal biasing and rail-to-rail output stage design.
How does the BACKUP pin control battery usage in LTC1235CSW#PBF?
The BACKUP pin on the LTC1235CSW#PBF is sampled and latched when VCC crosses the 4.65V reset threshold during power-down; a high level enables VBATT-to-VOUT switchover, while low disables it to enter Battery Saving Mode. This latching occurs once per power cycle and persists through subsequent VCC fluctuations, allowing firmware to preconfigure backup behavior before shutdown. The LTC1235CSW#PBF datasheet confirms this behavior in Note 5 and Figure 1235 F04.
Can LTC1235CSW#PBF drive more than 50mA to VOUT?
Yes - the LTC1235CSW#PBF supports >50mA loads via the BATT ON output, which can sink 35mA to drive the base of an external PNP transistor configured as a high-current pass device. This topology avoids injecting substrate current into VBATT (a limitation of PNP-based competitors) and maintains the LTC1235CSW#PBF's 1μA standby current advantage. The recommended circuit is shown in Figure 1235 F03 of the datasheet.
What is the purpose of the LOW LINE output on LTC1235CSW#PBF?
The LOW LINE output on the LTC1235CSW#PBF is an active-low comparator flag indicating VCC has fallen below the 4.65V reset threshold, but without the 200ms reset timer delay. It provides immediate notification of supply degradation for system-level diagnostics or non-critical alerts, while RESET handles the actual processor reset sequence. LOW LINE returns high as soon as VCC rises above threshold, enabling fast response to transient dips that don't require full reset.
Does LTC1235CSW#PBF include thermal protection?
Yes, the LTC1235CSW#PBF incorporates thermal limiting that disables the VOUT power switch at approximately 155°C with 10°C hysteresis, preventing damage during sustained overload or short-circuit conditions. This protection operates independently of VCC and VBATT levels and is active in both normal and battery backup modes. The thermal shutdown behavior is documented in the Applications Information section (page 9) of the LTC1235 datasheet.
LTC1235CSW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Open Drain, Open Drain
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LTC1235CSW#PBF FAQ
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6.How does Aetrix verify that LTC1235CSW#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1235CSW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1235CSW#PBF meets industry standards.
7.What is the process for return or replacement of LTC1235CSW#PBF?
All LTC1235CSW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1235CSW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1235CSW#PBF part is unused and in its original packaging.
Return procedure for LTC1235CSW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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