Analog Devices Inc. LTC1261CS#PBF
- Part No.:
- LTC1261CS#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LTC1261CS#PBF.pdf
- Description:
- IC REG CHARGE PUMP ADJ 12MA 14SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1261CS#PBF from Analog Devices (formerly Linear Technology) is a 14-lead SOIC switched-capacitor regulated voltage inverter IC that generates a stable negative output from a single 3V–6.5V positive supply. It delivers up to 12mA output current with ±5% regulation, 5mV typical output ripple, and features an open-drain REG pin indicating regulation status. It supports both doubler and tripler modes for flexible voltage inversion in space-constrained battery-powered systems.
For engineers reviewing the LTC1261CS#PBF datasheet, LTC1261CS#PBF pinout, LTC1261CS#PBF application, or LTC1261CS#PBF equivalent, this page provides verified pin functions, mode-specific capacitor configurations, regulation behavior under load, shutdown current (5µA), and design-critical trade-offs between tripler-mode versatility and doubler-mode simplicity.
Technical Context
The LTC1261CS#PBF implements a dual-mode charge pump: in doubler mode it achieves VOUT = –VCC using one flying capacitor (C1+ to C2–), while in tripler mode it reaches VOUT ≈ –2×VCC using two independent flying capacitors (C1+–C1– and C2+–C2–). Its internal 1.24V reference and dual-comparator feedback loop enable precise output regulation and a dedicated REG flag signaling ±5% output tolerance.
Operation relies on a fixed 550kHz internal oscillator driving MOSFET switches; regulation is achieved by cycle-by-cycle duty-cycle truncation via an RS latch controlled by COMP1, while COMP2 (1.18V threshold) drives the open-drain REG output. The ADJ/COMP pin accepts either external resistor dividers or internal resistor-string taps (R0/R1/RADJ) for fixed outputs of –3.5V, –4V, –4.5V, or –5V without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage Range | Adjustable –1.25V to –8V; factory-configurable fixed options: –3.5V, –4V, –4.5V, –5V |
| Input Supply Range | 3V to 6.5V; absolute max 9V - limits usable output range in tripler mode to avoid exceeding 12V VCC–VOUT |
| Output Current | Up to 12mA with guaranteed ±5% regulation; short-circuit current ≥60mA |
| Oscillator Frequency | Fixed 550kHz - determines charge-transfer timing and sets minimum output droop (≈8.2mV at 15mA/3.3µF) |
| Quiescent Current | 600µA typical operating; drops to 5µA in shutdown - enables ultra-low-power battery operation |
| Output Ripple | 5mV typical at 5mA/–4V; reduced further with 100pF ADJ-to-GND compensation or ≥10µF output capacitance |
| REG Output Logic | Open-drain N-channel; sinks 8mA at 5V VCC; valid pull-up voltage up to 12V above ground |
Pinout & Package
Package: 14-lead narrow-body SOIC (SO-14), 0°C to 70°C commercial temperature range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| NC (Pin 1) | No internal connection | Must remain unconnected; no routing or grounding required |
| C1+ (Pin 2) | Flying capacitor positive terminal (Mode-dependent) | In doubler mode: connects to C2–; in tripler mode: connects to C1– |
| C1– (Pin 3) | Flying capacitor negative terminal (Tripler) / Floating (Doubler) | In tripler mode: connects to C1+; in doubler mode: left floating |
| C2+ (Pin 4) | Secondary flying capacitor positive terminal | Used only in tripler mode; connects to C2–; must float in doubler mode |
| C2– (Pin 5) | Secondary flying capacitor negative terminal | In tripler mode: connects to C2+; in doubler mode: connects to C1+ |
| GND (Pin 6) | Analog and power ground reference | Low-impedance connection essential for regulation accuracy; benefits from ground plane |
| R0 (Pin 7) | Internal resistor string tap (1st) | Enables factory-set fixed outputs when strapped with RADJ and/or R1 |
| R1 (Pin 8) | Internal resistor string tap (2nd) | Used with R0 and RADJ to select –3.5V/–4V/–4.5V/–5V without external resistors |
| RADJ (Pin 9) | Internal resistor string output node | Connected internally to ADJ in fixed-output variants; used for pin-strapping |
| ADJ/COMP (Pin 10) | Feedback input (adjustable) / Compensation node (fixed) | Voltage divider input for regulation setpoint; 100pF to GND reduces ripple via loop compensation |
| OUT (Pin 11) | Negative regulated output | Requires ≥3.3µF low-ESR bypass capacitor for specified ripple; minimum 1µF for basic operation |
| REG (Pin 12) | Regulation status indicator | Open-drain output pulls low when |VOUT| is within 5% of set value; requires external pull-up |
| SHDN (Pin 13) | Shutdown control input | Logic-low enables operation; floating defaults to active via 5µA internal pull-down; high disables charge pump |
| VCC (Pin 14) | Positive power supply input | Must be bypassed with ≥0.1µF ceramic capacitor placed adjacent to pin; 3V–6.5V operational range |
Key Features
| Feature | Design Value |
|---|---|
| Dual-mode charge pump architecture | Supports both doubler (VOUT = –VCC) and tripler (VOUT ≈ –2×VCC) topologies - enables –5V generation from 3.3V supply |
| Integrated resistor string with pin-strappable outputs | Four factory-selectable fixed outputs (–3.5V, –4V, –4.5V, –5V) using R0/R1/RADJ - eliminates external feedback resistors |
| Regulation status flag with wide-voltage tolerance | REG pin sinks 8mA at 5V and tolerates up to 12V pull-up - interoperates with higher-voltage monitoring logic |
| Ultra-low shutdown quiescent current | 5µA typical shutdown current - extends battery life in intermittent-use portable instruments |
| Compensation-capable feedback node | ADJ/COMP pin accepts 100pF capacitor to ground - stabilizes regulation loop and reduces ripple under dynamic loads |
Applications
| Portable Medical Sensors | Industrial Data Acquisition |
|---|---|
|
Use Scenario: Powering precision op-amps and ADC front-ends in handheld ECG or pulse oximeter units with single-cell Li-ion (3.3V–4.2V) supply. IC Role / Device Role / Timing Role: Generates clean –5V rail for analog signal conditioning circuitry requiring bipolar supplies. Use Value: Enables true rail-to-rail input range and offset cancellation without dual batteries; 5mV ripple prevents noise coupling into µV-level bio-signals. |
Use Scenario: Providing isolated negative bias for 4–20mA transmitter current-loop drivers in PLC I/O modules. IC Role / Device Role / Timing Role: Supplies regulated –4.5V to op-amp summing junctions and DAC output buffers in industrial analog output stages. Use Value: Maintains ±5% regulation across 0–70°C ambient and 3.3–5V input variation - ensures current-loop accuracy over full temperature and supply range. |
| Battery-Powered Test Equipment | Low-Power IoT Edge Nodes |
|
Use Scenario: Generating –3.5V for RF mixer bias and PLL VCO tuning in portable spectrum analyzers powered by 3.7V LiPo. IC Role / Device Role / Timing Role: Delivers low-noise negative supply with fast turn-on (<500µs) and shutdown capability for duty-cycled measurement bursts. Use Value: 600µA operating and 5µA shutdown current minimizes average power draw during idle periods - extends field calibration time per charge. |
Use Scenario: Biasing GaAs FETs and low-noise amplifiers in LPWAN sensor nodes operating from coin-cell (3V) sources. IC Role / Device Role / Timing Role: Provides –4V gate bias with tripler-mode operation to overcome VGS(th) limitations of enhancement-mode GaAs devices. Use Value: Achieves –4V output from 3V input without transformer or inductor - preserves PCB area and eliminates magnetic EMI in compact wireless modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar regulated negative voltage inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX680ESA+ | 8-pin SOIC, fixed –5V output only, 10mA max output, no REG pin, 120kHz oscillator | Lacks adjustable output, regulation flag, and tripler mode - suitable only for simple fixed-rail needs | Select when board space is critical and only –5V is required; avoid if regulation monitoring or >10mA load needed |
| LTC7149EMSE#PBF | 16-pin MSE, synchronous buck-boost topology, 3.3V–40V input, –5V @ 2A, integrated MOSFETs | Higher current, wider input range, but requires inductor and more complex layout - not capacitor-only solution | Choose for high-current (>100mA) or wide-input industrial applications where efficiency and thermal performance outweigh size constraints |
Compared with MAX680ESA+ and LTC7149EMSE#PBF, the LTC1261CS#PBF uniquely balances capacitor-based simplicity, dual-mode flexibility, regulation visibility, and ultra-low shutdown current - making it optimal for <12mA, space-constrained, battery-operated systems needing configurable negative rails.
Availability
LTC1261CS#PBF is available at Aetrix Electronics and suitable for portable medical sensors, industrial data acquisition modules, battery-powered test equipment, and low-power IoT edge nodes requiring stable component supply with long-term lifecycle support.
Supply support for LTC1261CS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) acquired Linear Technology in 2017 and maintains its legacy precision analog portfolio, including high-reliability switched-capacitor regulators and power management ICs.
The LTC1261CS#PBF belongs to Linear's legacy switched-capacitor voltage converter family, designed specifically for generating tightly regulated negative supplies in size- and power-sensitive applications where inductors are prohibited.
FAQ
What is the maximum input voltage the LTC1261CS#PBF can tolerate?
The LTC1261CS#PBF has an absolute maximum supply voltage rating of 9V. However, for reliable operation with regulation, the input must stay within 3V to 6.5V. Exceeding 6.5V risks violating the 12V VCC–VOUT limit - especially in tripler mode - and may cause loss of regulation or device damage. Always observe the derating curves in the datasheet for outputs below –4.5V.
Can the LTC1261CS#PBF generate –5V from a 3.3V supply?
Yes, the LTC1261CS#PBF can generate –5V from a 3.3V supply using tripler mode, which produces VOUT ≈ –2×VCC. This requires connecting two 0.1µF flying capacitors (C1+–C1– and C2+–C2–) and configuring the internal resistor string (e.g., R0 + RADJ) for –5V output. Output regulation is guaranteed up to 6mA load in this configuration.
How does the REG pin on the LTC1261CS#PBF function?
The REG pin on the LTC1261CS#PBF is an open-drain output that pulls low when the magnitude of VOUT is within 5% of the programmed setpoint (e.g., –4.75V to –5.25V for a –5V target). It sinks up to 8mA at 5V VCC and tolerates pull-up voltages up to 12V. An external pull-up resistor is mandatory for high-state indication; REG remains high-impedance when regulation is not met.
What external capacitors are required for basic operation of the LTC1261CS#PBF?
For basic doubler-mode operation, the LTC1261CS#PBF requires: one 0.1µF flying capacitor (C1+ to C2–), one ≥0.1µF VCC bypass capacitor (ceramic, placed near Pin 14), and one ≥3.3µF output capacitor (low-ESR, placed near Pin 11). In tripler mode, add a second 0.1µF flying capacitor (C2+ to C2–). A 100pF capacitor from ADJ (Pin 10) to GND further reduces ripple.
Is the LTC1261CS#PBF pin-compatible with the LTC1261CS8#PBF?
No, the LTC1261CS#PBF (14-pin SOIC) is not pin-compatible with the LTC1261CS8#PBF (8-pin SOIC). The LTC1261CS#PBF includes dedicated C2+, C2–, R0, R1, and RADJ pins enabling tripler mode and internal resistor-string configuration, while the LTC1261CS8#PBF omits these and supports only doubler mode with simplified pinout. PCB layout and external component count differ significantly.
LTC1261CS#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 8V
- Voltage - Output (Min/Fixed):
- -1.25V
- Voltage - Output (Max):
- -8V
- Current - Output:
- 12mA
- Frequency - Switching:
- 550kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
LTC1261CS#PBF FAQ
1.How can I place an order for LTC1261CS#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1261CS#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1261CS#PBF reliable?
The price and inventory of LTC1261CS#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1261CS#PBF is usually 5 days.
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Once your LTC1261CS#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1261CS#PBF?
For technical support, including LTC1261CS#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1261CS#PBF requirements.
6.How does Aetrix verify that LTC1261CS#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1261CS#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1261CS#PBF meets industry standards.
7.What is the process for return or replacement of LTC1261CS#PBF?
All LTC1261CS#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1261CS#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1261CS#PBF part is unused and in its original packaging.
Return procedure for LTC1261CS#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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