Analog Devices Inc. LTC1261LCMS8#PBF
- Part No.:
- LTC1261LCMS8#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC1261LCMS8#PBF.pdf
- Description:
- IC REG CHARG PUMP ADJ 20MA 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,719
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC1261LCMS8#PBF from Analog Devices (formerly Linear Technology) is a switched-capacitor regulated voltage inverter IC that generates a stable negative output from a single positive 2.7V–5.25V supply. It delivers up to 20mA at ±4.5% regulation, features an open-drain REG flag, 650µA typical quiescent current, and operates in an 8-pin MSOP package. It is used in GaAs FET bias generation and battery-powered systems requiring compact, low-noise negative rails.
For engineers reviewing the LTC1261LCMS8#PBF datasheet, LTC1261LCMS8#PBF pinout, LTC1261LCMS8#PBF application, or LTC1261LCMS8#PBF equivalent, key selection considerations include output regulation tolerance (±4.5%), shutdown current (5µA), ADJ/COMP pin functionality for adjustable or compensated operation, and compatibility with ceramic flying/output capacitors (0.1µF and ≥3.3µF).
Technical Context
The LTC1261LCMS8#PBF implements a 650kHz fixed-frequency charge pump with internal oscillator and feedback-controlled duty cycle modulation. Regulation is achieved by comparing a resistor-divided output voltage (at ADJ) against a 1.23V internal reference relative to VOUT - not ground - enabling precise negative-voltage control without dual supplies.
Its REG pin uses a secondary comparator (1.17V reference) to assert low when output magnitude is within 5% of setpoint, supporting power-valid signaling. Shutdown disables the pump, collapsing VOUT to 0V and reducing ICC to 5µA, while internal 5µA SHDN pull-down ensures default active operation when floating.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage Range | Adjustable from –1.23V to –5V; set via external resistor divider on ADJ pin |
| Supply Voltage Range | 2.7V to 5.25V - supports single-cell Li-ion and 3.3V/5V logic rails |
| Output Regulation Accuracy | ±4.5% over full load (0–20mA) and supply range - guarantees stable bias under varying load |
| Quiescent Current | 650µA typical during operation; drops to 5µA in shutdown - enables ultra-low-power standby |
| Oscillator Frequency | 650kHz fixed internal clock - enables small external capacitors and predictable ripple frequency |
| REG Output Function | Open-drain flag asserting low when |VOUT| is within 5% of target - provides system-level power-good indication |
| Max Output Current | 20mA continuous - sufficient for GaAs FET gate bias and low-power analog circuitry |
Pinout & Package
Package: 8-lead plastic MSOP (MS8), 3.0mm × 3.0mm body, 0.65mm pitch, exposed pad optional. Thermal resistance θJA = 200°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 1) | Positive power input | Must be bypassed with ≥1µF ceramic capacitor; accepts 2.7V–5.25V single supply |
| C1+ (Pin 2) | Flying capacitor positive terminal | Connects to C1+ side of 0.1µF flying capacitor; forms charge-transfer path |
| C1– (Pin 3) | Flying capacitor negative terminal | Completes flying cap connection; internal switching alternates polarity to generate negative voltage |
| GND (Pin 4) | Analog ground reference | Low-impedance return for VCC, OUT, and regulation loop; ground plane recommended |
| ADJ (Pin 5) | Feedback adjust input | Accepts resistor-divider output voltage; referenced to VOUT (not GND); sets regulation point at 1.23V |
| OUT (Pin 6) | Negative regulated output | Delivers –1.23V to –5V; requires ≥3.3µF output capacitor with low ESR for <7mV ripple at 15mA |
| REG (Pin 7) | Regulation status flag | Open-drain N-channel; sinks ≥5mA at 5V VCC; pulls low when |VOUT| is within 5% of setpoint |
| SHDN (Pin 8) | Shutdown control | Active-low enable; internally pulled down (5µA); floating = normal operation; high = 5µA shutdown mode |
Key Features
| Feature | Design Value |
|---|---|
| Single-supply negative generation | Eliminates need for dual supplies or inductors - reduces BOM count and board area |
| Adjustable output via ADJ pin | Enables custom bias voltages (e.g., –0.5V, –2V, –4.5V) using two external resistors |
| Optional COMP capacitor support | 100pF from ADJ to GND improves regulation loop stability and reduces output ripple |
| Guaranteed ±4.5% regulation | Maintains accuracy across temperature (0°C to 70°C) and load (0–20mA) - suitable for precision biasing |
| Indefinite output short-circuit tolerance | Withstands VOUT = 0V continuously without damage - enhances system robustness |
Applications
| GaAs FET Bias Generator | Negative Supply Generator |
|---|---|
Use Scenario: Providing precise negative gate bias for GaAs power amplifier transmitters in portable RF modules. IC Role / Device Role / Timing Role: Regulated voltage inverter generating –4V or –4.5V from 5V main rail, with REG flag confirming stable bias before RF activation. Use Value: Enables clean turn-on of P-channel power switches and eliminates gate leakage-induced drift via ±4.5% regulation and low 650µA quiescent draw. | Use Scenario: Generating isolated negative supply for op-amp dual-rail operation in handheld test equipment. IC Role / Device Role / Timing Role: Compact charge-pump inverter delivering –2.5V to –5V from 3.3V microcontroller rail, with ADJ pin allowing fine-tuning to match analog front-end requirements. Use Value: Avoids bulky inductive DC/DC converters; achieves <7mV ripple with 3.3µF ceramic output cap and 650kHz switching - simplifies EMI filtering. |
| Battery-Powered Systems | Single-Supply Signal Conditioning |
Use Scenario: Extending dynamic range of ADCs and DACs in coin-cell–powered IoT sensors. IC Role / Device Role / Timing Role: Low-quiescent (650µA active, 5µA shutdown) inverter supplying –1.23V reference rail only during conversion cycles. Use Value: Doubles effective signal swing without increasing battery count; shutdown control synchronizes with MCU sleep modes to maximize runtime. | Use Scenario: Biasing instrumentation amplifiers in medical wearable devices operating from a single 3.3V LiPo cell. IC Role / Device Role / Timing Role: Adjustable inverter setting –2.0V output via ADJ resistor network to center bipolar signals around mid-supply. Use Value: Maintains ±4.5% regulation across battery discharge (3.6V → 2.7V), ensuring consistent common-mode rejection and offset stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX680ESA+ | Fixed –5V output; no ADJ pin; 120µA IQ; requires 4.5V–5.5V supply | Lacks adjustable output and REG flag; suited only for fixed –5V use cases | Select when fixed –5V and ultra-low IQ are primary requirements; not suitable for bias tuning or power-valid signaling |
| ICL7660AIBAZ | Unregulated inverter; ±1.5% efficiency loss per stage; no REG output; 170µA IQ | No output regulation or status flag; output varies with load/supply; higher ripple | Choose only for non-critical, low-current applications where cost is paramount and regulation is unnecessary |
Compared with MAX680ESA+ and ICL7660AIBAZ, the LTC1261LCMS8#PBF uniquely combines adjustable output, ±4.5% regulation, REG flag, and MSOP packaging - making it optimal for precision GaAs biasing and battery-sensitive designs where both accuracy and status monitoring matter.
Availability
LTC1261LCMS8#PBF is available at Aetrix Electronics and suitable for GaAs FET bias generators, battery-powered instrumentation, and single-supply signal conditioning circuits requiring stable component supply, guaranteed industrial-grade traceability, and long-term lifecycle support.
Supply support for LTC1261LCMS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its legacy of high-performance analog ICs, especially in power management and precision signal conditioning.
The LTC1261LCMS8#PBF belongs to Linear's switched-capacitor voltage converter family, designed specifically for compact, inductor-free negative rail generation in space-constrained and low-noise applications such as RF biasing and portable instrumentation.
FAQ
What is the function of the ADJ pin on the LTC1261LCMS8#PBF?
The ADJ pin on the LTC1261LCMS8#PBF serves as the feedback input for output voltage regulation. It accepts a resistor-divider voltage referenced to VOUT (not ground), comparing it to an internal 1.23V reference. For the LTC1261LCMS8#PBF - the adjustable version - this allows setting output voltages from –1.23V to –5V. The pin draws only ±0.01µA bias current, minimizing divider error. In fixed-output variants like LTC1261LCMS8-4#PBF, the divider is internal and ADJ becomes COMP for optional ripple compensation.
Can the LTC1261LCMS8#PBF operate from a 3.3V supply?
Yes, the LTC1261LCMS8#PBF is fully specified to operate from 2.7V to 5.25V, including standard 3.3V rails. At 3.3V input, it can deliver regulated outputs down to –1.5V (per electrical characteristics table, VOUT = –1.448V to –1.552V at 0–10mA). Output current capability scales with input voltage - e.g., maximum 20mA is guaranteed above 3.85V VCC for –3V output. Performance remains within ±4.5% regulation across the full commercial temperature range (0°C to 70°C).
How does the REG pin on the LTC1261LCMS8#PBF indicate regulation status?
The REG pin on the LTC1261LCMS8#PBF is an open-drain output that pulls low when the magnitude of VOUT is within 5% of its setpoint (e.g., –4.75V to –5.25V for a –5V target). It sinks ≥5mA at 5V VCC and tolerates pull-up voltages up to 6V. Critically, REG asserts only when VOUT is *below* the setpoint - it stays high if VOUT is forced *above* (e.g., –4.2V for a –5V target). This behavior makes it ideal for power-valid sequencing but requires external pull-up for logic-level interfacing. The LTC1261LCMS8#PBF's REG function is implemented via a dedicated 1.17V comparator referenced to the same internal bandgap.
What external capacitors are required for basic operation of the LTC1261LCMS8#PBF?
The LTC1261LCMS8#PBF requires three mandatory external capacitors: a 0.1µF ceramic flying capacitor between C1+ and C1–, a ≥1µF ceramic input bypass capacitor from VCC to GND, and a ≥3.3µF ceramic output capacitor from OUT to GND. An optional 100pF compensation capacitor from ADJ to GND reduces output ripple by stabilizing the regulation loop. All ceramics must be X7R or better; tantalum or aluminum electrolytics require parallel 0.1µF ceramics to suppress high-frequency spikes that disrupt regulation. These values are validated in the LTC1261LCMS8#PBF's typical applications and performance curves.
Is the LTC1261LCMS8#PBF pin-compatible with other members of the LTC1261L family?
Yes, all LTC1261L variants - including LTC1261LCMS8#PBF (adjustable), LTC1261LCMS8-4#PBF (–4V fixed), and LTC1261LCMS8-4.5#PBF (–4.5V fixed) - share identical 8-pin MSOP pinouts and thermal characteristics. Pin functions (VCC, C1+, C1–, GND, ADJ/COMP, OUT, REG, SHDN) are electrically and physically identical. The only differences are internal resistor networks (for fixed versions) and minor specification limits (e.g., minimum VCC). This allows direct substitution in existing layouts when changing output voltage requirements - provided external components (e.g., ADJ resistors vs. COMP cap) are updated accordingly.
LTC1261LCMS8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.25V
- Voltage - Output (Min/Fixed):
- -1.23V
- Voltage - Output (Max):
- -5V
- Current - Output:
- 20mA
- Frequency - Switching:
- 650kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
LTC1261LCMS8#PBF FAQ
1.How can I place an order for LTC1261LCMS8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1261LCMS8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1261LCMS8#PBF reliable?
The price and inventory of LTC1261LCMS8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1261LCMS8#PBF is usually 5 days.
3.What payment methods are accepted for LTC1261LCMS8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1261LCMS8#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1261LCMS8#PBF?
LTC1261LCMS8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1261LCMS8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1261LCMS8#PBF?
For technical support, including LTC1261LCMS8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1261LCMS8#PBF requirements.
6.How does Aetrix verify that LTC1261LCMS8#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1261LCMS8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1261LCMS8#PBF meets industry standards.
7.What is the process for return or replacement of LTC1261LCMS8#PBF?
All LTC1261LCMS8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1261LCMS8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1261LCMS8#PBF part is unused and in its original packaging.
Return procedure for LTC1261LCMS8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC1261LCMS8#PBF Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

