Analog Devices Inc. LTC1278-4CN#PBF
- Part No.:
- LTC1278-4CN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-DIP (0.300", 7.62mm)
- Datasheet:
-
LTC1278-4CN#PBF.pdf
- Description:
- IC ADC 12BIT SAR 24DIP
- Quantity:
- Payment:

- Shipping:

Inventory:212
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC1278-4CN#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 400ksps successive-approximation ADC with internal 2.42V reference, 200ns sample-and-hold, and power-down mode. It operates from single 5V or ±5V supplies, delivers ±1LSB INL/DNL, 70dB S/(N+D) at 100kHz, and supports unipolar (0V–5V) or bipolar (±2.5V) input ranges. Used in high-speed data acquisition systems requiring low-power, precision sampling.
For engineers reviewing the LTC1278-4CN#PBF datasheet, LTC1278-4CN#PBF pinout, LTC1278-4CN#PBF application, or LTC1278-4CN#PBF equivalent, key selection criteria include guaranteed no missing codes over temperature, internal synchronized clock eliminating external timing constraints, instant wake-up from shutdown (<350ns), and compatibility with DSP/microprocessor parallel interfaces via CS/RD/CONVST control signals.
Technical Context
The LTC1278-4CN#PBF implements a 12-bit capacitive DAC-based successive approximation architecture with integrated sample-and-hold and factory-trimmed internal clock. Its control logic accepts asynchronous CONVST falling-edge triggers while maintaining synchronization between conversion start and internal timing-eliminating asynchronous clock noise issues common in competing ADCs.
It features separate analog (AGND) and digital (DGND) ground pins, high-impedance analog input (±1µA leakage), and three-state parallel data outputs (D11–D0) managed by CS and RD. The internal 2.42V reference is accessible at VREF (Pin 2) and can be overdriven externally for span adjustment in bipolar mode, provided voltage stays within 2.45V–4.8V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with guaranteed no missing codes over full temperature range |
| Max Sampling Rate | 400ksps - defines maximum throughput for continuous acquisition without data loss |
| INL / DNL | ±1LSB - ensures monotonicity and ≤0.024% full-scale linearity error |
| S/(N + D) | 70dB at 100kHz - corresponds to ~11.7 effective bits for signal fidelity in baseband applications |
| Power Dissipation | 75mW typical at 400ksps - enables thermal management in dense PCB layouts |
| Shutdown Power | 8.5mW - reduces system-level idle power by >88% during inactive periods |
| Analog Input Range | 0V to 5V (unipolar) or ±2.5V (bipolar) - matches standard sensor and signal chain output levels |
Pinout & Package
Package: 24-pin narrow plastic DIP (N package), through-hole mount, 0.300" wide body, RoHS-compliant #PBF finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN (1) | Analog Input | High-impedance node accepting 0V–5V or ±2.5V signals; requires <200ns settling after acquisition spike |
| VREF (2) | Reference Output | 2.42V ±20mV bandgap reference; drives up to 1mA; bypass with 10µF + 0.1µF to AGND |
| AGND (3) | Analog Ground | Single-point return for analog circuitry; must be isolated from DGND except at star point |
| D11–D4 (4–11) | Data Outputs (MSB) | Three-state parallel bus outputs; active when CS=LOW and RD=LOW; D11 = MSB |
| DGND (12) | Digital Ground | Return for DVDD and digital interface; connected to system logic ground, not AGND |
| AVDD (24) | Analog Supply | +5V supply for analog section; bypass with 10µF tantalum + 0.1µF ceramic to AGND |
| VSS (23) | Negative Supply | –5V for bipolar operation; bypass with 0.1µF ceramic to AGND |
| CONVST (19) | Conversion Start | Active-low edge-triggered input; initiates SAR cycle on falling edge when CS=LOW |
| SHDN (18) | Shutdown Control | Active-low input; places ADC in low-power state with <350ns wake-up latency to first conversion |
| BUSY (22) | Status Output | Open-drain active-low signal indicating conversion in progress; used for handshaking with FIFO/DSP |
Key Features
| Feature | Design Value |
|---|---|
| Internal synchronized clock | Factory-trimmed to 2.0µs max throughput time - eliminates need for external clock routing and skew management |
| Instant wake-up from shutdown | 350ns max delay from SHDN↑ to valid CONVST response - enables power gating between individual samples |
| Flexible unipolar/bipolar operation | Single device supports both 0V–5V and ±2.5V input spans via supply configuration - reduces BOM count in multi-range systems |
| Overdrivable reference pin | VREF accepts external 2.45V–4.8V drive for precise bipolar span tuning - avoids external op-amp buffers in calibration-critical designs |
| Guaranteed monotonicity | No missing codes across –40°C to +85°C - ensures deterministic behavior in closed-loop control applications |
Applications
| High-Speed Data Acquisition | Digital Signal Processing |
|---|---|
Use Scenario: Simultaneous sampling of multiple sensor channels (e.g., vibration, temperature, pressure) in industrial PLCs with real-time FFT analysis. IC Role / Device Role / Timing Role: Precision 12-bit sampling front-end with 400ksps sustained rate and deterministic BUSY signaling for DMA-driven buffer filling. Use Value: ±1LSB linearity and 70dB S/(N+D) preserve dynamic range for detecting sub-millivolt anomalies in noisy factory environments. | Use Scenario: Real-time audio preprocessing in telecom gateways, including echo cancellation and spectral shaping before codec encoding. IC Role / Device Role / Timing Role: Low-latency analog capture stage interfaced directly to TI C6000 DSP via parallel bus using CS/RD handshake protocol. Use Value: Internal clock synchronization prevents timing jitter-induced distortion, maintaining THD ≤ –78dB at 100kHz for clean voice-band fidelity. |
| Multiplexed Data Acquisition Systems | Spectrum Analysis |
Use Scenario: Channel-scanned RF front-end in portable spectrum analyzers, where one ADC digitizes outputs from switched filter banks. IC Role / Device Role / Timing Role: High-Z analog input and fast 200ns acquisition enable clean sampling after multiplexer settling without guard-banding. Use Value: 4.95–5.25V AVDD tolerance and ±1µA input leakage ensure minimal crosstalk and offset drift across 16-channel scan cycles. | Use Scenario: Baseband IF sampling in software-defined radio receivers, capturing 0–200kHz bandwidth for real-time spectral display and occupancy detection. IC Role / Device Role / Timing Role: Full linear bandwidth of 350kHz (S/(N+D) ≥ 68dB) supports undersampling of higher-frequency signals with preserved ENOB. Use Value: 74dB THD at Nyquist allows accurate harmonic content measurement up to 200kHz without aliasing artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit, medium-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7892BRZ-1 | 400ksps, 12-bit SAR ADC with internal reference; requires external clock; no shutdown mode | Lacks power-down feature and internal clock sync - needs careful clock domain crossing design | Choose when board space allows external clock generation and continuous operation is preferred |
| MAX11200EEE+ | 18-bit, 1ksps delta-sigma ADC; no internal reference; SPI interface only | Higher resolution but 2.5× slower; serial interface increases CPU overhead vs parallel bus | Choose for ultra-high DC accuracy in low-speed sensor monitoring, not real-time acquisition |
Compared with AD7892BRZ-1 and MAX11200EEE+, the LTC1278-4CN#PBF uniquely combines internal clock synchronization, instant wake-up shutdown, and parallel DSP interface - making it optimal for power-constrained, high-throughput embedded systems where timing determinism and interface simplicity are critical.
Availability
LTC1278-4CN#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition, digital signal processing, and multiplexed sensor systems requiring stable component supply, long-term obsolescence planning, and traceable sourcing.
Supply support for LTC1278-4CN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC1278-4CN#PBF belongs to ADI's legacy Linear Technology precision data converter family, designed specifically for embedded systems demanding low-power, high-accuracy sampling with minimal external components and robust noise immunity.
FAQ
What is the maximum sampling rate supported by the LTC1278-4CN#PBF?
The LTC1278-4CN#PBF is rated for a maximum sampling rate of 400ksps, corresponding to a minimum throughput time of 2.5µs (acquisition + conversion). This is confirmed in the Absolute Maximum Ratings table and Timing Characteristics section of the official datasheet, where fSAMPLE(MAX) for LTC1278-4 is specified as 400kHz under recommended operating conditions. Exceeding this rate may result in reduced AC performance or missing codes.
Does the LTC1278-4CN#PBF require an external clock source?
No, the LTC1278-4CN#PBF does not require an external clock. It contains a factory-trimmed internal clock that automatically synchronizes to each CONVST command, eliminating clock routing complexity and asynchronous noise issues. The internal clock ensures consistent 2.0µs max throughput time for the LTC1278-4 variant, and no external clock connections or adjustments are needed for basic operation.
Can the LTC1278-4CN#PBF operate with a single 5V supply in bipolar mode?
No, the LTC1278-4CN#PBF cannot operate in bipolar mode with only a single 5V supply. Bipolar operation requires both AVDD = +5V and VSS = –5V (or –2.45V to –5.25V per Absolute Maximum Ratings), as the ±2.5V input range depends on symmetric dual supplies. Attempting bipolar conversion with only +5V will violate the analog input voltage specification and cause code errors or damage.
What is the wake-up time from shutdown for the LTC1278-4CN#PBF?
The wake-up time from shutdown for the LTC1278-4CN#PBF is 350ns maximum, measured from SHDN rising edge to the ability to accept a valid CONVST falling edge. This parameter is explicitly listed in the Timing Characteristics table under t3 (SHDN↑ to CONVST↓ Wake-Up Time) and applies across the commercial temperature range (0°C to 70°C). This enables aggressive power gating between individual conversions without sacrificing throughput.
How is the reference voltage configured for unipolar versus bipolar operation in the LTC1278-4CN#PBF?
In unipolar mode (0V–5V input), the LTC1278-4CN#PBF uses its internal 2.42V reference directly - no external connection to VREF is required. In bipolar mode (±2.5V input), the same internal reference remains active, but the VREF pin may be overdriven with an external 2.45V–4.8V source to adjust full-scale span; driving below 2.45V risks conflict with the internal reference and degraded accuracy.
LTC1278-4CN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 400k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V, -2.45V ~ 5.25
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-PDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
LTC1278-4CN#PBF FAQ
1.How can I place an order for LTC1278-4CN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1278-4CN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1278-4CN#PBF reliable?
The price and inventory of LTC1278-4CN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1278-4CN#PBF is usually 5 days.
3.What payment methods are accepted for LTC1278-4CN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1278-4CN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1278-4CN#PBF?
LTC1278-4CN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1278-4CN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1278-4CN#PBF?
For technical support, including LTC1278-4CN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1278-4CN#PBF requirements.
6.How does Aetrix verify that LTC1278-4CN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1278-4CN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1278-4CN#PBF meets industry standards.
7.What is the process for return or replacement of LTC1278-4CN#PBF?
All LTC1278-4CN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1278-4CN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1278-4CN#PBF part is unused and in its original packaging.
Return procedure for LTC1278-4CN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC1278-4CN#PBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

