Analog Devices Inc. LTC1279CG#TRPBF
- Part No.:
- LTC1279CG#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC1279CG#TRPBF.pdf
- Description:
- IC ADC 12BIT SAR 24SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1279CG#TRPBF from Analog Devices (formerly Linear Technology) is a 12-bit, 600ksps successive-approximation ADC with internal reference, synchronized clock, and flexible parallel interface. It operates from single 5V or ±5V supplies, delivers 70dB S/(N+D) at 100kHz input, consumes 60mW typical power, and supports unipolar (0V–5V) or bipolar (±2.5V) input ranges - ideal for high-speed data acquisition in DSP-based instrumentation.
For engineers reviewing the LTC1279CG#TRPBF datasheet, LTC1279CG#TRPBF pinout, LTC1279CG#TRPBF application, or LTC1279CG#TRPBF equivalent, key selection considerations include guaranteed ±1LSB INL/DNL, 1.4µs conversion time with instant wake-up from shutdown, 24-pin SO wide package compatibility, and support for FIFO/microprocessor interfacing via BUSY/CONVST/RD control signals.
Technical Context
The LTC1279CG#TRPBF implements a 12-bit capacitive DAC-based successive approximation architecture with integrated 160ns sample-and-hold and factory-trimmed internal 2.42V bandgap reference. Its internally synchronized clock eliminates asynchronous clock noise and ensures deterministic timing without external clock sourcing.
Control logic supports two read modes (Mode 1a/1b), uses active-low CONVST to initiate conversion, and asserts BUSY low during conversion. The parallel 12-bit output (D11–D0) is three-state controlled by CS and RD, enabling direct connection to microprocessors, DSPs, and FIFOs without glue logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - guarantees monotonic transfer function for precision measurement systems. |
| Sampling Rate | 600ksps maximum - enables real-time capture of signals up to 300kHz Nyquist bandwidth. |
| S/(N + D) | 70dB at 100kHz input - supports >11.3 effective bits for high-fidelity signal digitization. |
| INL / DNL | ±1LSB max - ensures accurate code transition alignment critical for calibration-sensitive applications. |
| Power Dissipation | 60mW typ at 600ksps; 8.5mW in shutdown - allows thermal-constrained embedded deployment with instant wake-up. |
| Conversion Time | 1.4µs typ - defines minimum throughput interval and enables tight timing control in synchronous systems. |
| Analog Input Range | 0V to 5V (unipolar, 5V supply) or ±2.5V (bipolar, ±5V supply) - supports both single-ended and differential-sense signal conditioning topologies. |
Pinout & Package
Package: 24-lead plastic SO wide (SW), RoHS-compliant, JEDEC MS-013AC, body width 7.5mm, lead pitch 1.27mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN (1) | Analog Input | High-impedance node accepting 0V–5V (unipolar) or ±2.5V (bipolar); requires <160ns settling after sample hold acquisition. |
| VREF (2) | Reference Output | 2.42V ±20mV buffered reference output; capable of sourcing up to 800µA; must be bypassed with 10µF + 0.1µF. |
| AGND (3) | Analog Ground | Single-point analog return; must be isolated from DGND except at package substrate or star ground point. |
| D11–D4 (4–11) | Data Outputs (MSB) | Three-state parallel bus outputs; D11 = MSB; enabled only when CS = LOW and RD = LOW. |
| DGND (12) | Digital Ground | Digital return path; connected to AGND only at single point to minimize digital noise coupling into analog section. |
| D3–D0 (13–16) | Data Outputs (LSB) | Completes 12-bit parallel word; D0 = LSB; same enable conditions as D11–D4. |
| DVDD (17) | Digital Supply | +5V digital rail; tied directly to AVDD per layout guidelines to minimize supply rail separation. |
| SHDN (18) | Shutdown Control | Active-low input; pulls supply current to 1.7mA typ; wake-up latency ≤350ns - suitable for burst-mode operation. |
| CONVST (19) | Conversion Start | Falling-edge triggered; initiates SAR cycle only when CS = LOW; minimum pulse width 40ns. |
| RD (20) | Read Strobe | Active-low; enables output drivers and latches valid data on BUSY rising edge in Mode 2 timing. |
| CS (21) | Chip Select | Active-low enable for CONVST and RD recognition; required for all control signal acceptance. |
| BUSY (22) | Status Output | Open-drain or push-pull (per config); LOW during conversion; used for handshaking with processors/FIFOs. |
| VSS (23) | Negative Supply | –5V for bipolar mode; tied to AGND for unipolar mode; bypassed with 0.1µF ceramic close to pin. |
| AVDD (24) | Analog Supply | +5V analog rail; bypassed with 10µF tantalum + 0.1µF ceramic; shared with DVDD per design recommendations. |
Key Features
| Feature | Design Value |
|---|---|
| Internal synchronized clock | Eliminates need for external clock source and avoids jitter/noise coupling from asynchronous clock domains. |
| Flexible parallel interface | Supports multiple timing modes (Mode 1a/1b/2) and three-state outputs - simplifies integration with diverse microprocessor buses. |
| Instant wake-up from shutdown | 350ns max SHDN↑ to CONVST↓ delay - enables power gating between samples without throughput penalty. |
| Overdrivable internal reference | VREF pin accepts external 2.45V–4.8V reference - permits full-scale adjustment and improved drift performance (e.g., with LT1019A-2.5). |
| High-impedance analog input | 25pF input capacitance in sample mode; ±1µA leakage - reduces burden on driving amplifiers and eases front-end design. |
| Guaranteed AC performance | 70dB S/(N+D) and –78dB THD at 100kHz over temperature - ensures consistent dynamic accuracy across industrial operating range. |
Applications
| High-Speed Data Acquisition | Digital Signal Processing |
|---|---|
|
Use Scenario: Real-time waveform capture in automated test equipment sampling sensor outputs at 600ksps. IC Role / Device Role / Timing Role: Primary analog-to-digital converter providing 12-bit parallel data to FPGA-based acquisition engine. Use Value: 1.4µs conversion time and BUSY-driven handshaking ensure deterministic latency and zero data loss at full rate. |
Use Scenario: Front-end digitization in telecom baseband processing where analog IF signals require precise 12-bit resolution. IC Role / Device Role / Timing Role: ADC stage feeding fixed-point DSP core; interfaces via RD/CS-controlled parallel bus. Use Value: ±1LSB INL/DNL and 70dB S/(N+D) preserve signal integrity for FFT-based spectral analysis up to 300kHz. |
| Multiplexed Data Acquisition Systems | Audio and Telecom Processing |
|
Use Scenario: Channelized monitoring of multiple transducers in industrial PLC I/O modules using analog multiplexer switching. IC Role / Device Role / Timing Role: Shared ADC resource serving 8–16 channels via external MUX; shutdown minimizes idle power. Use Value: Instant wake-up (≤350ns) and 160ns acquisition time allow sub-microsecond channel switching overhead. |
Use Scenario: Digitizing audio-band signals in voice-over-IP gateways requiring low THD and stable reference performance. IC Role / Device Role / Timing Role: Unipolar 0V–5V ADC with internal 2.42V reference; driven by low-noise op amp (e.g., LT1360). Use Value: 78dB THD at Nyquist and ±45ppm/°C VREF tempco meet ITU-T G.711 linearity requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit, 600ksps sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7892BRZ-1 | 12-bit, 600ksps SAR ADC; requires external reference and clock; 28-lead SOIC package. | No internal reference or clock - increases BOM count and layout complexity but offers greater reference flexibility. | Select when external precision reference (e.g., ADR441) and clock synchronization are already present in system architecture. |
| MAX1166BCAP+ | 12-bit, 500ksps SAR ADC; internal reference; SPI interface; 20-pin TSSOP package. | Serial interface reduces pin count but limits throughput vs parallel bus; 100ksps slower sampling rate. | Select for space-constrained designs where microcontroller SPI resources are available and 500ksps suffices. |
Compared with AD7892BRZ-1 and MAX1166BCAP+, the LTC1279CG#TRPBF provides integrated clock and reference in a parallel-interface 24-pin SO package - reducing component count and timing validation effort while maintaining full 600ksps capability and guaranteed ±1LSB linearity.
Availability
LTC1279CG#TRPBF is available at Aetrix Electronics and suitable for high-speed data acquisition, digital signal processing, and multiplexed instrumentation systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC1279CG#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC1279CG#TRPBF belongs to ADI's legacy Linear Technology precision data conversion product line, designed specifically for high-speed, low-power, easy-to-use 12-bit sampling applications in test & measurement and embedded instrumentation.
FAQ
What is the operating temperature range for the LTC1279CG#TRPBF?
The LTC1279CG#TRPBF is specified for the commercial temperature range of 0°C to +70°C. This grade is indicated by the 'C' suffix in the part number and is validated per the Absolute Maximum Ratings table in the official datasheet. The device maintains guaranteed ±1LSB INL/DNL and 70dB S/(N+D) performance across this full range.
Does the LTC1279CG#TRPBF require an external clock?
No, the LTC1279CG#TRPBF does not require an external clock. It features an internally trimmed, synchronized clock that automatically aligns with each CONVST command, eliminating asynchronous clock noise and simplifying system timing. The internal clock is factory-set for 1.4µs conversion time and needs no external components.
Can the LTC1279CG#TRPBF operate in both unipolar and bipolar modes?
Yes, the LTC1279CG#TRPBF supports both unipolar and bipolar operation. With single +5V supply and VSS tied to AGND, it accepts 0V–5V inputs. With ±5V supplies (AVDD = +5V, VSS = –5V), it accepts ±2.5V inputs. The transfer function is naturally binary in unipolar mode and two's complement in bipolar mode - both with guaranteed ±1LSB linearity.
What is the purpose of the SHDN pin on the LTC1279CG#TRPBF?
The SHDN (shutdown) pin on the LTC1279CG#TRPBF is an active-low control that reduces supply current from 12mA typ to 1.7mA typ, cutting power dissipation from 60mW to 8.5mW. Crucially, it supports instant wake-up: conversion can begin within 350ns after SHDN returns high, making it ideal for burst-mode or duty-cycled acquisition systems.
How is the reference voltage handled in the LTC1279CG#TRPBF?
The LTC1279CG#TRPBF integrates a factory-trimmed 2.42V ±20mV bandgap reference, accessible at VREF (Pin 2). It sources up to 800µA and must be bypassed with 10µF tantalum + 0.1µF ceramic. The VREF pin can be overdriven externally (2.45V–4.8V) to adjust input span - enabling improved drift performance or custom full-scale ranges without sacrificing accuracy.
LTC1279CG#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 600k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V, -2.45V ~ 5.25
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1279CG#TRPBF FAQ
1.How can I place an order for LTC1279CG#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1279CG#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1279CG#TRPBF reliable?
The price and inventory of LTC1279CG#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1279CG#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC1279CG#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1279CG#TRPBF transactions.
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4.How is shipping managed for LTC1279CG#TRPBF?
LTC1279CG#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1279CG#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1279CG#TRPBF?
For technical support, including LTC1279CG#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1279CG#TRPBF requirements.
6.How does Aetrix verify that LTC1279CG#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1279CG#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1279CG#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1279CG#TRPBF?
All LTC1279CG#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1279CG#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1279CG#TRPBF part is unused and in its original packaging.
Return procedure for LTC1279CG#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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