Analog Devices Inc. LTC1279IG#PBF
- Part No.:
- LTC1279IG#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC1279IG#PBF.pdf
- Description:
- IC ADC 12BIT SAR 24SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,732
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC1279IG#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 600ksps successive-approximation analog-to-digital converter with internal reference, synchronized clock, and power shutdown. It operates from single 5V or ±5V supplies, delivers 70dB S/(N+D) at 100kHz, consumes 60mW typical, and supports unipolar (0V–5V) or bipolar (±2.5V) input ranges. It is used in high-speed data acquisition systems requiring precision sampling with minimal external components.
For engineers reviewing the LTC1279IG#PBF datasheet, LTC1279IG#PBF pinout, LTC1279IG#PBF application, or LTC1279IG#PBF equivalent, this page provides verified technical context, real-world interface timing constraints, confirmed AC/DC performance limits across temperature, package-specific layout guidance, and validated alternative options for signal chain design continuity.
Technical Context
The LTC1279IG#PBF implements a 12-bit capacitive DAC-based successive approximation register (SAR) architecture with integrated 160ns sample-and-hold and factory-trimmed internal 2.42V bandgap reference. Its internally synchronized clock eliminates asynchronous clock feedthrough, achieving 1.4µs conversion time without external timing components.
It features a flexible parallel digital interface with three-state outputs, active-low CONVST trigger, BUSY status flag, and independent CS/RD control - enabling direct connection to DSPs, FIFOs, and microprocessors in Mode 2 timing configuration. Power shutdown reduces current to 1.7mA with 350ns wake-up latency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes; guarantees monotonic transfer function for accurate code sequencing. |
| Sampling Rate | 600ksps maximum throughput; defines real-time bandwidth limit of 300kHz (Nyquist). |
| S/(N + D) | 70dB typical at 100kHz input; determines effective resolution of ~11.4 bits in dynamic operation. |
| INL / DNL | ±1LSB max integral and differential nonlinearity; ensures <0.025% end-point accuracy and monotonicity. |
| Power Dissipation | 60mW typical at 600ksps; drops to 8.5mW in shutdown mode - critical for low-duty-cycle sampling. |
| Analog Input Range | 0V to 5V (unipolar, 5V supply) or ±2.5V (bipolar, ±5V supply); sets full-scale span and reference dependency. |
| Conversion Time | 1.4µs typical; fixed internal timing enables deterministic latency for time-critical control loops. |
Pinout & Package
The LTC1279IG#PBF is housed in a 24-lead plastic SO wide (SW) package with gull-wing leads, rated for industrial temperature range (–40°C to +85°C). Thermal resistance θJA = 130°C/W; maximum junction temperature = 110°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN (1) | Analog Input | High-impedance node accepting 0V–5V or ±2.5V; requires ≤160ns settling after sample pulse. |
| VREF (2) | Reference Output | 2.42V ±20mV buffered output; supplies DAC and supports external overdrive (≥2.45V) for span adjustment. |
| AGND (3) | Analog Ground | Single-point return for analog circuitry; must be isolated from DGND except at package substrate. |
| D11–D0 (4–16) | Parallel Data Outputs | Three-state, MSB-first 12-bit bus; high-Z when CS high or RD low; timing-critical for t8 (35–170ns access). |
| DGND (12) | Digital Ground | Separate return for digital logic; connects to AGND only at single point near AVDD/DVDD decoupling. |
| DVDD (17) | Digital Supply | +5V supply for logic outputs; must tie directly to AVDD to minimize ground bounce. |
| SHDN (18) | Shutdown Control | Active-low enable; asserts within 350ns wake-up delay before next CONVST edge. |
| CONVST (19) | Conversion Start | Falling-edge triggered; initiates SAR cycle only when CS = low; minimum pulse width = 40ns. |
| RD (20) | Read Strobe | Active-low data latch enable; controls output driver activation during BUSY = low state. |
| CS (21) | Chip Select | Active-low decoder enable; required for CONVST/RD recognition; defines Mode 2 timing window. |
| BUSY (22) | Status Flag | Open-drain active-low output; indicates conversion in progress; synchronizes RD timing. |
| VSS (23) | Negative Supply | –5V for bipolar mode; tied to AGND for unipolar; bypass with 0.1µF ceramic close to pin. |
| AVDD (24) | Analog Supply | +5V analog rail; powers sample-and-hold and reference; bypass with 10µF tantalum + 0.1µF ceramic. |
Key Features
| Feature | Design Value |
|---|---|
| Internal synchronized clock | Eliminates external clock source and associated jitter/noise coupling; ensures deterministic 1.4µs conversion. |
| Flexible unipolar/bipolar operation | Single device supports 0V–5V or ±2.5V input ranges via supply configuration - reduces BOM count. |
| Instant wake-up from shutdown | 350ns recovery enables power gating between samples without throughput penalty in burst-mode systems. |
| Overdrivable internal reference | VREF pin accepts external voltage ≥2.45V to adjust full-scale span in bipolar mode without losing linearity. |
| High-impedance analog input | 25pF input capacitance in sample mode; draws only ±1µA leakage - simplifies driver op-amp selection. |
| Three-state parallel interface | CS/RD-controlled bus sharing allows direct connection to shared microprocessor or DSP data buses. |
Applications
| High-Speed Data Acquisition | Digital Signal Processing |
|---|---|
|
Use Scenario: Simultaneous multi-channel voltage monitoring in automated test equipment with 100kHz signal content. IC Role / Device Role / Timing Role: Primary sampling front-end ADC capturing transient waveforms with 1.4µs latency and 70dB SNR. Use Value: Enables 600ksps aggregate throughput across channels while maintaining ±1LSB linearity for calibration-grade measurements. |
Use Scenario: Real-time spectral analysis in telecom baseband processing using FFT on sampled RF IF signals. IC Role / Device Role / Timing Role: High-fidelity digitizer feeding DSP core with 12-bit resolution and low harmonic distortion (–78dB THD). Use Value: Delivers 11.4 effective bits at 100kHz, supporting accurate amplitude/frequency estimation in narrowband receivers. |
| Multiplexed Data Acquisition Systems | Audio and Telecom Processing |
|
Use Scenario: Industrial PLC analog input module scanning 16 sensors via analog multiplexer with per-channel gain/offset trim. IC Role / Device Role / Timing Role: Precision ADC with programmable shutdown per channel to minimize system power during idle intervals. Use Value: 8.5mW shutdown power and 350ns wake-up allow >90% duty-cycle reduction without sacrificing sampling fidelity. |
Use Scenario: Wideband audio digitization in professional recording interfaces requiring low-noise, low-distortion conversion. IC Role / Device Role / Timing Role: Unipolar 0V–5V ADC capturing 20kHz–200kHz ultrasonic signals with 74dB S/(N+D) at Nyquist. Use Value: Maintains >68dB S/(N+D) up to 500kHz full linear bandwidth - supports oversampling and noise shaping techniques. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit, 600ksps SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7892BRZ-1 | 12-bit, 600ksps SAR ADC; requires external reference and clock; 72dB S/(N+D) at 100kHz; 28-lead SOIC package. | No internal reference or clock; higher board-level component count; wider package increases layout area. | Select when external reference control or clock synchronization with other system elements is required. |
| MAX1166BCAP+ | 12-bit, 500ksps SAR ADC; internal reference (2.048V); 71dB S/(N+D) at 100kHz; 20-pin TSSOP package. | Lower max sampling rate (500ksps vs 600ksps); smaller package but no bipolar mode support. | Select for space-constrained unipolar-only designs where 100ksps margin is acceptable. |
Compared with AD7892BRZ-1 and MAX1166BCAP+, the LTC1279IG#PBF offers integrated clock and reference with bipolar capability in a proven 24-SO wide footprint - reducing design risk for industrial data acquisition where supply flexibility and layout simplicity are prioritized over minimal package size.
Availability
LTC1279IG#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition, digital signal processing, and multiplexed industrial sensor systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC1279IG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC1279IG#PBF belongs to Linear Technology's legacy precision data acquisition product line, designed specifically for applications demanding high DC accuracy, low power, and simplified system integration in harsh environments.
FAQ
What is the operating temperature range for the LTC1279IG#PBF?
The LTC1279IG#PBF is specified for industrial temperature operation from –40°C to +85°C. This rating is confirmed in the Absolute Maximum Ratings table and applies to all DC and AC performance specifications under recommended operating conditions. The 'I' grade suffix explicitly denotes this extended range, distinguishing it from the commercial-grade LTC1279CSW (0°C to 70°C).
Does the LTC1279IG#PBF require an external clock source?
No, the LTC1279IG#PBF does not require an external clock source. It contains an internally trimmed clock that automatically synchronizes to each CONVST falling edge, delivering a fixed 1.4µs conversion time. This eliminates clock feedthrough noise and simplifies PCB layout compared to externally clocked ADCs like the AD7892BRZ-1.
Can the LTC1279IG#PBF operate in both unipolar and bipolar modes?
Yes, the LTC1279IG#PBF supports both unipolar (0V to 5V input with single +5V supply) and bipolar (±2.5V input with ±5V supplies) operation. Mode selection is determined by VSS connection: tied to AGND for unipolar, –5V for bipolar. Full-scale range, offset error, and reference behavior differ between modes as documented in the Transfer Characteristics section.
What is the purpose of the SHDN pin on the LTC1279IG#PBF?
The SHDN (shutdown) pin on the LTC1279IG#PBF is an active-low control that reduces supply current from 12mA to 1.7mA typical, cutting power dissipation from 60mW to 8.5mW. It supports instant wake-up with 350ns latency, allowing the LTC1279IG#PBF to be powered down between conversions in low-duty-cycle applications without interrupting throughput.
How is the reference voltage handled in the LTC1279IG#PBF?
The LTC1279IG#PBF integrates a factory-trimmed 2.42V ±20mV bandgap reference available at VREF (Pin 2), capable of sourcing up to 800µA. It drives the internal DAC and can be overdriven externally (≥2.45V) to adjust full-scale span in bipolar mode. Decoupling with 10µF tantalum + 0.1µF ceramic is mandatory for optimal noise performance.
LTC1279IG#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 600k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V, -2.45V ~ 5.25
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 24-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1279IG#PBF FAQ
1.How can I place an order for LTC1279IG#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1279IG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1279IG#PBF reliable?
The price and inventory of LTC1279IG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1279IG#PBF is usually 5 days.
3.What payment methods are accepted for LTC1279IG#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1279IG#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1279IG#PBF?
LTC1279IG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1279IG#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1279IG#PBF?
For technical support, including LTC1279IG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1279IG#PBF requirements.
6.How does Aetrix verify that LTC1279IG#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1279IG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1279IG#PBF meets industry standards.
7.What is the process for return or replacement of LTC1279IG#PBF?
All LTC1279IG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1279IG#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1279IG#PBF part is unused and in its original packaging.
Return procedure for LTC1279IG#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC1279IG#PBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

