Analog Devices Inc. LTC1326CMS8#PBF
- Part No.:
- LTC1326CMS8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC1326CMS8#PBF.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,140
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC1326CMS8#PBF from Analog Devices (formerly Linear Technology) is a micropower precision triple supply monitor IC designed for systems requiring simultaneous monitoring of 2.5V, 3.3V, and adjustable supplies. It delivers ±0.75% threshold accuracy, 20µA typical supply current, 200ms internal reset delay, active-low/open-drain RST and SRST outputs, and push-button reset functionality - enabling reliable power-on, brownout, and manual reset control in portable and battery-powered equipment.
For engineers reviewing the LTC1326CMS8#PBF datasheet, LTC1326CMS8#PBF pinout, LTC1326CMS8#PBF application, or LTC1326CMS8#PBF equivalent, key selection considerations include its guaranteed reset assertion down to VCC3 ≥ 1V or VCC25 ≥ 1V, glitch-immune comparators with 13µs response time, dual-mode reset (soft/hard), and MSOP-8 package compatibility with space-constrained embedded designs.
Technical Context
The LTC1326CMS8#PBF implements three independent high-accuracy voltage comparators - one each for VCC25 (2.5V nominal), VCC3 (3.3V nominal), and VCCA (adjustable ~1V threshold) - with internal 200ms reset timer and PBR-triggered soft-reset logic. Its gate-drive architecture selects the highest valid supply (VCC3 or VCC25) to drive the RST output FET, ensuring robust low-state operation even during asymmetric power-up sequences.
It features weak internal 6µA pull-ups on RST/SRST, supports OR-tied reset sources, includes 20ms debounce on PBR, and provides override modes to configure it as dual- or single-supply monitor. The part guarantees correct reset state across –40°C to 85°C and maintains <0.4V VOL at 100µA sink current down to 1V supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Monitoring Inputs | VCC25 (2.5V), VCC3 (3.3V), VCCA (adjustable ~1V) - enables precise multi-rail validation in mixed-voltage SoC systems |
| Threshold Accuracy | ±0.75% over full temperature range - ensures deterministic reset timing without margining overhead |
| Supply Current | 20µA typical at 25°C - supports >1-year battery life in always-on monitoring applications |
| Reset Delay | 200ms nominal after all supplies exceed thresholds - meets JEDEC JESD84-B4.01 power-up timing requirements |
| Soft Reset Pulse Width | 100µs typical - allows DRAM refresh continuity during processor-initiated resets |
| Operating Temperature | –40°C to +85°C - qualified for industrial and extended-temperature embedded deployments |
| Output Type | Open-drain RST and SRST with weak 6µA internal pull-up to VCC3 - simplifies level-shifting and bus-ORing |
Pinout & Package
Package: 8-lead plastic MSOP (MS8), 3.0mm × 3.0mm body, 0.65mm pitch, RoHS-compliant #PBF marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC3 (Pin 1) | 3.3V supply sense and IC power rail | Primary power source for internal circuitry; must be bypassed with ≥0.1µF ceramic capacitor |
| VCC25 (Pin 2) | 2.5V supply sense input | Used as gate-drive source for RST FET when VCC25 > VCC3; tied to VCC3 if unused |
| VCCA (Pin 3) | Adjustable supply sense (1V threshold) | High-impedance input for monitoring logic rails or DC/DC feedback nodes; can be tied to VCC3 or VCC25 |
| GND (Pin 4) | Ground reference | Common return path for all comparators and outputs; requires low-impedance PCB connection |
| PBR (Pin 8) | Push-button reset input | Active-low, internally pulled up to VCC3 with 7µA; triggers 100µs soft reset (<2s press) or 200ms hard reset (>2s press) |
| SRST (Pin 7) | Soft reset output | Active-low open-drain output; asserts for 100µs after PBR release - used for non-disruptive processor reset |
| RST (Pin 6) | Primary reset output | Active-low open-drain logic output; asserted during power-up/brownout or after long PBR press; guaranteed low down to VCC3 = 1V |
| RST (Pin 5) | Complementary reset output | Active-high CMOS output; buffered inverse of RST pin - eliminates need for external inverter |
Key Features
| Feature | Design Value |
|---|---|
| Triple-supply monitoring with fixed 2.5V/3.3V and adjustable 1V thresholds | Enables single-chip validation of core, I/O, and logic rails in modern low-voltage processors and FPGAs |
| Guaranteed reset assertion for VCC3 ≥ 1V or VCC25 ≥ 1V | Ensures system-level reset integrity during deep brownout conditions where other monitors fail |
| Power-detect gate drive selecting highest valid supply (VCC3 or VCC25) | Eliminates external diode-OR networks and guarantees RST low-state during asymmetric power sequencing |
| 20ms PBR input debounce and 200ms reset timeout | Prevents false triggering from mechanical switch bounce and satisfies IPC-9592B reset hold-time compliance |
| Glitch-immune comparators with 13µs response time | Rejects sub-20µs supply transients without external RC filtering - reduces BOM count and board area |
| SO-8 and MSOP-8 package options with identical pinout | Allows drop-in replacement between packages; MSOP-8 saves >50% PCB footprint vs SO-8 |
Applications
| Desktop & Notebook Computers | Intelligent Instruments |
|---|---|
Use Scenario: Multi-rail motherboard power sequencing with 2.5V core, 3.3V I/O, and 1V logic supplies. IC Role / Device Role / Timing Role: Primary system reset generator coordinating CPU, chipset, and peripheral power-up timing. Use Value: Eliminates discrete reset supervisor + comparator + timer solution; ±0.75% accuracy prevents premature release of reset during marginal 3.3V ramp. |
Use Scenario: Portable handheld test equipment powered by Li-ion battery with regulated 2.5V/3.3V rails and analog front-end bias. IC Role / Device Role / Timing Role: Fault-tolerant supply monitor ensuring clean boot before ADC/DAC initialization. Use Value: 20µA quiescent current extends battery runtime; soft reset preserves calibration memory during field recalibration. |
| Industrial Embedded Controllers | Medical Diagnostic Devices |
Use Scenario: DIN-rail PLC with isolated 2.5V FPGA core, 3.3V communication interface, and 1V sensor interface supply. IC Role / Device Role / Timing Role: Brownout detector and manual reset initiator for failsafe firmware recovery. Use Value: Guaranteed reset down to 1V ensures safe shutdown during AC line sag; PBR debounce prevents spurious resets in EMI-heavy factory environments. |
Use Scenario: Portable ultrasound unit with battery-backed 2.5V DSP, 3.3V display controller, and 1V analog beamformer supply. IC Role / Device Role / Timing Role: Critical power integrity monitor enforcing FDA-required boot verification sequence. Use Value: Dual-mode reset (soft/hard) enables user-initiated diagnostics without disrupting real-time image processing pipelines. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-supply monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC1726-2.5 | Includes programmable watchdog timer and adjustable reset timeout; higher 35µA supply current | Required where firmware hang detection is mandatory alongside supply monitoring | Select LTC1726-2.5 only if watchdog functionality is needed; LTC1326CMS8#PBF offers lower power and simpler configuration |
| LTC2903 | Quad-monitor in SOT-23-6; fixed 2.5V/3.3V/5V thresholds; no PBR or soft reset; ±1.5% accuracy | Suitable for cost-sensitive, space-constrained designs needing basic 3-rail monitoring without manual reset | Choose LTC2903 for minimal footprint and lowest cost; LTC1326CMS8#PBF provides superior accuracy, soft reset, and industrial temp range |
Compared with LTC1726-2.5 and LTC2903, the LTC1326CMS8#PBF uniquely balances ultra-low power (20µA), high accuracy (±0.75%), integrated soft/hard reset, and industrial temperature support - making it optimal for battery-powered and mission-critical embedded systems where reliability and efficiency are co-prioritized.
Availability
LTC1326CMS8#PBF is available at Aetrix Electronics and suitable for desktop computers, intelligent instruments, and industrial embedded controllers requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for LTC1326CMS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for legacy Linear parts including the LTC1326 series.
The LTC1326 family was designed specifically for micropower, high-accuracy monitoring of multiple supply rails in portable, battery-operated, and industrial systems - emphasizing low quiescent current, glitch immunity, and flexible reset configuration.
FAQ
What is the primary function of the LTC1326CMS8#PBF?
The LTC1326CMS8#PBF is a micropower triple supply monitor IC that simultaneously supervises 2.5V, 3.3V, and an adjustable supply (typically ~1V). It generates a reliable reset signal during power-up, brownout, or manual push-button events. Its design ensures deterministic behavior with ±0.75% threshold accuracy, 20µA supply current, and guaranteed reset assertion down to VCC3 ≥ 1V or VCC25 ≥ 1V - making the LTC1326CMS8#PBF ideal for portable and industrial embedded systems demanding high reliability and low power consumption.
How does the LTC1326CMS8#PBF handle power sequencing between VCC25 and VCC3?
The LTC1326CMS8#PBF uses an internal power-detect/gate-drive circuit that automatically selects the higher of VCC25 or VCC3 to drive the RST output FET. This ensures the RST pin remains asserted low as soon as either supply reaches 1V, eliminating the need for external diode-OR networks. During asymmetric power-up - such as VCC25 ramping before VCC3 - the LTC1326CMS8#PBF maintains correct reset state without glitches, satisfying strict sequencing requirements in FPGA and microprocessor applications.
Can the LTC1326CMS8#PBF be used as a dual-supply or single-supply monitor?
Yes, the LTC1326CMS8#PBF supports configurable operation via pin-strapping overrides. VCCA can be tied to VCC3 or VCC25 to disable its comparator. For dual-supply use, VCC25 may be tied to VCC3, effectively monitoring only 3.3V and the adjustable rail. The LTC1326CMS8#PBF also includes internal override logic that disables VCC25 monitoring when its voltage matches VCC3 within ±25mV below ~4.15V - allowing flexible reconfiguration without hardware changes.
What is the difference between RST and SRST outputs on the LTC1326CMS8#PBF?
RST is the primary active-low open-drain reset output, asserted during power-up, brownout, or long (>2s) PBR press, with a 200ms timeout. SRST is the "soft reset" output, asserting for only 100µs after short (<2s) PBR release - enabling non-disruptive processor reset that preserves DRAM refresh cycles. Both outputs feature weak 6µA internal pull-ups to VCC3 and support OR-tying with other reset sources. The LTC1326CMS8#PBF thus provides two distinct reset modes optimized for different system recovery scenarios.
Does the LTC1326CMS8#PBF require external components for basic operation?
Yes - the LTC1326CMS8#PBF requires a minimum 0.1µF ceramic bypass capacitor from VCC3 to GND for stable operation. External pull-up resistors (e.g., 4.7kΩ) on RST/SRST are recommended for faster rise times, though not strictly required due to internal 6µA pull-ups. No external timing components are needed, as the 200ms reset delay and 20ms PBR debounce are fully internal. The LTC1326CMS8#PBF is designed for minimal external BOM while maintaining high accuracy and noise immunity.
LTC1326CMS8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 3.118V, 4.725V, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
LTC1326CMS8#PBF FAQ
1.How can I place an order for LTC1326CMS8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1326CMS8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1326CMS8#PBF reliable?
The price and inventory of LTC1326CMS8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1326CMS8#PBF is usually 5 days.
3.What payment methods are accepted for LTC1326CMS8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1326CMS8#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1326CMS8#PBF?
LTC1326CMS8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1326CMS8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1326CMS8#PBF?
For technical support, including LTC1326CMS8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1326CMS8#PBF requirements.
6.How does Aetrix verify that LTC1326CMS8#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1326CMS8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1326CMS8#PBF meets industry standards.
7.What is the process for return or replacement of LTC1326CMS8#PBF?
All LTC1326CMS8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1326CMS8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1326CMS8#PBF part is unused and in its original packaging.
Return procedure for LTC1326CMS8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC1326CMS8#PBF Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

