Analog Devices Inc. LTC1403CMSE#PBF
- Part No.:
- LTC1403CMSE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
LTC1403CMSE#PBF.pdf
- Description:
- IC ADC 12BIT SAR 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1403CMSE#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 2.8 Msps serial analog-to-digital converter with differential inputs, 3V single-supply operation, and 80 dB common-mode rejection. It delivers 14 mW active power dissipation, 10 µW sleep shutdown, and operates from 0°C to 70°C in a 10-lead MSOP package - optimized for portable high-speed data acquisition systems requiring low noise and ground-loop immunity.
For engineers reviewing the LTC1403CMSE#PBF datasheet, LTC1403CMSE#PBF pinout, LTC1403CMSE#PBF application, or LTC1403CMSE#PBF equivalent, key selection criteria include its 2.8 Msps sampling rate, 0 V to 2.5 V unipolar differential input range, 3-wire serial interface timing compatibility, and guaranteed operation across commercial temperature range without external reference dependency.
Technical Context
The LTC1403CMSE#PBF implements a fully differential sample-and-hold architecture with aperture jitter of 0.3 ps and acquisition time of 39 ns, enabling accurate digitization of fast-changing signals up to 50 MHz full-power bandwidth. Its internal 2.5 V bandgap reference (±15 ppm/°C tempco) supports both internal use and overdrive by external references from 2.55 V to VDD.
Conversion is initiated on the rising edge of CONV; 16 SCK cycles output the 12-bit result, with optional 2-cycle acquisition gap between conversions to sustain full 2.8 Msps throughput at 50.4 MHz clock. The device supports three operating modes - Active (4.7 mA), Nap (1.1 mA), and Sleep (10 µA) - controlled via CONV pulse count and SCK state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - ensures monotonic transfer function and deterministic code mapping for control-loop feedback. |
| Sampling Rate | 2.8 Msps maximum - supports real-time capture of signals up to ~1.4 MHz (Nyquist-limited) in high-speed motor control or communications monitoring. |
| Input Range | 0 V to 2.5 V differential (AIN+ – AIN–), common-mode range 0 V to VDD - enables single-supply sensor interfacing with ground-referenced signal sources. |
| Power Dissipation | 14 mW active, 10 µW sleep - allows battery-powered portable instrumentation with extended runtime and thermal headroom in compact layouts. |
| Common-Mode Rejection | 80 dB at 1 MHz - suppresses ground-loop noise and EMI coupling in industrial sensor front-ends without external instrumentation amplifiers. |
| Supply Voltage | 2.7 V to 3.6 V - compatible with standard 3 V Li-ion or regulated DC-DC outputs, eliminating need for additional voltage rails. |
| Operating Temperature | 0°C to 70°C - qualified for commercial-grade embedded systems including test equipment and consumer data loggers. |
Pinout & Package
Package: 10-lead plastic MSOP (MSE) with exposed pad (Pin 11), JEDEC MO-187 variant. Exposed pad must be soldered to PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN+ (1) | Noninverting analog input | Differential input node; accepts 0 V to VDD common-mode swing and contributes +2.5 V max differential offset relative to AIN–. |
| AIN– (2) | Inverting analog input | Differential input node; accepts 0 V to VDD common-mode swing and contributes –2.5 V min differential offset relative to AIN+. |
| VREF (3) | Internal 2.5 V reference output | Stable bandgap reference; requires ≥10 µF bypass to GND; can be overdriven by external 2.55 V–VDD source for improved accuracy. |
| GND (4, 5, 6, 11) | Analog/digital ground & thermal pad | Four dedicated ground connections including exposed pad; all must connect directly to solid analog ground plane to minimize noise coupling. |
| VDD (7) | 3 V positive supply | Single power rail for entire IC; requires local 10 µF + 0.1 µF ceramic bypassing close to Pin 7 and Pin 6. |
| SDO (8) | Three-state serial data output | Outputs 12-bit conversion result from prior cycle on rising SCK edges; high-impedance when SCK inactive or during Nap/Sleep mode. |
| SCK (9) | Serial clock input | Accepts TTL/3 V CMOS levels; controls data shift-out timing and wakes device from Sleep/Nap on first pulse. |
| CONV (10) | Convert start input | Rising-edge-triggered; initiates sample-and-hold hold phase and conversion; pulse count determines operating mode (Active/Nap/Sleep). |
Key Features
| Feature | Design Value |
|---|---|
| Differential input architecture | Enables direct connection to bridge sensors or current-sense shunts without level-shifting, while rejecting common-mode noise up to 100 MHz. |
| Low-aperture-jitter sampling | 0.3 ps RMS jitter preserves SNR >68 dB at 100 kHz input - critical for spectral analysis and communication signal fidelity. |
| Multi-mode power management | Configurable via CONV pulses: Active (4.7 mA), Nap (1.1 mA), Sleep (10 µA) - supports dynamic power scaling in burst-mode acquisition systems. |
| On-chip 2.5 V reference | Factory-trimmed ±0.25% initial accuracy, ±15 ppm/°C drift - eliminates external reference component cost and layout area in space-constrained designs. |
| 3-wire serial interface | Compatible with SPI-compatible controllers using only CONV, SCK, and SDO - reduces GPIO count and simplifies isolation in high-voltage measurement systems. |
Applications
| Portable Data Loggers | Motor Phase Current Monitoring |
|---|---|
|
Use Scenario: Battery-powered environmental sensor nodes capturing temperature, pressure, and vibration waveforms at up to 2.8 Msps for edge analytics. IC Role / Device Role / Timing Role: Primary ADC digitizing conditioned analog outputs from MEMS accelerometers and RTD bridges with synchronized sampling. Use Value: 12-bit resolution and 80 dB CMRR enable clean acquisition in electrically noisy field deployments without shielded cabling or external op-amps. |
Use Scenario: Real-time current sensing across all three phases of a BLDC motor in compact inverters for drones and e-bikes. IC Role / Device Role / Timing Role: High-speed differential ADC sampling shunt voltages with precise timing alignment across channels via shared CONV and SCK. Use Value: 39 ns acquisition time and 50 MHz full-power bandwidth support accurate reconstruction of PWM-rich current waveforms up to 100 kHz switching frequencies. |
| Uninterruptible Power Supplies | Multiplexed Industrial Sensor Arrays |
|
Use Scenario: Input/output voltage and current monitoring in line-interactive UPS units requiring fast fault detection and waveform analysis. IC Role / Device Role / Timing Role: ADC front-end for AC line sensing and battery health diagnostics, interfaced to ARM Cortex-M4 controller via 3-wire serial link. Use Value: 2.8 Msps sampling enables 4096-point FFTs at 50/60 Hz fundamental for harmonic distortion analysis without external oversampling hardware. |
Use Scenario: Centralized acquisition of 16+ analog sensor channels (thermocouples, strain gauges) in PLC backplanes using analog multiplexing. IC Role / Device Role / Timing Role: High-throughput ADC serving as shared digitizer for multiplexed front-end; CONV retriggered per channel with minimal dead time. Use Value: Low 10 µW sleep power allows idle-state power gating between channel scans, reducing average system power by >95% versus always-on alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 12-bit, 2.5 Msps, 2.7–5.5 V supply, no integrated reference, requires external REF. | Lacks internal 2.5 V reference and sleep mode; higher supply voltage flexibility but increased BOM count and layout complexity. | Choose when wider supply range (up to 5.5 V) is required and external reference already exists in system. |
| MAX1166BCAP+ | 12-bit, 2 Msps, 2.7–3.6 V, internal reference, 12-lead TQFN, –40°C to +85°C. | Lower max sampling rate (2 vs 2.8 Msps), wider temp range, different package - limits throughput in high-bandwidth applications. | Choose when extended industrial temperature operation is mandatory and 2 Msps suffices for target signal bandwidth. |
Compared with ADS7822U and MAX1166BCAP+, the LTC1403CMSE#PBF offers superior sampling speed and lowest sleep power within its 3 V supply class, making it optimal for portable, battery-sensitive, high-fidelity acquisition where internal reference simplification and ground-noise immunity are design priorities.
Availability
LTC1403CMSE#PBF is available at Aetrix Electronics and suitable for portable data loggers, motor phase current monitoring, uninterruptible power supplies, and multiplexed industrial sensor arrays requiring stable component supply and long-term production continuity.
Supply support for LTC1403CMSE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, with deep expertise in precision data conversion and power management.
The LTC1403 series was developed by Linear Technology (acquired by ADI in 2017) to address demand for ultra-low-power, high-speed SAR ADCs in portable and space-constrained instrumentation - emphasizing differential noise immunity, single-supply simplicity, and minimal external components.
FAQ
What is the maximum sampling rate supported by the LTC1403CMSE#PBF?
The LTC1403CMSE#PBF supports a maximum sampling rate of 2.8 Msps when using a 50.4 MHz SCK with two additional clock cycles allocated for acquisition between conversions. At lower clock frequencies or without the extra acquisition gap, the effective throughput decreases proportionally while maintaining full 12-bit accuracy and linearity.
Does the LTC1403CMSE#PBF require an external reference voltage?
No, the LTC1403CMSE#PBF includes a factory-trimmed 2.5 V internal bandgap reference accessible at Pin 3 (VREF). It can be used directly with proper 10 µF bypassing, or overdriven by an external reference between 2.55 V and VDD for improved initial accuracy or temperature stability - eliminating mandatory external reference components.
How does the LTC1403CMSE#PBF enter Sleep mode, and what is its quiescent current?
The LTC1403CMSE#PBF enters Sleep mode when four or more CONV pulses are applied while SCK is held in a fixed high or low state. In Sleep mode, supply current drops to 10 µA (typical), reducing power dissipation to 10 µW at 3 V - ideal for wake-on-event architectures in battery-operated systems.
What is the analog input voltage range specification for the LTC1403CMSE#PBF?
The LTC1403CMSE#PBF accepts a differential input range of 0 V to 2.5 V (AIN+ – AIN–) with common-mode voltage ranging from 0 V to VDD (2.7 V to 3.6 V). Absolute pin voltages must remain within –0.3 V to (VDD + 0.3 V); exceeding this risks latch-up or damage per Absolute Maximum Ratings.
Is the LTC1403CMSE#PBF pin-compatible with the LTC1403A variants?
No - the LTC1403CMSE#PBF is the 12-bit version (LTC1403), whereas LTC1403A variants are 14-bit. While both share identical pinout, package, and interface timing, their resolution, INL/DNL specs, and dynamic performance (e.g., SINAD, SFDR) differ significantly; they are not drop-in replacements without firmware and signal-chain recalibration.
LTC1403CMSE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 2.8M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 3.6V
- Voltage - Supply, Digital:
- 2.7V ~ 3.6V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 10-MSOP-EP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1403CMSE#PBF FAQ
1.How can I place an order for LTC1403CMSE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1403CMSE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1403CMSE#PBF reliable?
The price and inventory of LTC1403CMSE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1403CMSE#PBF is usually 5 days.
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LTC1403CMSE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1403CMSE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1403CMSE#PBF?
For technical support, including LTC1403CMSE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1403CMSE#PBF requirements.
6.How does Aetrix verify that LTC1403CMSE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1403CMSE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1403CMSE#PBF meets industry standards.
7.What is the process for return or replacement of LTC1403CMSE#PBF?
All LTC1403CMSE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1403CMSE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1403CMSE#PBF part is unused and in its original packaging.
Return procedure for LTC1403CMSE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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