Analog Devices Inc. LTC1403IMSE#PBF

Overview

LTC1403IMSE#PBF from Analog Devices (formerly Linear Technology) is a 14-bit, 2.8 Msps serial analog-to-digital converter with differential inputs, 3V single-supply operation, 80 dB common-mode rejection, and Sleep mode consuming only 10 µW. It features an internal 2.5 V bandgap reference, 3-wire serial interface, and is housed in a 10-lead MSOP package rated for –40°C to +85°C operation - ideal for high-speed portable data acquisition systems.

For engineers reviewing the LTC1403IMSE#PBF datasheet, LTC1403IMSE#PBF pinout, LTC1403IMSE#PBF application, or LTC1403IMSE#PBF equivalent, key selection criteria include its guaranteed 14-bit no-missing-codes performance over temperature, 39 ns acquisition time, differential input range of 0 V to 2.5 V, and compatibility with standard 3-wire SPI-like timing without external clock dividers.

Technical Context

The LTC1403IMSE#PBF implements a successive approximation register (SAR) ADC architecture with a fully differential sample-and-hold front-end. Its timing logic synchronizes conversion start (CONV↑) with a 16-cycle serial output window aligned to SCK rising edges, enabling deterministic 2.8 Msps throughput when using a 50.4 MHz clock with two extra acquisition cycles between conversions.

It integrates a factory-trimmed 2.5 V bandgap reference with ±15 ppm/°C tempco and supports external reference overdrive (2.55 V to VDD). The device operates across full industrial temperature range (–40°C to +85°C), with guaranteed 14-bit resolution (LTC1403A variant), ±0.5 LSB integral linearity, and 70.5 dB typical SINAD at 100 kHz input.

Key Specifications

Pinout & Package

Package: 10-lead plastic MSOP (MSE) with exposed pad (Pin 11), JEDEC MO-187AA compliant. Exposed pad must be soldered to PCB ground plane for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Compared with ADS8326IDRCT and MAX1190ETE+, the LTC1403IMSE#PBF delivers the highest throughput (2.8 Msps) in a 10-pin MSOP with integrated 2.5 V reference and lowest sleep power (10 µW), making it optimal for size- and power-constrained high-speed acquisition where 14-bit fidelity is sufficient.

Availability

LTC1403IMSE#PBF is available at Aetrix Electronics and suitable for industrial motor control, portable data loggers, communications baseband receivers, and uninterruptible power supplies requiring stable component supply with guaranteed long-term availability.

Supply support for LTC1403IMSE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.

The LTC1403 series belongs to ADI's precision high-speed data acquisition product line, designed specifically for applications demanding low-power, small-footprint, differential-input SAR ADCs with robust noise immunity and guaranteed performance across industrial temperature ranges.

FAQ

What is the guaranteed resolution and linearity performance of the LTC1403IMSE#PBF over its operating temperature range?

The LTC1403IMSE#PBF is the A-grade (14-bit) variant of the LTC1403 family and guarantees 14-bit no-missing-codes operation from –40°C to +85°C. Its integral linearity error is specified at ±0.5 LSB max over temperature, ensuring monotonic behavior and predictable code transitions essential for control-loop stability and accurate waveform reconstruction in the LTC1403IMSE#PBF.

How does the Sleep mode of the LTC1403IMSE#PBF operate, and what is the wake-up sequence?

Sleep mode is entered by applying ≥4 CONV pulses while holding SCK static (high or low); power drops to 10 µW. Wake-up occurs on the first SCK edge after CONV release, with internal 2.5 V reference requiring ≤2 ms to settle before valid conversions. This sequence ensures the LTC1403IMSE#PBF resumes full performance rapidly without external intervention or calibration.

Can the LTC1403IMSE#PBF accept differential input signals beyond the 0 V to 2.5 V range, and what happens if exceeded?

No - the LTC1403IMSE#PBF's differential input range is strictly 0 V to 2.5 V. If AIN+ – AIN– exceeds +2.5 V, the output code saturates at 0x3FFF (all ones); if below 0 V, it saturates at 0x0000 (all zeros). Common-mode voltage must stay within 0 V to VDD, but violating the differential span causes hard clipping, not graceful rollover - a key constraint in the LTC1403IMSE#PBF's signal chain design.

What are the minimum and maximum clock frequency requirements for achieving full 2.8 Msps throughput with the LTC1403IMSE#PBF?

To achieve full 2.8 Msps throughput, the LTC1403IMSE#PBF requires a 50.4 MHz SCK with two additional clock cycles allocated for acquisition between conversions. Minimum SCK period is 19.8 ns (≈50.5 MHz), and maximum is 10 µs (100 kHz); however, sustained 2.8 Msps mandates tight timing adherence per the t7 and tTHROUGHPUT specs - deviations reduce effective sampling rate in the LTC1403IMSE#PBF.

Is the LTC1403IMSE#PBF pin-compatible with other variants in the LTC1403/LTC1403A family, such as the LTC1403AIMSE#PBF?

Yes - all LTC1403 and LTC1403A variants in the MSE package (including LTC1403IMSE#PBF and LTC1403AIMSE#PBF) share identical pinout, footprint, and electrical interface. The difference lies in grade: LTC1403IMSE#PBF is the industrial-grade 14-bit part (–40°C to +85°C), while LTC1403AIMSE#PBF is the automotive AEC-Q100 qualified version. Both are drop-in replacements in non-automotive designs using the LTC1403IMSE#PBF.