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Analog Devices Inc. LTC1405CGN#PBF
- Part No.:
- LTC1405CGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC1405CGN#PBF.pdf
- Description:
- IC ADC 12BIT PIPELINED 28SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,971
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Product details
Overview
LTC1405CGN#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 5 Msps pipelined sampling ADC with integrated sample-and-hold, programmable gain amplifier (PGA), and precision internal reference. It operates from single 5V or dual ±5V supplies, delivers 71.3 dB S/(N+D) at 2.5 MHz input, supports ±2.048 V differential input range, and features rail-to-rail common-mode input with 75 dB CMRR - used in high-speed spectral analysis and telecommunications data acquisition.
For engineers reviewing the LTC1405CGN#PBF datasheet, LTC1405CGN#PBF pinout, LTC1405CGN#PBF application, or LTC1405CGN#PBF equivalent, key selection considerations include its 28-pin SSOP package, 100 MHz full-power bandwidth, flexible 1×/2× PGA gain control, out-of-range indicator (OF), and OVDD-supplied 3V/5V logic compatibility for mixed-voltage system interfacing.
Technical Context
The LTC1405CGN#PBF implements a pipelined 12-bit CMOS ADC architecture with a differential input sample-and-hold stage capable of acquiring signals up to 100 MHz. Its digital correction logic ensures no missing codes and guarantees ±0.35 LSB INL over temperature.
It integrates a factory-trimmed 2.5 V bandgap reference (VCM), selectable 4.096 V / 2.048 V internal VREF via SENSE pin, and a digitally controlled PGA with 1× or 2× gain. The analog input common-mode range spans rail-to-rail (VSS to VDD), and the output uses two's complement parallel format with dedicated overflow flag (OF).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit, guaranteed no missing codes - ensures monotonicity and deterministic code transitions across full scale. |
| Sample Rate | 5 Msps maximum - supports real-time digitization of baseband signals up to 2.5 MHz Nyquist frequency. |
| S/(N + D) | 71.3 dB at 2.5 MHz input - defines usable dynamic range for high-fidelity signal capture in spectral analysis. |
| Full-Power Bandwidth | 100 MHz - enables accurate acquisition of fast-rising transients and wideband RF/IF signals without amplitude loss. |
| INL / DNL | ±0.35 LSB / ±0.25 LSB max - ensures linearity critical for measurement accuracy in calibrated instrumentation. |
| Input Range | ±2.048 V, ±1.024 V, or ±0.512 V (selectable via VREF & GAIN pins) - allows optimal SNR matching to varying sensor/output signal amplitudes. |
| CMRR | 75 dB - suppresses ground-loop noise and common-mode interference in noisy industrial or telecom environments. |
Pinout & Package
Package: 28-lead narrow SSOP (GN), 5.6 mm × 10.2 mm, 0.635 mm pitch, RoHS-compliant, lead-free (PbF).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +AIN (1) | Differential analog input positive | Accepts signal referenced to –AIN; high-impedance during hold, draws charge spike at acquisition. |
| –AIN (2) | Differential analog input negative | Common-mode reference point; enables rejection of shared noise when driven differentially. |
| VCM (3) | 2.5 V reference output | Low-impedance bias source for single-supply AIN–; bypass with ≥1 µF ceramic for stability. |
| SENSE (4) | Reference programming control | GND → VREF = 4.096 V; VREF → VREF = 2.048 V; VDD → external VREF drive mode. |
| VREF (5) | ADC reference voltage input | Sets core input span to ±VREF/2; must be bypassed; impedance 2 kΩ - buffer recommended for external drive. |
| GND (6) | DAC reference ground | Separate analog ground node for VREF circuitry; tie to system AGND. |
| VDD (7) | Analog positive supply (5 V) | Primary analog power; two VDD pins (7 & 23) require individual 1 µF ceramic decoupling. |
| GND (8) | Analog power ground | Dedicated AGND return for analog supply; isolate from DGND/OGND. |
| D11–D0 (9–20) | Parallel 12-bit two's complement outputs | MSB-first, latched on third CLK rising edge; compatible with 3V/5V logic via OVDD setting. |
| OGND (21) | Output logic ground | Tie directly to system DGND; separates digital output return from analog ground paths. |
| OVDD (22) | Output logic supply (3–5 V) | Configures output voltage swing: short to VDD for 5V, or supply separately for 3V interface. |
| VDD (23) | Analog positive supply (5 V) | Second analog VDD pin; decouple independently to minimize supply coupling. |
| GND (24) | Analog power ground | Third AGND pin; maintain star grounding with Pins 6 and 8 for low-noise performance. |
| VSS (25) | Negative supply (–5 V or 0 V) | Set to –5 V for dual supply; 0 V for single supply - determines input common-mode range. |
| CLK (26) | Conversion start clock | Rising-edge triggered; 5 ns max rise time recommended; duty cycle not critical. |
| OF (27) | Overflow indicator | Active-high flag signaling output code = 0x800 or 0x7FF - enables real-time clipping detection. |
| GAIN (28) | PGA gain select | Logic high (5 V) → 1× gain; logic low (0 V) → 2× gain - configures input scaling before ADC core. |
Key Features
| Feature | Design Value |
|---|---|
| Flexible input PGA | Digitally selectable 1× or 2× gain enables optimal signal-to-noise ratio for ±2.048 V, ±1.024 V, or ±0.512 V full-scale ranges. |
| Integrated reference system | Factory-trimmed 2.5 V VCM and switchable 4.096 V / 2.048 V VREF eliminate need for external precision references. |
| Rail-to-rail common-mode input | Supports input common-mode voltages from VSS to VDD - simplifies interface with op amps, sensors, and transformers. |
| 3V/5V logic-compatible outputs | Separate OVDD pin allows direct connection to 3V microcontrollers or FPGAs without level-shifting components. |
| Low-power operation | 115 mW typical at 5 Msps (23 mA @ VDD, 1.2 mA @ VSS) - reduces thermal load in dense data-acquisition systems. |
| High CMRR (75 dB) | Enables true differential measurement to reject ground loops and EMI in industrial and telecom infrastructure. |
Applications
| Telecommunications Baseband Digitization | Digital Signal Processing Front-End |
|---|---|
|
Use Scenario: Digitizing IF signals from quadrature demodulators in wireless base stations operating at 2–5 Msps. IC Role / Device Role / Timing Role: High-speed sampling ADC capturing complex baseband I/Q waveforms with minimal harmonic distortion. Use Value: 85 dB SFDR and 71.3 dB S/(N+D) preserve modulation fidelity for QAM-64/256, enabling compliant error vector magnitude (EVM) performance. |
Use Scenario: Real-time acquisition of sensor or audio signals feeding FPGA-based FIR filters or FFT engines. IC Role / Device Role / Timing Role: Parallel-output ADC providing deterministic 12-bit samples synchronized to system clock domain via CLK edge. Use Value: 150 ns conversion time and pipeline latency of 3 clocks enable tight loop timing in closed-loop DSP control applications. |
| Multiplexed Data Acquisition Systems | High-Speed Oscilloscope Front-End |
|
Use Scenario: Channel multiplexing in modular test equipment where multiple analog inputs share one high-performance ADC. IC Role / Device Role / Timing Role: ADC with rail-to-rail input and programmable PGA adapts to diverse sensor output levels without external gain stages. Use Value: ±2.048 V / ±1.024 V input range selection and 75 dB CMRR reduce crosstalk and offset drift across channels. |
Use Scenario: Capturing transient waveforms in portable or embedded oscilloscopes requiring >1 Msps sampling and low power. IC Role / Device Role / Timing Role: Standalone sampling ADC with integrated S/H and reference - eliminates external support IC count. Use Value: 100 MHz full-power bandwidth and <0.35 LSB INL ensure accurate rise-time measurement and amplitude linearity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9220ARZ | 12-bit, 10 Msps, no integrated PGA or reference; requires external REF and driver; higher power (330 mW). | Better suited for fixed-gain, high-throughput systems where board space permits external support components. | Select AD9220ARZ only if 10 Msps is required and system-level calibration can compensate for missing on-chip reference/PGA. |
| LTC2245CUP#PBF | 14-bit, 25 Msps, no PGA, 3.3 V supply only, LVDS outputs; higher resolution but incompatible voltage/logic interface. | Targeted at high-definition imaging or radar where bit depth and speed outweigh ease of analog interface. | Choose LTC2245CUP#PBF when 14-bit resolution and >10 Msps are mandatory, and LVDS serialization is acceptable. |
Compared with AD9220ARZ and LTC2245CUP#PBF, the LTC1405CGN#PBF uniquely combines integrated PGA, internal reference, rail-to-rail input, and 3V/5V logic compatibility - reducing BOM count and layout complexity for mid-speed, mixed-signal embedded systems.
Availability
LTC1405CGN#PBF is available at Aetrix Electronics and suitable for telecommunications infrastructure, digital signal processing front-ends, and multiplexed data acquisition systems requiring stable component supply, long-lifecycle support, and traceable sourcing.
Supply support for LTC1405CGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC1405CGN#PBF belongs to ADI's legacy Linear Technology precision data converter family, designed specifically for high-dynamic-range, low-power, easy-to-use sampling ADC applications in space-constrained and thermally sensitive systems.
FAQ
What supply configurations does the LTC1405CGN#PBF support?
The LTC1405CGN#PBF operates from either a single 5 V supply (VSS = 0 V) or dual ±5 V supplies (VSS = –5 V). Both configurations are fully supported with guaranteed AC/DC specifications. The analog section uses VDD (pins 7 and 23) and VSS (pin 25), while digital outputs are powered by OVDD (pin 22), configurable for 3 V or 5 V logic compatibility. Decoupling capacitors must be placed locally at each supply pin per the datasheet layout guidelines.
How does the GAIN pin affect the input range of the LTC1405CGN#PBF?
The GAIN pin (pin 28) selects the programmable gain amplifier (PGA) factor: logic high (5 V) sets 1× gain, yielding ±VREF/2 input range; logic low (0 V) sets 2× gain, yielding ±VREF/4. Combined with VREF selection (via SENSE pin), this enables three standard bipolar input ranges: ±2.048 V, ±1.024 V, and ±0.512 V. For example, with SENSE = GND (VREF = 4.096 V) and GAIN = 0 V, the input range becomes ±0.512 V - ideal for low-amplitude sensor signals.
What is the function of the OF (overflow) pin on the LTC1405CGN#PBF?
The OF pin (pin 27) is an active-high overflow indicator that asserts when the analog input exceeds the selected full-scale range. It goes high when the digital output equals 0x7FF (011111111111) or 0x800 (100000000000), corresponding to +FS–1LSB or –FS. This enables real-time clipping detection without reading all 12 data bits - useful in automatic gain control (AGC) loops or fault-monitoring circuits within systems using the LTC1405CGN#PBF.
Can the LTC1405CGN#PBF interface directly with a 3 V FPGA or microcontroller?
Yes, the LTC1405CGN#PBF supports direct 3 V logic interfacing via its OVDD pin (pin 22). When OVDD is supplied with 3 V (and OGND tied to system DGND), the D11–D0 outputs swing between 0 V and 3 V, meeting standard 3 V CMOS input thresholds. No external level shifters are needed. Ensure OVDD is bypassed with a 1 µF ceramic capacitor, and verify timing margins (tH/tL ≥ 20 ns) under 3 V operation per the datasheet's digital interface specifications.
What is the significance of the 75 dB CMRR specification for the LTC1405CGN#PBF?
The 75 dB common-mode rejection ratio (CMRR) means the LTC1405CGN#PBF attenuates common-mode noise (e.g., ground loops, EMI pickup) by a factor of ~5600× relative to the differential signal. This enables accurate differential measurements even in electrically noisy environments like motor drives or telecom line cards. Achieving full CMRR requires matched PCB trace lengths for +AIN and –AIN, proper grounding of VCM or external common-mode bias, and avoidance of asymmetric parasitic capacitance.
LTC1405CGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 5M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V, 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- True Bipolar
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1405CGN#PBF FAQ
1.How can I place an order for LTC1405CGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1405CGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1405CGN#PBF reliable?
The price and inventory of LTC1405CGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1405CGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC1405CGN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1405CGN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1405CGN#PBF?
LTC1405CGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1405CGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1405CGN#PBF?
For technical support, including LTC1405CGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1405CGN#PBF requirements.
6.How does Aetrix verify that LTC1405CGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1405CGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1405CGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC1405CGN#PBF?
All LTC1405CGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1405CGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1405CGN#PBF part is unused and in its original packaging.
Return procedure for LTC1405CGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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