Analog Devices Inc. LTC1405CGN#TRPBF
- Part No.:
- LTC1405CGN#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC1405CGN#TRPBF.pdf
- Description:
- IC ADC 12BIT PIPELINED 28SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1405CGN#TRPBF from Analog Devices (formerly Linear Technology) is a 12-bit, 5Msps sampling analog-to-digital converter with integrated sample-and-hold, programmable gain amplifier (PGA), and precision internal reference. It operates from single 5V or dual ±5V supplies, delivers 71.3dB S/(N+D) at 2.5MHz input, supports ±2.048V/±1.024V/±0.512V bipolar input ranges, and features true differential inputs with 75dB CMRR - used in high-speed data acquisition, spectral analysis, and digital signal processing systems.
For engineers reviewing the LTC1405CGN#TRPBF datasheet, LTC1405CGN#TRPBF pinout, LTC1405CGN#TRPBF application, or LTC1405CGN#TRPBF equivalent, key selection considerations include its 100MHz full-power bandwidth, rail-to-rail input common-mode range, 28-pin narrow SSOP package, 1x/2x digitally selectable PGA gain, and separate OVDD logic supply enabling direct interfacing to 3V or 5V digital systems.
Technical Context
The LTC1405CGN#TRPBF implements a pipelined 12-bit CMOS ADC architecture with on-chip differential sample-and-hold, delivering 5Msps throughput with 150ns conversion time and 20–50ns acquisition time. Its input stage includes a digitally controlled PGA (1x or 2x gain) and flexible reference configuration via SENSE pin (4.096V, 2.048V, or external VREF).
Digital output is parallel two's complement format (D11–D0), with overflow flag (OF) and separate OVDD/OGND pins supporting 3V–5V logic compatibility. Aperture jitter is 0.6ps RMS, and common-mode rejection remains ≥75dB up to 10MHz, enabling robust noise rejection in mixed-signal environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - guarantees monotonic transfer function for accurate linear measurement. |
| Sample Rate | 5Msps maximum - supports real-time digitization of signals up to 2.5MHz Nyquist frequency. |
| S/(N + D) | 71.3dB at 2.5MHz input - enables high-fidelity signal capture in demanding spectral analysis applications. |
| Input Range | ±2.048V, ±1.024V, or ±0.512V (bipolar, software-selectable via GAIN/SENSE pins) - matches varying sensor output levels without external scaling. |
| INL / DNL | ±0.35LSB / ±0.25LSB typical - ensures <0.1% integral nonlinearity error across temperature for precision instrumentation. |
| Full-Power BW | 100MHz - allows faithful acquisition of fast transients and wideband RF signals without aliasing distortion. |
| CMRR | 75dB - suppresses ground-loop noise and common-mode interference in differential sensor interfaces. |
| Power Dissipation | 115mW at 5Msps - low thermal load enables dense PCB layouts and battery-constrained portable test equipment. |
Pinout & Package
Package: 28-lead narrow-body SSOP (GN), 5.6mm × 10.2mm, 0.635mm pitch, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +AIN (1) | Positive analog input | Differential input node; accepts rail-to-rail voltage when paired with –AIN - enables direct connection to op-amp outputs or transformer secondaries. |
| –AIN (2) | Negative analog input | Complementary differential input; common-mode voltage may be set externally or tied to VCM for single-supply operation. |
| VCM (3) | 2.5V reference output | Low-impedance 2.5V bias source - used to center –AIN at mid-supply in single 5V systems, eliminating need for external level-shifting circuitry. |
| SENSE (4) | Reference programming control | Digital select pin: grounded → VREF = 4.096V; tied to VREF → VREF = 2.048V; tied to VDD → enables external VREF drive. |
| VREF (5) | ADC reference voltage input | Defines ±VREF/2 core input span; bypassed with ≥1µF ceramic capacitor - critical for stability and noise performance. |
| GND (6) | Reference ground | Analog ground return for internal DAC reference - must be connected to system AGND with low-inductance path. |
| VDD (7) | Analog positive supply | 5V analog power; two dedicated pins (7 & 23) require independent 1µF ceramic decoupling - prevents digital switching noise from corrupting analog conversion. |
| GND (8) | Analog power ground | Primary analog ground plane connection - star-point grounding recommended to minimize PSRR degradation. |
| D11–D0 (9–20) | Parallel digital outputs | 12-bit two's complement data bus; MSB-first order - compatible with FPGA/ASIC parallel capture interfaces without bit-reversal logic. |
| OGND (21) | Output logic ground | Dedicated ground for digital output drivers - isolated from analog GND to prevent coupling of logic noise into analog section. |
| OVDD (22) | Output logic supply | Independent 3V–5V supply for output buffers - enables seamless interface to 3.3V microcontrollers or 5V CPLDs without level shifters. |
| VDD (23) | Analog positive supply (second) | Redundant VDD pin for improved current distribution and lower impedance - must be decoupled identically to Pin 7. |
| GND (24) | Analog power ground (second) | Second analog ground pin - connects to same AGND plane as Pin 8 to reduce ground bounce during high-speed conversions. |
| VSS (25) | Negative supply | Accepts –5V (dual supply) or 0V (single supply); bypassed with 1µF ceramic - determines operating mode and input common-mode range. |
| CLK (26) | Conversion start clock | Rising-edge triggered; 5ns max rise time recommended - jitter directly degrades SNR at high input frequencies. |
| OF (27) | Overflow indicator | Active-high flag signaling output code = 011111111111 or 100000000000 - enables real-time overrange detection without host CPU intervention. |
| GAIN (28) | PGA gain select | Digital input: 5V → 1x gain; 0V → 2x gain - configures input scaling before ADC core to maximize dynamic range utilization. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PGA with 1x/2x gain | Eliminates external gain stages for sensor signal conditioning - reduces component count and board area in portable DAQ systems. |
| Programmable internal reference (4.096V/2.048V) | Removes need for external precision reference ICs - simplifies BOM and improves long-term drift performance in industrial controllers. |
| True differential input with 75dB CMRR | Enables noise-immune measurements from bridge sensors or motor current shunts without differential amplifiers. |
| Separate OVDD logic supply (3V–5V) | Permits direct connection to modern low-voltage FPGAs or ARM-based processors - avoids level-shifter ICs and associated timing skew. |
| Out-of-range (overflow) flag | Hardware-level overvoltage detection - allows immediate analog front-end protection response in safety-critical medical or test equipment. |
| 100MHz full-power input bandwidth | Supports undersampling of IF signals up to 50MHz - enables software-defined radio receiver architectures without external anti-alias filters. |
Applications
| Telecommunications Baseband Processing | Digital Signal Processing Systems |
|---|---|
Use Scenario: Digitizing I/Q baseband signals from quadrature demodulators in cellular infrastructure equipment. IC Role / Device Role / Timing Role: High-speed parallel ADC capturing 5Msps complex waveforms with precise amplitude fidelity and phase coherence. Use Value: 71.3dB S/(N+D) and 85dB SFDR preserve EVM and ACLR metrics required for LTE/5G modulation standards. | Use Scenario: Real-time FFT-based spectral monitoring in spectrum analyzers and EMC test receivers. IC Role / Device Role / Timing Role: Front-end digitizer feeding FPGA-based DSP pipelines with deterministic 150ns conversion latency. Use Value: 100MHz full-power bandwidth captures harmonics beyond fundamental tones, ensuring accurate harmonic distortion analysis. |
| Multiplexed Data Acquisition Systems | Imaging System Digitization |
Use Scenario: High-channel-count industrial PLC modules acquiring synchronized analog sensor data from thermocouples, strain gauges, and pressure transducers. IC Role / Device Role / Timing Role: Precision ADC with rail-to-rail input common-mode range and ±1LSB INL - handles diverse sensor output offsets without per-channel calibration. Use Value: Programmable ±2.048V/±1.024V input ranges match standard industrial sensor spans, reducing design iterations. | Use Scenario: Converting analog video outputs from CCD/CMOS line-scan cameras in machine vision inspection systems. IC Role / Device Role / Timing Role: Low-jitter (0.6ps) sampling ADC preserving edge sharpness and contrast in high-resolution image capture. Use Value: Differential input architecture rejects common-mode noise induced by high-current motor drives adjacent to imaging hardware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9220ARZ | 12-bit, 10Msps; requires external reference and driver; no integrated PGA or VCM | Better speed but higher system complexity - needs external op-amp, reference, and power sequencing | Select when >5Msps throughput is mandatory and board space permits added support components. |
| LTC2245IUP#PBF | 14-bit, 25Msps; consumes 320mW; uses 3.3V supply only; no dual-supply option | Higher resolution and speed at cost of power and supply flexibility - lacks single/dual supply versatility | Choose for applications requiring >12-bit ENOB where thermal management and 3.3V-only infrastructure exist. |
Compared with AD9220ARZ and LTC2245IUP#PBF, the LTC1405CGN#TRPBF offers unique integration (PGA, VCM, dual-supply operation) at 5Msps - making it optimal for compact, low-power, mixed-supply embedded DAQ where system-level BOM reduction outweighs raw speed or resolution gains.
Availability
LTC1405CGN#TRPBF is available at Aetrix Electronics and suitable for telecommunications baseband processing, digital signal processing systems, and multiplexed data acquisition systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LTC1405CGN#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC1405CGN#TRPBF belongs to ADI's legacy Linear Technology high-speed precision ADC product line, designed specifically for applications demanding low power, integrated signal conditioning, and robust noise immunity in space- and power-constrained embedded systems.
FAQ
What is the operating temperature range for the LTC1405CGN#TRPBF?
The LTC1405CGN#TRPBF is specified for the commercial temperature range of 0°C to 70°C. This rating is confirmed in the Absolute Maximum Ratings table and Electrical Characteristics section of the official datasheet, where parameters such as INL, DNL, and S/(N+D) are guaranteed over this full range. The 'C' suffix in the part number explicitly denotes the commercial grade.
Does the LTC1405CGN#TRPBF support single-supply operation?
Yes, the LTC1405CGN#TRPBF supports true single-supply operation with VSS = 0V and VDD = 5V. In this mode, the internal VCM pin provides a 2.5V common-mode bias for the –AIN input, enabling rail-to-rail differential input operation centered at mid-supply. The datasheet confirms guaranteed performance for both single- and dual-supply configurations across all key AC and DC specifications.
How does the GAIN pin affect the input range of the LTC1405CGN#TRPBF?
The GAIN pin on the LTC1405CGN#TRPBF selects the programmable gain amplifier (PGA) setting: 5V logic high configures 1x gain, while 0V logic low selects 2x gain. Combined with the SENSE pin configuration, this determines the effective input range - e.g., with SENSE = GND (VREF = 4.096V) and GAIN = 0V, the input range becomes ±0.512V. This mapping is explicitly defined in Table 1 of the datasheet and applies across the full operating temperature range.
What is the purpose of the OF (overflow) pin on the LTC1405CGN#TRPBF?
The OF (overflow) pin on the LTC1405CGN#TRPBF is an active-high indicator that asserts when the analog input exceeds the selected full-scale range. It goes high when the digital output equals 011111111111 or 100000000000 - corresponding to +FS–1LSB or –FS. This hardware flag enables immediate overrange detection in real-time systems without requiring continuous host readback of D11–D0, improving system responsiveness in protective relay or test equipment applications.
Can the LTC1405CGN#TRPBF interface directly with 3.3V logic systems?
Yes, the LTC1405CGN#TRPBF can interface directly with 3.3V logic systems using its dedicated OVDD pin. By supplying OVDD = 3.3V and connecting OGND to the 3.3V system ground, the D11–D0 outputs and OF pin meet 3.3V logic thresholds (VOH ≥ 2.3V, VOL ≤ 0.4V) under specified load conditions. This capability is verified in the Digital Inputs and Outputs section of the datasheet and eliminates the need for external level translators in mixed-voltage designs.
LTC1405CGN#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 5M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V, 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- True Bipolar
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1405CGN#TRPBF FAQ
1.How can I place an order for LTC1405CGN#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1405CGN#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of LTC1405CGN#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1405CGN#TRPBF is usually 5 days.
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For technical support, including LTC1405CGN#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1405CGN#TRPBF requirements.
6.How does Aetrix verify that LTC1405CGN#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1405CGN#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1405CGN#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1405CGN#TRPBF?
All LTC1405CGN#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1405CGN#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1405CGN#TRPBF part is unused and in its original packaging.
Return procedure for LTC1405CGN#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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