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Analog Devices Inc. LTC1406CGN#PBF
- Part No.:
- LTC1406CGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC1406CGN#PBF.pdf
- Description:
- IC ADC 8BIT PIPELINED 24SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:155
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Product details
Overview
LTC1406CGN#PBF from Analog Devices (formerly Linear Technology) is a low-power, 8-bit, 20 Msps sampling analog-to-digital converter with differential input architecture, ±1 LSB INL/DNL over temperature, 250 MHz input bandwidth, and single 5 V supply operation. It serves as a high-speed front-end digitizer in RF-sampling and undersampling signal chains for wireless infrastructure and video digitization.
For engineers reviewing the LTC1406CGN#PBF datasheet, LTC1406CGN#PBF pinout, LTC1406CGN#PBF application, or LTC1406CGN#PBF equivalent, key selection criteria include its 20 Msps throughput with 47.5 dB S/(N+D) at 10 MHz input, true differential input rejection (60 dB CMRR), 5-cycle pipeline latency, and 3V/5V-compatible parallel digital interface with independent OVDD/OGND rails.
Technical Context
The LTC1406CGN#PBF employs a pipelined ADC architecture with an integrated 250 MHz differential sample-and-hold amplifier, enabling accurate undersampling of signals beyond its Nyquist frequency (10 MHz). Its rail-to-rail analog inputs accept ±1 V differential or 2 V single-ended spans, with common-mode voltage ranging from 0.5 V to 4.5 V in differential mode.
Conversion is triggered on the falling edge of CLK; output data appears five clock cycles later. The device supports power-down mode (1 µA quiescent current) via SHDN pin and features OF/UF overflow/underflow flag for real-time range monitoring - critical for dynamic signal acquisition in burst-mode receivers and CCD readout systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8-bit with no missing codes - guarantees monotonic transfer function for reliable code sequencing in closed-loop control. |
| Sampling Rate | 20 Msps maximum - enables digitization of IF signals up to 10 MHz Nyquist, supporting direct IF sampling in GSM/CDMA base stations. |
| S/(N + D) | 47.5 dB at 10 MHz input - translates to ~7.6 effective bits, sufficient for medium-fidelity communications channel analysis. |
| Input Bandwidth | 250 MHz - allows clean acquisition of wideband pulses and multi-tone signals without external anti-alias filtering below 100 MHz. |
| INL / DNL | ±1 LSB max over full temperature range - ensures consistent linearity across 0°C to 70°C ambient, critical for calibrated measurement systems. |
| Power Dissipation | 150 mW at 5 V / 20 Msps - enables dense PCB layouts in portable test equipment without forced cooling. |
| Common-Mode Rejection | 60 dB up to 100 MHz - suppresses ground bounce and shared-noise coupling in mixed-signal PCBs with separate analog/digital planes. |
Pinout & Package
Package: 24-lead narrow SSOP (GN), 0.15 mm pitch, JEDEC MS-013AC compliant. Thermal resistance θJA = 85°C/W; max junction temperature 110°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN+, AIN– | Differential analog input pair | Accepts ±1 V differential span; common-mode voltage range 0.5 V to 4.5 V; rejects noise via 60 dB CMRR. |
| CLK | Sampling clock input | Falling-edge triggered; requires <2 ns rise/fall time and low jitter; 50% duty cycle recommended at 20 Msps. |
| D7–D0 | 8-bit parallel digital output bus | CMOS-compatible outputs referenced to OVDD/OGND - enables direct connection to 3 V FPGA I/O banks. |
| OF/UF | Overflow/underflow status flag | High with all-1s or all-0s output indicates out-of-range condition; eliminates need for external comparator in auto-ranging designs. |
| SHDN | Active-low shutdown control | Pulls supply current to 1 µA; recovery time <1 µs - ideal for duty-cycled acquisition in battery-powered spectrum analyzers. |
| VREF | External reference input | Accepts 2 V to 3 V; sets full-scale span; enables dynamic range adaptation when driven by DAC in AGC loops. |
| AVDD, DVDD, OVDD | Independent supply rails | AVDD/DVDD = 4.75–5.25 V; OVDD = 2.7–5.25 V - decouples analog, core digital, and I/O domains for noise isolation. |
Key Features
| Feature | Design Value |
|---|---|
| True differential input architecture | Enables single-ended or differential drive without performance penalty; eliminates ground loop errors in sensor front-ends. |
| 250 MHz sample-and-hold bandwidth | Supports undersampling of 50–100 MHz IF signals in SDR receivers while maintaining >47 dB SNR. |
| 5-cycle pipeline latency | Fixed, deterministic delay simplifies timing closure in synchronous FPGA-based data capture logic. |
| Separate OVDD/OGND I/O supply | Allows seamless interfacing with 3 V microcontrollers or FPGAs without level shifters or bus buffers. |
| Power-down mode (1 µA) | Reduces system standby power in portable instrumentation; wake-up latency negligible (<1 µs). |
Applications
| Wireless Base Station IF Digitization | CCD Image Sensor Readout |
|---|---|
Use Scenario: Digitizing 45–90 MHz IF signals from quadrature demodulators in LTE femtocells. IC Role / Device Role / Timing Role: High-speed ADC capturing complex baseband samples with minimal aperture jitter. Use Value: 250 MHz input bandwidth avoids external IF filtering; 47.5 dB S/(N+D) at 10 MHz ensures EVM compliance for 64-QAM. |
Use Scenario: Reading out fast-scan linear CCD arrays in industrial inspection cameras. IC Role / Device Role / Timing Role: Sampling pixel charge integrators at 10–20 Msps with precise timing alignment. Use Value: 5-cycle fixed latency enables deterministic line-scan synchronization; OF/UF flag detects pixel saturation in real time. |
| Digital Video Capture Interface | Portable Spectrum Analyzer Front-End |
Use Scenario: Capturing composite NTSC/PAL video signals after reconstruction filtering. IC Role / Device Role / Timing Role: 8-bit digitizer operating at 13.5–27 Msps for standard-definition video digitization. Use Value: ±1 LSB INL ensures accurate luminance/chrominance separation; 20 Msps headroom supports HD-ready upgrades. |
Use Scenario: Real-time FFT-based spectral analysis in handheld RF field strength meters. IC Role / Device Role / Timing Role: Undersampling ADC acquiring 100–500 MHz signals with 20 Msps clock. Use Value: 60 dB CMRR rejects switching noise from internal DC/DC converters; 150 mW power enables fanless enclosure design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed, low-power ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9203ARUZ | 8-bit, 40 Msps; 3.3 V only; no separate OVDD; 65 dB SFDR at 10 MHz vs 60 dB for LTC1406CGN#PBF | Better spurious performance but higher power (225 mW); lacks SHDN pin and differential input flexibility | Preferred for fixed 3.3 V systems requiring higher SFDR; not drop-in due to supply and pinout differences |
| MAX1186ETI+ | 8-bit, 20 Msps; 3 V supply only; 45 dB S/(N+D) at 10 MHz; 24-pin TQFN package | Lower AC performance and no OF/UF flag; smaller footprint but no 5 V compatibility | Used where board space is constrained and 5 V operation is unnecessary; requires layout change |
Compared with AD9203ARUZ and MAX1186ETI+, the LTC1406CGN#PBF uniquely balances 5 V operation, differential input configurability, low-power shutdown, and 3 V/5 V I/O flexibility - making it optimal for legacy-compatible, mixed-voltage test and comms platforms where design reuse matters.
Availability
LTC1406CGN#PBF is available at Aetrix Electronics and suitable for wireless infrastructure, imaging sensor interfaces, digital video capture, and portable RF test equipment requiring stable component supply across extended production lifecycles.
Supply support for LTC1406CGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and DSP solutions, serving precision instrumentation, communications, and industrial markets.
The LTC1406CGN#PBF belongs to Linear's legacy high-speed ADC product line, designed specifically for low-power, medium-resolution digitization in space-constrained, thermally sensitive applications such as portable test gear and cellular infrastructure.
FAQ
What is the maximum input frequency the LTC1406CGN#PBF can accurately sample?
The LTC1406CGN#PBF has a 250 MHz small-signal input bandwidth and maintains 47.5 dB S/(N+D) at 10 MHz input - its Nyquist frequency at 20 Msps. It supports undersampling of signals well above 10 MHz (e.g., 50–100 MHz IFs) provided aliasing is managed in system-level filtering. Performance degrades gradually beyond 100 MHz due to distortion dominance.
Does the LTC1406CGN#PBF support single-ended input configuration?
Yes, the LTC1406CGN#PBF supports single-ended operation: tie AIN– to a fixed DC voltage (e.g., VREF = 2.5 V) and drive AIN+ with a ±1 V bipolar signal. The device converts the difference [(AIN+) – (AIN–)], so single-ended use preserves full 8-bit resolution and linearity specs - confirmed in datasheet Note 6 and Figure 8a.
What is the purpose of the OF/UF pin on the LTC1406CGN#PBF?
The OF/UF pin on the LTC1406CGN#PBF is an overflow/underflow status flag. It asserts high with D7–D0 = 11111111 for overrange (input > +1 V differential) or with D7–D0 = 00000000 for underrange (input < –1 V differential). This enables real-time signal clipping detection without external logic - a key feature for automatic gain control and fault monitoring in the LTC1406CGN#PBF.
Can the LTC1406CGN#PBF interface directly with a 3 V FPGA?
Yes, the LTC1406CGN#PBF supports direct 3 V FPGA interfacing via its independent OVDD/OGND rails: set OVDD = 3.3 V (or 3.0 V within 2.7–5.25 V spec) and connect D7–D0 and OF/UF to the FPGA's 3 V I/O bank. AVDD/DVDD remain at 5 V for analog/digital core operation - verified in Pin Functions section and POWER REQUIREMENTS table.
How does power-down mode affect conversion timing in the LTC1406CGN#PBF?
When SHDN is pulled low, the LTC1406CGN#PBF enters power-down mode drawing 1 µA; internal bias and amplifiers disable. After SHDN returns high, ≥20 clock cycles at >10 kHz must elapse before valid output data appears - per datasheet Section "Clock" and "Power Shutdown". No reset pin is required, but timing initialization is mandatory for reliable restart.
LTC1406CGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 20M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1406CGN#PBF FAQ
1.How can I place an order for LTC1406CGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1406CGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1406CGN#PBF reliable?
The price and inventory of LTC1406CGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1406CGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC1406CGN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1406CGN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1406CGN#PBF?
LTC1406CGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1406CGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1406CGN#PBF?
For technical support, including LTC1406CGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1406CGN#PBF requirements.
6.How does Aetrix verify that LTC1406CGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1406CGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1406CGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC1406CGN#PBF?
All LTC1406CGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1406CGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1406CGN#PBF part is unused and in its original packaging.
Return procedure for LTC1406CGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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