Analog Devices Inc. LTC1409ISW#TRPBF
- Part No.:
- LTC1409ISW#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC1409ISW#TRPBF.pdf
- Description:
- IC ADC 12BIT SAR 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,557
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Product details
Overview
LTC1409ISW#TRPBF from Analog Devices (formerly Linear Technology) is a 12-bit, 800ksps successive-approximation ADC with true differential inputs, ±2.5V bipolar input range, 72.5dB S/(N+D) at 400kHz, and integrated 2.5V reference. It operates from ±5V supplies, draws 80mW active power, and targets high-speed data acquisition in telecom and DSP systems.
For engineers reviewing the LTC1409ISW#TRPBF datasheet, LTC1409ISW#TRPBF pinout, LTC1409ISW#TRPBF application, or LTC1409ISW#TRPBF equivalent, key selection criteria include its 20MHz full-power bandwidth, no-pipeline-delay parallel output, Nap/Sleep shutdown modes (4mW / 10µW), and 60dB common-mode rejection for noise-immune signal capture.
Technical Context
The LTC1409ISW#TRPBF uses a capacitive DAC-based successive approximation architecture with an internal sample-and-hold featuring 20MHz full-power bandwidth and 150ns acquisition time. Its differential input stage rejects common-mode noise up to 60dB while supporting both single-ended (–AIN grounded) and fully differential configurations.
Conversion is initiated by a falling edge on CONVST under CS low, with BUSY signaling completion and data valid on BUSY rising edge. The 12-bit parallel output (D11–D0) is three-state, with OVDD allowing direct interfacing to 3V or 5V logic, and no pipeline delay ensures deterministic timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes; guarantees monotonic transfer function for precision measurement. |
| Sampling Rate | 800ksps maximum; enables real-time capture of signals up to 400kHz Nyquist frequency. |
| S/(N + D) | 72.5dB at 400kHz input; supports >11 effective bits for high-fidelity spectral analysis. |
| INL / DNL | ±1LSB over temperature; ensures accurate code transitions and linearity in control loops. |
| Input Range | ±2.5V differential; simplifies interface with op-amp drivers and eliminates level-shifting circuitry. |
| Power Modes | Nap (4mW) and Sleep (10µW); extends battery life in portable instrumentation without sacrificing wake-up speed. |
| Common-Mode Rejection | 60dB across 10kHz–1MHz; suppresses ground-loop noise in mixed-signal PCB layouts. |
Pinout & Package
Package: 28-lead plastic SO Wide (SW), RoHS-compliant, 11.27mm × 7.62mm body, 1.27mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +AIN (1) | Differential analog input positive | Accepts ±2.5V signal; sampled simultaneously with –AIN for true differential acquisition. |
| –AIN (2) | Differential analog input negative | Enables common-mode noise rejection; must be driven within AVDD/AVSS rails. |
| VREF (3) | 2.50V reference output | Factory-trimmed bandgap reference; buffered via internal amplifier for DAC stability. |
| REFCOMP (4) | Reference compensation node | Requires ≥1µF bypass to AGND; critical for reference amplifier stability and noise performance. |
| AGND (5) | Analog ground reference | Must be tied to DGND and OGND; star-point grounding minimizes digital coupling into analog path. |
| D11–D0 (6–13,15–18) | 12-bit parallel data outputs | Three-state, MSB-first; OVDD pin allows direct 3V/5V logic compatibility without level shifters. |
| BUSY (25) | Conversion status indicator | Active-low open-drain; rising edge marks end of conversion and data validity. |
| CONVST (23) | Conversion start trigger | Falling-edge sensitive; initiates SAR cycle with <1.5ns aperture delay jitter for precise sampling. |
| SHDN / NAP/SLP (21,20) | Power management control | NAP/SLP selects shutdown mode; SHDN asserts Nap (fast wake-up) or Sleep (ultra-low power) state. |
Key Features
| Feature | Design Value |
|---|---|
| True differential input architecture | Rejects common-mode noise up to 60dB while preserving signal integrity across 20MHz bandwidth. |
| No pipeline delay | Delivers deterministic latency: conversion completes in ≤1.25µs with data valid on BUSY rising edge. |
| Integrated 2.5V reference | 15ppm/°C tempco and ±0.02V initial accuracy eliminate external reference components and layout complexity. |
| Flexible digital interface | OVDD pin decouples output driver supply from core logic, enabling seamless 3V/5V microprocessor interfacing. |
| Low-power shutdown modes | Nap mode (4mW) resumes conversion in 200ns; Sleep mode (10µW) suits battery-powered standby applications. |
Applications
| Telecommunications Baseband Processing | Digital Signal Processing Front-End |
|---|---|
Use Scenario: Digitizing IF signals in cellular base station receivers before FPGA-based demodulation. IC Role / Device Role / Timing Role: High-speed ADC capturing 400kHz-bandwidth signals with minimal harmonic distortion for clean FFT analysis. Use Value: 72.5dB S/(N+D) and –86dB THD at Nyquist ensure accurate spectral representation without post-processing correction. | Use Scenario: Sampling sensor outputs in real-time motor control systems using TI C2000 or ADI SHARC DSPs. IC Role / Device Role / Timing Role: Precision analog front-end providing deterministic 1.25µs conversion latency for closed-loop timing budgets. Use Value: No pipeline delay and BUSY-synchronized data handoff prevent FIFO underrun in high-throughput DSP interfaces. |
| Multiplexed Data Acquisition Systems | Imaging System Digitization |
Use Scenario: Channel-scanning in industrial PLC analog input modules with 16-channel multiplexer and anti-alias filtering. IC Role / Device Role / Timing Role: Fast-acquisition ADC with 150ns tACQ minimizing dead time between channel switches. Use Value: 20MHz full-power bandwidth accommodates fast settling of multiplexer output transients without gain error. | Use Scenario: Converting CCD/CMOS line-scan sensor outputs in medical X-ray or document scanning equipment. IC Role / Device Role / Timing Role: Low-noise digitizer capturing 12-bit grayscale pixel data at line rates up to 800k lines/sec. Use Value: ±1LSB INL/DNL and 60dB CMRR preserve spatial fidelity and suppress power-supply-induced banding artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7892BRZ-1 | 800ksps, ±5V input range, no internal reference, requires external 2.5V ref; 71dB S/(N+D) at 400kHz. | Needs external reference and level-shifting for ±2.5V signal chains; higher supply current (100mW). | Select when needing wider input range or existing 2.5V reference infrastructure. |
| MAX1190ECM+ | 800ksps, 2.5V single-supply operation, internal reference, but only 70dB S/(N+D) at 400kHz and no differential inputs. | Lacks differential input and CMRR; unsuitable for noisy industrial environments requiring ground-loop immunity. | Select for space-constrained single-supply designs where common-mode rejection is not required. |
Compared with AD7892BRZ-1 and MAX1190ECM+, the LTC1409ISW#TRPBF uniquely combines integrated 2.5V reference, true differential inputs with 60dB CMRR, and guaranteed ±1LSB linearity - making it optimal for noise-sensitive, bipolar-signal acquisition where board area and BOM count are critical.
Availability
LTC1409ISW#TRPBF is available at Aetrix Electronics and suitable for telecommunications baseband processing, digital signal processing front-ends, and multiplexed data acquisition systems requiring stable component supply and long-term industrial lifecycle support.
Supply support for LTC1409ISW#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC1409ISW#TRPBF belongs to ADI's legacy Linear Technology precision data converter family, designed specifically for high-speed, low-distortion digitization in demanding instrumentation and communications infrastructure.
FAQ
What is the operating temperature range for the LTC1409ISW#TRPBF?
The LTC1409ISW#TRPBF is rated for industrial operation from –40°C to +85°C (I-grade). This extended range ensures reliable performance in base station radios, factory automation controllers, and outdoor data loggers where ambient temperatures fluctuate widely. All key specifications-including INL, DNL, and S/(N+D)-are guaranteed across this full range, unlike commercial-grade variants.
Does the LTC1409ISW#TRPBF require an external reference voltage?
No, the LTC1409ISW#TRPBF includes a factory-trimmed, temperature-compensated 2.500V internal reference with ±15ppm/°C drift and 2.480V–2.520V initial tolerance. VREF (Pin 3) provides access to this reference, and REFCOMP (Pin 4) must be bypassed with ≥1µF to AGND. An external reference may be used by overdriving VREF, but is not required for standard ±2.5V operation.
How does the LTC1409ISW#TRPBF handle differential versus single-ended inputs?
The LTC1409ISW#TRPBF natively supports both configurations. For differential use, drive +AIN and –AIN with complementary signals; for single-ended, tie –AIN to AGND and apply signal to +AIN. Its differential sample-and-hold maintains 60dB CMRR and preserves linearity regardless of common-mode voltage-enabling flexible signal conditioning without hardware reconfiguration.
What is the significance of the NAP/SLP and SHDN pins on the LTC1409ISW#TRPBF?
NAP/SLP (Pin 20) selects shutdown behavior: high enables Nap mode (4mW, 200ns wake-up), low enables Sleep mode (10µW, slower wake-up). SHDN (Pin 21) activates the selected mode when pulled low. This dual-control scheme allows system firmware to choose between rapid responsiveness (Nap) or maximum energy savings (Sleep) without changing hardware connections.
Can the LTC1409ISW#TRPBF interface directly with 3V microcontrollers?
Yes-the LTC1409ISW#TRPBF features an OVDD pin (Pin 27) that powers only the 12-bit parallel output drivers. By connecting OVDD to a 3V supply (while maintaining ±5V on AVDD/VSS), the D11–D0 outputs swing rail-to-rail between 0V and 3V, eliminating level-shifters. DGND and OGND must be tied together and to system ground for proper noise isolation.
LTC1409ISW#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 800k
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1409ISW#TRPBF FAQ
1.How can I place an order for LTC1409ISW#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1409ISW#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1409ISW#TRPBF reliable?
The price and inventory of LTC1409ISW#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1409ISW#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC1409ISW#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1409ISW#TRPBF transactions.
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4.How is shipping managed for LTC1409ISW#TRPBF?
LTC1409ISW#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1409ISW#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1409ISW#TRPBF?
For technical support, including LTC1409ISW#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1409ISW#TRPBF requirements.
6.How does Aetrix verify that LTC1409ISW#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1409ISW#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1409ISW#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1409ISW#TRPBF?
All LTC1409ISW#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1409ISW#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1409ISW#TRPBF part is unused and in its original packaging.
Return procedure for LTC1409ISW#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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