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Analog Devices Inc. LTC1420IGN#PBF
- Part No.:
- LTC1420IGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC1420IGN#PBF.pdf
- Description:
- IC ADC 12BIT PIPELINED 28SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,433
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Product details
Overview
LTC1420IGN#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 10 Msps sampling analog-to-digital converter with integrated sample-and-hold, programmable gain amplifier (PGA), and precision internal reference. It operates from single 5V or dual ±5V supplies, delivers 71 dB S/(N+D) and 83 dB SFDR at 5 MHz Nyquist input, and supports ±2.048 V, ±1.024 V, and ±0.512 V bipolar input ranges - ideal for high-speed spectral analysis and telecommunications data acquisition.
For engineers reviewing the LTC1420IGN#PBF datasheet, LTC1420IGN#PBF pinout, LTC1420IGN#PBF application, or LTC1420IGN#PBF equivalent, key selection considerations include its 100 MHz full-power bandwidth, differential input architecture with 75 dB CMRR, 28-pin narrow SSOP package, and separate OVDD logic supply enabling direct interfacing with 3V digital systems.
Technical Context
The LTC1420IGN#PBF employs a pipelined 12-bit CMOS ADC architecture with on-chip differential sample-and-hold, achieving 70 ns conversion time and 30 ns acquisition time. Its PGA provides digitally selectable 1× or 2× gain, while the flexible reference system supports internal 4.096 V/2.048 V references or external VREF drive via the SENSE pin.
It features true differential analog inputs (+AIN/–AIN), an out-of-range (OF) flag, two's complement parallel output, and dynamic logic auto-refresh for low-power idle operation. The 2.5 V VCM reference output enables single-supply common-mode biasing, and the 75 dB CMRR allows rejection of ground-loop noise in mixed-signal systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - guarantees monotonicity and full code coverage across all operating conditions. |
| Sampling Rate | 10 Msps maximum - supports real-time digitization of signals up to 5 MHz Nyquist bandwidth. |
| S/(N + D) | 71 dB typical at 5 MHz input - defines usable dynamic range for baseband signal fidelity in DSP applications. |
| SFDR | 83 dB typical at 5 MHz input - indicates spurious-free performance critical for spectral purity in communications receivers. |
| Input Range | ±2.048 V, ±1.024 V, or ±0.512 V (bipolar, software-selectable via GAIN/SENSE pins) - enables optimal SNR matching to varying signal amplitudes. |
| Power Dissipation | 250 mW typical at 10 Msps - enables high-speed conversion without thermal derating in compact layouts. |
| Full-Power Bandwidth | 100 MHz - ensures accurate capture of fast transients and wideband RF/IF signals without amplitude roll-off. |
| INL / DNL | ±0.35 LSB / ±0.25 LSB typical - ensures high DC accuracy and linearity for precision measurement and calibration-critical systems. |
Pinout & Package
Package: 28-lead narrow-body SSOP (GN package), 5.6 mm × 10.2 mm, 0.635 mm pitch, RoHS-compliant lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +AIN (Pin 1) | Positive analog input | Differential input node; accepts voltage relative to –AIN; high-impedance during hold phase. |
| –AIN (Pin 2) | Negative analog input | Differential input node; enables common-mode noise rejection when driven with matched source impedance. |
| VCM (Pin 3) | 2.5 V reference output | Low-impedance buffered output used as common-mode bias for single-supply operation or external circuitry. |
| SENSE (Pin 4) | Reference programming control | Ground → VREF = 4.096 V; short to VREF → VREF = 2.048 V; connect to VDD → enable external VREF drive. |
| VREF (Pin 5) | ADC reference voltage input | Sets core input span to ±VREF/2; bypassed with ≥1 µF ceramic capacitor for stability and noise reduction. |
| GND (Pin 6) | Analog reference ground | Return path for internal reference circuitry; must be tied to analog ground plane, not digital ground. |
| VDD (Pin 7) | Positive analog supply | 5 V analog power; requires local 1 µF ceramic decoupling to minimize supply-induced noise coupling. |
| GND (Pin 8) | Analog power ground | Primary analog ground return; must be connected to solid analog ground plane with minimal trace inductance. |
| D11–D0 (Pins 9–20) | Parallel digital outputs | 12-bit two's complement format; MSB = D11; timing-aligned to CLK rising edge with 3-cycle pipeline latency. |
| OGND (Pin 21) | Output logic ground | Return for digital output drivers; tie directly to system logic ground, separate from analog GND if possible. |
| OVDD (Pin 22) | Output logic supply | Configurable 2.7–5.25 V supply enabling direct interface to 3V or 5V logic families without level shifters. |
| VDD (Pin 23) | Secondary analog supply | Second 5 V analog supply pin; must be decoupled independently; shares same net as Pin 7 in most layouts. |
| GND (Pin 24) | Secondary analog ground | Additional analog ground connection; improves PSRR and reduces ground bounce in high-speed switching. |
| VSS (Pin 25) | Negative supply | –5 V (dual supply) or 0 V (single supply); bypassed with 1 µF ceramic when used as negative rail. |
| CLK (Pin 26) | Conversion start clock | Rising-edge-triggered; initiates sampling; supports 10 MHz max frequency; rise time <5 ns recommended. |
| OF (Pin 27) | Overflow indicator | Active-high flag signaling input outside ±FS range (codes 0x800 or 0x7FF); asynchronous to CLK. |
| GAIN (Pin 28) | PGA gain select | 5 V → 1× gain; 0 V → 2× gain; sets input scaling before ADC core to maximize resolution for small signals. |
Key Features
| Feature | Design Value |
|---|---|
| Flexible reference system | Internal 4.096 V/2.048 V references + external VREF support via SENSE pin - eliminates need for external precision references in most designs. |
| Differential input with 75 dB CMRR | Enables noise-immune signal acquisition from sensors or transformers without ground loops - critical for industrial and telecom front-ends. |
| Separate OVDD logic supply | Allows direct interfacing with 3V FPGA, ASIC, or microcontroller I/O without level-shifting components or timing skew. |
| Auto-refresh dynamic logic | Internal timer refreshes internal nodes after 500 µs idle - enables burst-mode operation and ultra-low standby power without external control. |
| Programmable PGA input stage | 1×/2× gain selection optimizes SNR for varying input amplitudes - avoids external amplification stages and associated noise/complexity. |
| Out-of-range (OF) flag | Asynchronous overflow detection simplifies real-time signal monitoring and prevents misinterpretation of clipped data in closed-loop systems. |
Applications
| Telecommunications Baseband Digitization | Digital Signal Processing Front-End |
|---|---|
|
Use Scenario: Digitizing IF signals from quadrature demodulators in cellular basestations and microwave radios. IC Role / Device Role / Timing Role: High-speed, low-distortion ADC capturing 5 MHz bandwidth signals with 83 dB SFDR to preserve adjacent-channel interference margins. Use Value: Enables direct sampling of 5 MHz IF without analog downconversion, reducing component count and phase-matching complexity. |
Use Scenario: Real-time FFT-based spectral analysis in test equipment and spectrum analyzers. IC Role / Device Role / Timing Role: 10 Msps sampling engine feeding parallel data to FPGA-based FFT engines with precise 71 dB SINAD. Use Value: Delivers clean 12-bit data at Nyquist-limited resolution, minimizing windowing artifacts and improving frequency bin accuracy. |
| Multiplexed Data Acquisition Systems | High-Speed Imaging Sensor Interface |
|
Use Scenario: Simultaneous sampling of multiple sensor channels (e.g., vibration, temperature, strain) in industrial PLCs. IC Role / Device Role / Timing Role: Centralized ADC with PGA gain control per channel, supporting ±1.024 V range for low-level sensor outputs. Use Value: Eliminates per-channel op-amp gain stages and reference buffers, reducing board area and calibration overhead. |
Use Scenario: Capturing line-scan CCD or CMOS image sensor outputs in medical X-ray or industrial inspection systems. IC Role / Device Role / Timing Role: Low-aperture-jitter (0.6 ps) ADC synchronizing to pixel clock for sub-LSB integral nonlinearity in pixel intensity mapping. Use Value: Maintains grayscale fidelity across full dynamic range, critical for diagnostic contrast sensitivity and defect detection resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9220ARZ | 12-bit, 10 Msps, but uses single +5V supply only; no internal PGA or VCM reference; requires external reference and driver. | Better suited for fixed-gain, space-constrained systems where reference and driver ICs are already present. | Select AD9220ARZ when minimizing BOM count is secondary to layout simplicity and existing 5V-only infrastructure. |
| MAX1186ETM+ | 12-bit, 10 Msps, integrated 2.048 V reference and 1×/2× PGA, but only 3.3 V supply; lower power (125 mW); no dual-supply option. | Ideal for battery-powered portable instruments requiring low-voltage operation and moderate AC performance (69 dB SFDR). | Choose MAX1186ETM+ for portable or low-power embedded systems where ±5V rails are unavailable and 83 dB SFDR is not required. |
Compared with AD9220ARZ and MAX1186ETM+, the LTC1420IGN#PBF uniquely combines dual-supply flexibility, integrated 2.5 V VCM bias, and 83 dB SFDR - making it optimal for telecom and instrumentation designs demanding both wide dynamic range and mixed-supply interoperability.
Availability
LTC1420IGN#PBF is available at Aetrix Electronics and suitable for telecommunications baseband digitization, digital signal processing front-ends, and multiplexed data acquisition systems requiring stable component supply, long-term manufacturability, and guaranteed RoHS-compliant sourcing.
Supply support for LTC1420IGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC1420IGN#PBF belongs to ADI's legacy Linear Technology high-speed precision ADC product line, designed specifically for applications demanding wide bandwidth, low distortion, and seamless integration into mixed-supply signal chains.
FAQ
What is the operating temperature range for the LTC1420IGN#PBF?
The LTC1420IGN#PBF is rated for industrial operation from –40°C to +85°C. This is confirmed by the "IGN" suffix in the part number, which denotes the Industrial grade temperature range per Linear Technology's ordering guide. The device maintains full specification compliance-including INL, SFDR, and power consumption-across this entire range.
Does the LTC1420IGN#PBF support single-supply operation with 3V digital logic?
Yes. The LTC1420IGN#PBF supports single 5V analog operation while interfacing directly with 3V digital systems via its dedicated OVDD pin (Pin 22). When OVDD is set to 3V, the D11–D0 outputs swing between 0 V and 3 V, meeting standard 3V CMOS logic thresholds without external level shifters - a key feature confirmed in the Digital Outputs section of the datasheet.
How does the GAIN pin affect the input range of the LTC1420IGN#PBF?
The GAIN pin (Pin 28) selects the programmable gain amplifier's setting: 5V = 1× gain, 0V = 2× gain. Combined with the SENSE pin configuration, this determines the full-scale input range - e.g., with SENSE = GND (VREF = 4.096 V) and GAIN = 0V, the input range becomes ±0.512 V. This mapping is explicitly defined in Table 1 of the datasheet and verified across all operating conditions.
What is the purpose of the VCM pin on the LTC1420IGN#PBF?
The VCM pin (Pin 3) provides a low-impedance, factory-trimmed 2.5 V reference output used primarily as a common-mode bias voltage for single-supply operation. It enables direct connection of –AIN to VCM when digitizing signals centered at 2.5 V, eliminating the need for external bias networks. Its ±15 ppm/°C tempco and 8 Ω output resistance are specified and tested per the Internal Reference Characteristics table.
Can the LTC1420IGN#PBF be used without an external clock source?
No - the LTC1420IGN#PBF requires an external clock applied to the CLK pin (Pin 26) to initiate conversions. However, its internal dynamic logic auto-refresh circuit activates after 500 µs of clock inactivity, preventing power-up anomalies or increased current draw during idle periods. This behavior is documented in the Conversion Details section and verified in functional testing.
LTC1420IGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 10M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±4.75V ~ 5.25V
- Voltage - Supply, Digital:
- 2.7V ~ 5.25V
- Features:
- PGA
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1420IGN#PBF FAQ
1.How can I place an order for LTC1420IGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1420IGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1420IGN#PBF reliable?
The price and inventory of LTC1420IGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1420IGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC1420IGN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1420IGN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1420IGN#PBF?
LTC1420IGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1420IGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1420IGN#PBF?
For technical support, including LTC1420IGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1420IGN#PBF requirements.
6.How does Aetrix verify that LTC1420IGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1420IGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1420IGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC1420IGN#PBF?
All LTC1420IGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1420IGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1420IGN#PBF part is unused and in its original packaging.
Return procedure for LTC1420IGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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