Analog Devices Inc. LTC1599ACN#PBF

Overview

LTC1599ACN#PBF from Analog Devices (formerly Linear Technology) is a 16-bit parallel-input multiplying current-output DAC operating from a single 5V supply. It delivers true 16-bit performance with ±1 LSB INL and DNL over the industrial temperature range (–40°C to +85°C), supports unipolar (0V to ±10V) and bipolar (±10V) output configurations via on-chip 4-quadrant resistors, and achieves 2 µs settling time to 0.0015% when paired with the LT1468 op amp - ideal for precision waveform generation and industrial control loops.

For engineers reviewing the LTC1599ACN#PBF datasheet, LTC1599ACN#PBF pinout, LTC1599ACN#PBF application, or LTC1599ACN#PBF equivalent, key selection considerations include guaranteed 16-bit monotonicity, asynchronous clear with zero/midscale selection, low 1.5 nV·s glitch impulse, 24-pin PDIP package compatibility, and support for 2-byte parallel interface with MLBYTE-controlled byte loading.

Technical Context

The LTC1599ACN#PBF implements a hybrid R-2R ladder (13 LSBs) plus segmented resistor decoding (3 MSBs) to ensure monotonic 16-bit transfer characteristics. Its internal deglitcher activates on the falling edge of LD, reducing glitch energy to 1.5 nV·s typ across full-scale transitions.

Digital control uses double-buffered 16-bit registers: an input register loaded via WR/MLBYTE (8-bit wide bus), and a DAC register updated by LD. Asynchronous CLR resets both registers to zero scale (CLVL = low) or midscale (CLVL = high), with power-on reset defaulting to zero scale.

Key Specifications

Pinout & Package

The LTC1599ACN#PBF is housed in a 24-lead plastic DIP (PDIP) package with 0.3-inch body width and through-hole mounting.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit multiplying DAC applications.

Compared with AD5547BRUZ and MAX5717ETJ+, the LTC1599ACN#PBF uniquely integrates all four precision resistors needed for 4-quadrant operation, enabling ±10 V output with only one dual op amp - reducing component count, layout complexity, and temperature-induced gain drift versus discrete resistor solutions.

Availability

LTC1599ACN#PBF is available at Aetrix Electronics and suitable for process control systems, automated test equipment, direct digital synthesis platforms, and industrial calibration instruments requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LTC1599ACN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The LTC1599ACN#PBF belongs to Linear Technology's precision DAC product line, designed specifically for applications demanding guaranteed 16-bit monotonicity, low-glitch current output, and seamless integration into 4-quadrant multiplying architectures without external resistor networks.

FAQ

What is the guaranteed integral nonlinearity (INL) specification for the LTC1599ACN#PBF over temperature?

The LTC1599ACN#PBF guarantees ±1 LSB maximum integral nonlinearity over the full industrial temperature range of –40°C to +85°C, as confirmed in the Absolute Maximum Ratings and Electrical Characteristics tables of the official datasheet. This specification applies to both unipolar and bipolar multiplying modes and ensures monotonic behavior without missing codes across all operating conditions. The LTC1599ACN#PBF achieves this with a hybrid R-2R ladder and segmented resistor architecture optimized for thermal stability.

Does the LTC1599ACN#PBF require external resistors to operate in bipolar (±10 V) mode?

No, the LTC1599ACN#PBF does not require external precision resistors for bipolar operation. It integrates on-chip 4-quadrant multiplication resistors (R1, R2, ROFS, RFB) with tightly matched values (9 kΩ to 20 kΩ) and temperature tracking. When configured per Figure 3 in the datasheet - using two LT1468 op amps and proper connections to REF, RCOM, and RFB - the LTC1599ACN#PBF delivers ±10 V output with only passive feedback components. External resistors are only needed if custom gain scaling or non-standard reference voltages are used.

What is the function of the CLVL pin on the LTC1599ACN#PBF, and how should it be configured?

The CLVL (Clear Level) pin on the LTC1599ACN#PBF determines the reset target of the asynchronous CLR signal: logic low selects zero-scale reset (DAC output = 0x0000), while logic high selects midscale reset (DAC output = 0x8000). CLVL must be hardwired to a fixed logic level (VCC or DGND) before operation - it is not dynamically controlled during normal use. The LTC1599ACN#PBF datasheet specifies that CLVL remains static during CLR assertion, and its state is sampled synchronously with the active-low CLR pulse to determine register initialization value.

Can the LTC1599ACN#PBF be used with a 3.3 V microcontroller interface?

Yes, the LTC1599ACN#PBF supports 3.3 V logic-level interfacing despite its 5 V VCC supply. Its digital inputs (D0–D7, WR, LD, MLBYTE, CLR, CLVL) meet TTL-compatible thresholds: VIH = 2.4 V min and VIL = 0.8 V max over temperature, allowing direct connection to 3.3 V CMOS or LVTTL outputs without level shifters. However, VCC must remain at 4.5 V–5.5 V to ensure proper internal biasing and DAC core operation - the digital interface and analog core are electrically isolated within the LTC1599ACN#PBF.

How does the MLBYTE pin control data loading in the LTC1599ACN#PBF?

The MLBYTE pin on the LTC1599ACN#PBF selects which byte (MSB or LSB) of the 16-bit input register is loaded during a WR pulse: when MLBYTE is low, WR loads bits D7–D0 into the LSB byte (bits 7:0); when MLBYTE is high, WR loads them into the MSB byte (bits 15:8). This allows sequential 8-bit writes from narrow data buses. The LTC1599ACN#PBF latches MLBYTE's state at the falling edge of WR - changing MLBYTE while WR is low has no effect. After both bytes are loaded, LD transfers the full 16-bit word to the DAC register.