Analog Devices Inc. LTC1604AIG#PBF

Overview

LTC1604AIG#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 333ksps successive-approximation analog-to-digital converter with differential input architecture, ±2.5V bipolar input range, 90dB S/(N+D), –100dB THD, and integrated 2.5V reference. It operates from ±5V supplies, delivers no missing codes over temperature, and targets high-fidelity data acquisition in spectrum analysis and imaging systems.

For engineers reviewing the LTC1604AIG#PBF datasheet, LTC1604AIG#PBF pinout, LTC1604AIG#PBF application, or LTC1604AIG#PBF equivalent, key selection criteria include its 3μs throughput time, dual shutdown modes (7mW nap / 10μW sleep), true differential input rejection (68dB CMRR), and μP-compatible 16-bit parallel output with BUSY strobe - all in a 36-pin SSOP package.

Technical Context

The LTC1604AIG#PBF implements a capacitor-based successive-approximation register (SAR) architecture with an internal sample-and-hold circuit optimized for 15MHz small-signal bandwidth and 5MHz full-power bandwidth. Its differential input stage acquires signals simultaneously on AIN+ and AIN–, enabling common-mode noise rejection without external instrumentation amplifiers.

Conversion timing is governed by an internal factory-trimmed clock (typ. 2.45μs conversion time, max 2.8μs), eliminating external clock dependencies. Control logic supports three interface modes: always-enabled output (CS/RD low), RD-gated read, and CONVST-RD tied ROM/slow-memory operation - all synchronized to the BUSY signal.

Key Specifications

Pinout & Package

Package: 36-pin Plastic SSOP (G package), 0.209" body width, 0.025" pitch. RoHS-compliant, lead-free (Pb-free) finish per #PBF suffix.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed 16-bit ADC applications.

Compared with ADS8588SIPM and AD7606CCPZ, the LTC1604AIG#PBF uniquely delivers single-channel 333ksps throughput with 90dB S/(N+D) and integrated 2.5V reference in a compact SSOP - making it optimal for space-constrained, high-fidelity digitizers where channel count is secondary to speed and noise floor.

Availability

LTC1604AIG#PBF is available at Aetrix Electronics and suitable for spectrum analysis equipment, medical imaging subsystems, high-speed data loggers, and DSP front-ends requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for LTC1604AIG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The LTC1604AIG#PBF belongs to ADI's legacy Linear Technology precision data acquisition product line, engineered for applications demanding high dynamic range, low distortion, and deterministic timing - especially in test & measurement and scientific instrumentation.

FAQ

What is the guaranteed minimum sampling rate for the LTC1604AIG#PBF?

The LTC1604AIG#PBF guarantees a minimum sampling rate of 333ksps across its full operating temperature range (–40°C to +85°C). This is achieved via an internal factory-trimmed clock with typical conversion time of 2.45μs and maximum of 2.8μs, plus a guaranteed 480ns acquisition time - yielding a worst-case throughput time of 3μs. The LTC1604AIG#PBF does not require external clocking or timing calibration to meet this spec.

Does the LTC1604AIG#PBF support external reference operation?

Yes, the LTC1604AIG#PBF supports external reference operation via the VREF pin (Pin 3), which features a 7.5kΩ series resistor allowing overdrive by external references such as the LT1019A-2.5. When using an external reference, full-scale error improves to ±0.125%, and the internal reference amplifier remains active to buffer the DAC. The LTC1604AIG#PBF maintains its 90dB S/(N+D) and –100dB THD specs with proper external reference decoupling.

How does the SHDN pin select between Nap and Sleep modes on the LTC1604AIG#PBF?

On the LTC1604AIG#PBF, SHDN (Pin 33) initiates shutdown when driven low, and the mode is selected solely by the logic state of CS (Pin 32): CS low selects Nap mode (7mW, reference and logic active, 200ns wake-up), while CS high selects Sleep mode (10μW, full bias shutdown, 160ms wake-up with 47μF REFCOMP cap). The LTC1604AIG#PBF datasheet explicitly defines this dual-mode behavior in the Power Shutdown section and Timing Characteristics table.

What is the purpose of the REFCOMP pin (Pin 4) on the LTC1604AIG#PBF?

The REFCOMP pin (Pin 4) on the LTC1604AIG#PBF is the compensation node for the internal reference amplifier, which gains the VREF voltage by 1.75× to generate the DAC reference. It must be bypassed to AGND with ≥22μF capacitance (47μF tantalum + 0.1μF ceramic recommended) to ensure stability and minimize tempco drift. Without proper REFCOMP bypassing, the LTC1604AIG#PBF exhibits increased reference noise and degraded 15ppm/°C tempco specification.

Can the LTC1604AIG#PBF interface directly with a 3V microcontroller?

Yes, the LTC1604AIG#PBF can interface directly with a 3V microcontroller: its digital inputs (SHDN, CS, CONVST, RD) accept 3V logic levels, and its D15–D0 and BUSY outputs are driven by a separate OVDD supply (Pin 29), which may be set to 3V. When OVDD = 3V, the LTC1604AIG#PBF outputs meet 3V logic thresholds (VOH ≥ 2.4V, VOL ≤ 0.4V) while maintaining full 16-bit accuracy and timing specs - no level-shifting circuitry required.