Analog Devices Inc. LTC1604CG#PBF
- Part No.:
- LTC1604CG#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 36-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC1604CG#PBF.pdf
- Description:
- IC ADC 16BIT SAR 36SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1604CG#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 333ksps successive-approximation analog-to-digital converter with differential input, internal 2.5V reference, and ±2.5V bipolar input range. It delivers 90dB S/(N+D), –100dB THD, and no missing codes over temperature, targeting high-fidelity data acquisition in spectrum analysis and imaging systems.
For engineers reviewing the LTC1604CG#PBF datasheet, LTC1604CG#PBF pinout, LTC1604CG#PBF application, or LTC1604CG#PBF equivalent, key selection criteria include its 36-pin SSOP package, nap/sleep shutdown modes (7mW / 10μW), 3μs throughput time, true differential input architecture with 68dB CMRR, and μP-compatible parallel interface with BUSY strobe.
Technical Context
The LTC1604CG#PBF implements a capacitor-based successive approximation register (SAR) ADC with integrated sample-and-hold, internal clock, and differential capacitive DAC. Its acquisition time is guaranteed ≤480ns, conversion time ≤2.8μs, and aperture jitter is 2ps RMS - enabling accurate sampling of signals up to 5MHz full-power bandwidth.
It features separate analog (AVDD/VSS), digital logic (DVDD), and output driver (OVDD) supplies, supporting 3V or 5V system interfacing. The internal reference provides ±15ppm/°C tempco and can be overdriven externally via the 7.5kΩ series resistor on VREF (Pin 3), while REFCOMP (Pin 4) requires ≥47μF bypassing for stability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes over 0°C to 70°C operating range |
| Sampling Rate | 333ksps maximum - enables real-time FFT of 4096-point spectra at >100Hz frame rate |
| S/(N+D) | 90dB typical at 100kHz input - supports dynamic range-critical applications like vibration monitoring |
| THD | –100dB typical at 5kHz - ensures low harmonic distortion in audio and baseband signal capture |
| Input Range | ±2.5V differential - matches standard instrumentation amplifier outputs without level-shifting |
| Power Dissipation | 220mW typical active; 7.5mW in Nap mode - reduces thermal load in dense PCB layouts |
| Common Mode Rejection | 68dB minimum - suppresses ground-loop noise in multiplexed sensor arrays |
Pinout & Package
Package: 36-lead plastic SSOP (G package), 0.025" pitch, JEDEC MS-013AC compliant. Thermal resistance θJA = 95°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN+ (1), AIN– (2) | Differential analog input pair | Acquires simultaneous voltage difference; supports single-ended use with AIN– grounded |
| VREF (3) | 2.5V reference output | Internally trimmed bandgap source; buffered via 7.5kΩ series resistor for external override |
| REFCOMP (4) | Reference amplifier compensation | Requires ≥47μF bypass to AGND for stable 1.75× gain of VREF to internal DAC reference |
| AGND (5–8) | Analog ground return | Four dedicated pins minimize ground impedance for precision analog front-end routing |
| DVDD (9), DGND (10) | Digital logic supply/ground | Isolates SAR control logic from analog section; ties to AGND at single point |
| D15–D0 (11–26) | 16-bit parallel data outputs | Three-state, μP-compatible bus; D15 is MSB; output swing set by OVDD voltage |
| BUSY (27) | Conversion status indicator | Active-low open-drain signal; rising edge marks valid data ready for latching |
| OGND (28), OVDD (29) | Output driver supply/ground | Decouples output buffer power from DVDD; enables 3V/5V system compatibility |
| RD (30) | Data read enable | Low-active control that enables D15–D0 drivers when CS is asserted |
| CONVST (31) | Conversion start trigger | Falling-edge initiated; timing-critical - must avoid mid-conversion reassertion |
| CS (32) | Chip select | Enables CONVST/RD recognition; selects Nap vs Sleep shutdown mode with SHDN |
| SHDN (33) | Power shutdown control | Low-active; CS low → Nap mode (200ns wake-up); CS high → Sleep mode (160ms wake-up) |
| VSS (34) | Negative analog supply | –5V rail; must be bypassed with 10μF tantalum + 0.1μF ceramic to AGND |
| AVDD (35, 36) | Positive analog supply | Two 5V pins; connected via 10Ω resistor to reduce supply coupling between analog sections |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Successive-approximation architecture delivers first valid result after exactly one conversion cycle - essential for deterministic real-time control loops |
| Differential input sample-and-hold | 15MHz small-signal bandwidth and 68dB CMRR eliminate need for external instrumentation amplifiers in noisy industrial environments |
| Two-tier shutdown (Nap/Sleep) | Nap mode retains reference and digital state (7.5mW); Sleep mode cuts leakage to 1μA - ideal for battery-powered portable analyzers |
| Internal 2.5V reference | ±15ppm/°C tempco and 0.01 LSB/V line regulation ensure stable full-scale accuracy across supply variations and temperature |
| 3V/5V digital interface support | Dedicated OVDD pin sets output voltage swing independently - allows direct connection to FPGA I/O banks or microcontroller ports without level shifters |
Applications
| Telecommunications Test Equipment | Digital Signal Processing Front-End |
|---|---|
Use Scenario: Capturing wideband RF IF signals in vector signal analyzers and channel emulators. IC Role / Device Role / Timing Role: High-linearity ADC digitizing 5MHz bandwidth IF streams at 333ksps for real-time FFT and modulation analysis. Use Value: 90dB S/(N+D) and –100dB THD preserve EVM and adjacent-channel power ratio (ACPR) measurement fidelity. |
Use Scenario: Sampling sensor outputs in adaptive filtering and beamforming algorithms on DSPs or FPGAs. IC Role / Device Role / Timing Role: Parallel-output ADC providing deterministic latency (<3μs) for closed-loop control in motor drives and power converters. Use Value: No pipeline delay and BUSY-strobed data enable precise synchronization with DMA engines and interrupt-driven processing. |
| Multiplexed Data Acquisition Systems | Imaging System Digitization |
Use Scenario: Scanning multi-channel thermocouple, strain gauge, or pressure transducer arrays in industrial PLCs. IC Role / Device Role / Timing Role: 16-bit SAR ADC with differential inputs rejecting common-mode noise from long sensor cables. Use Value: 68dB CMRR eliminates ground-loop artifacts; ±2.5V input range matches standard signal conditioning outputs. |
Use Scenario: Digitizing CCD or CMOS sensor analog outputs in medical X-ray or industrial inspection cameras. IC Role / Device Role / Timing Role: High-SFDR (96dB) ADC capturing low-noise, high-dynamic-range image data at pixel rates up to 333k pixels/sec. Use Value: 90dB SINAD preserves contrast resolution in low-light regions; no missing codes prevents false contours in grayscale rendering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8588SIPM (Texas Instruments) | 8-channel simultaneous-sampling, 16-bit, 100ksps; SPI interface; no internal reference | Optimized for multi-channel synchronized acquisition, not single-channel high-throughput | Select when acquiring 8 sensors concurrently; LTC1604CG#PBF preferred for single-channel 333ksps with parallel bus |
| AD7606CCPZ (Analog Devices) | 8-channel, 16-bit, 200ksps; parallel/serial interface; on-chip reference; ±10V input range | Designed for industrial multimeter and power quality monitoring with wider input span | Choose AD7606CCPZ for ±10V inputs and channel density; LTC1604CG#PBF offers higher speed and lower THD for precision lab equipment |
Compared with ADS8588SIPM and AD7606CCPZ, the LTC1604CG#PBF provides the highest single-channel throughput (333ksps) and best THD (–100dB), but lacks multi-channel capability - making it optimal for high-fidelity, low-latency digitization where speed and spectral purity are prioritized over channel count.
Availability
LTC1604CG#PBF is available at Aetrix Electronics and suitable for telecommunications test equipment, digital signal processing front-ends, and high-speed imaging systems requiring stable component supply and long-term obsolescence management.
Supply support for LTC1604CG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC1604CG#PBF belongs to ADI's legacy Linear Technology precision data acquisition product line, engineered specifically for applications demanding high DC accuracy, low distortion, and deterministic timing in laboratory-grade instrumentation and real-time signal analysis.
FAQ
What is the operating temperature range for the LTC1604CG#PBF?
The LTC1604CG#PBF is specified for commercial-grade operation from 0°C to 70°C. This range is confirmed in the Absolute Maximum Ratings table and applies to all electrical specifications including integral linearity error (±1 LSB), S/(N+D) (90dB), and THD (–100dB). The 'C' suffix in LTC1604CG#PBF explicitly denotes this temperature grade, distinguishing it from the industrial-grade LTC1604IG#PBF (–40°C to 85°C).
Does the LTC1604CG#PBF require an external clock source?
No, the LTC1604CG#PBF does not require an external clock source. It contains a factory-trimmed internal clock that guarantees a maximum conversion time of 2.8μs and a minimum sampling rate of 333ksps across the full 0°C to 70°C range. The internal clock eliminates timing jitter from external sources and simplifies system design - only CONVST, CS, and RD control signals are needed for full operation.
How does the LTC1604CG#PBF handle differential versus single-ended analog inputs?
The LTC1604CG#PBF natively supports both configurations: AIN+ and AIN– form a true differential pair with 68dB common-mode rejection, while grounding AIN– enables single-ended operation with ±2.5V range on AIN+. The sample-and-hold acquires both inputs simultaneously, preserving phase coherence. Linearity specs (INL ±1 LSB) and dynamic performance (90dB S/(N+D)) apply identically in both modes per the datasheet's Note 6.
What are the power supply requirements for the LTC1604CG#PBF?
The LTC1604CG#PBF requires three isolated supply domains: AVDD and VSS at ±5V (±5.25V absolute max), DVDD at +5V for logic, and OVDD at 3V or 5V to set output voltage levels. Each supply must be bypassed per the datasheet - e.g., AVDD pins with 10μF tantalum + 0.1μF ceramic to AGND, and REFCOMP (Pin 4) with 47μF tantalum + 0.1μF ceramic. Total active power is 220mW typical.
Can the LTC1604CG#PBF interface directly with a 3V microcontroller?
Yes, the LTC1604CG#PBF can interface directly with a 3V microcontroller. Its digital inputs (CS, CONVST, RD, SHDN) accept 3V logic levels, and the OVDD pin allows setting output swing to 3V - enabling direct connection of D15–D0 and BUSY to 3V I/O banks without level shifters. This dual-voltage capability is explicitly validated in the "3V Input/Output Compatible" section of the datasheet.
LTC1604CG#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 36-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 333k
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 36-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1604CG#PBF FAQ
1.How can I place an order for LTC1604CG#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1604CG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1604CG#PBF reliable?
The price and inventory of LTC1604CG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1604CG#PBF is usually 5 days.
3.What payment methods are accepted for LTC1604CG#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1604CG#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1604CG#PBF?
LTC1604CG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1604CG#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1604CG#PBF?
For technical support, including LTC1604CG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1604CG#PBF requirements.
6.How does Aetrix verify that LTC1604CG#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1604CG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1604CG#PBF meets industry standards.
7.What is the process for return or replacement of LTC1604CG#PBF?
All LTC1604CG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1604CG#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1604CG#PBF part is unused and in its original packaging.
Return procedure for LTC1604CG#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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