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Analog Devices Inc. LTC1604IG#PBF
- Part No.:
- LTC1604IG#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 36-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC1604IG#PBF.pdf
- Description:
- IC ADC 16BIT SAR 36SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,117
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Product details
Overview
LTC1604IG#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 333ksps successive-approximation analog-to-digital converter with differential input, internal 2.5V reference, ±2.5V bipolar input range, and 16-bit parallel μP-compatible output. It delivers 90dB S/(N+D) and –100dB THD at full speed and supports Nap (7mW) and Sleep (10μW) shutdown modes for low-power data acquisition systems.
For engineers reviewing the LTC1604IG#PBF datasheet, LTC1604IG#PBF pinout, LTC1604IG#PBF application, or LTC1604IG#PBF equivalent, this page provides verified technical context, real-world timing behavior, package-specific layout guidance, and validated alternative options for high-fidelity signal digitization in telecom, DSP, and spectrum analysis systems.
Technical Context
The LTC1604IG#PBF employs an internal successive approximation register (SAR) architecture with a fully differential sample-and-hold circuit operating up to 15MHz bandwidth. Its acquisition time is guaranteed ≤480ns, conversion time ≤2.8μs, and throughput time ≤3μs - enabling true 333ksps sampling without pipeline delay.
It integrates a factory-trimmed 2.5V bandgap reference (±15ppm/°C tempco), reference amplifier (gain = 1.75), and REFCOMP compensation node requiring ≥47μF bypassing. Digital interface uses separate CONVST (edge-triggered), CS, and RD controls with BUSY status signaling and three-state 16-bit parallel outputs compatible with 3V or 5V logic via dedicated OVDD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes over temperature - guarantees monotonicity and full code coverage in closed-loop control or precision measurement. |
| Sampling Rate | 333ksps maximum - supports real-time FFT of 4096 points within 12.3ms, suitable for spectral analysis up to ~166kHz Nyquist frequency. |
| S/(N+D) | 90dB typical at 100kHz input - enables >15-bit effective resolution in medium-bandwidth instrumentation applications. |
| THD | –100dB typical at 5kHz - ensures minimal harmonic contamination in audio and baseband signal capture. |
| Input Range | ±2.5V differential - matches standard op-amp output swing and eliminates need for level-shifting circuitry in sensor interfaces. |
| Power Dissipation | 220mW typical active, 7.5mW in Nap mode - allows thermal design margin in compact SSOP layouts without forced cooling. |
| Common Mode Rejection | 68dB minimum - suppresses ground-loop noise and enables direct connection to floating transducers or transformer-coupled sources. |
Pinout & Package
Package: 36-lead plastic SSOP (G package), 0.209" width, JEDEC MO-153 compliant. Thermal resistance θJA = 95°C/W; max junction temperature = 125°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN+ (1), AIN– (2) | Differential analog input pair | Acquires simultaneous voltage difference; supports single-ended use (AIN– grounded) or true differential measurement up to 15MHz bandwidth. |
| VREF (3) | 2.5V reference output | Provides buffered internal reference; series 7.5kΩ resistor allows external override for gain scaling or dynamic range adjustment. |
| REFCOMP (4) | Reference amplifier compensation | Requires ≥47μF tantalum + 0.1μF ceramic to AGND; determines reference settling time and noise floor stability. |
| AGND (5–8) | Analog ground terminals | Four dedicated analog ground pins minimize ground bounce and ensure <1 LSB INL error under full-speed switching. |
| DVDD (9), DGND (10) | Digital core supply/ground | Isolates digital logic noise from analog section; must tie DGND to AGND plane at single point near AVDD/VSS. |
| D15–D0 (11–26) | 16-bit parallel data outputs | Three-state, MSB-first, two's complement format; driven by OVDD-supplied output buffers for 3V/5V system compatibility. |
| BUSY (27) | Conversion status indicator | Active-low open-drain signal; rising edge marks valid data ready - used for synchronous latching without wait states. |
| OGND (28), OVDD (29) | Output driver supply/ground | Separate power domain isolates output switching noise from DVDD/DGND; critical for maintaining AC performance during bus reads. |
| RD (30), CONVST (31), CS (32) | Control inputs | Asynchronous, μP-compatible timing: CS enables interface, CONVST starts conversion on falling edge, RD enables output drivers. |
| SHDN (33) | Power shutdown control | Low-active pin; mode selected by CS state: CS low → Nap (200ns wake-up), CS high → Sleep (160ms wake-up with 47μF). |
| VSS (34), AVDD (35–36) | Negative/analog supplies | ±5V dual supply required; AVDD pins must be paralleled via 10Ω resistor and individually bypassed to AGND with 10μF + 0.1μF. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Successive approximation architecture delivers first valid conversion result after exactly one throughput cycle (≤3μs), eliminating latency uncertainty in real-time control loops. |
| Differential input with 68dB CMRR | Enables rejection of common-mode noise from long cables or noisy environments without external instrumentation amplifiers - reduces BOM count and board area. |
| Two-tier shutdown (Nap/Sleep) | Nap mode retains reference and digital logic for sub-μs wake-up; Sleep mode cuts total current to 1μA - ideal for battery-powered burst-sampling applications. |
| Internal 2.5V reference (±15ppm/°C) | Eliminates external reference IC and trimming components; factory-trimmed accuracy (±0.125%) avoids calibration overhead in production test. |
| 3V/5V I/O compatibility | Dedicated OVDD pin allows seamless interfacing to mixed-voltage systems - outputs swing rail-to-rail relative to OVDD, independent of DVDD. |
Applications
| Telecommunications Baseband Digitization | Digital Signal Processing Front-End |
|---|---|
Use Scenario: Digitizing IF signals from quadrature demodulators in wireless infrastructure equipment operating up to 160kHz bandwidth. IC Role / Device Role / Timing Role: High-fidelity ADC capturing complex baseband I/Q waveforms with minimal harmonic distortion and jitter-induced spurs. Use Value: 90dB S/(N+D) and –100dB THD preserve EVM in QAM-64/256 modems; 333ksps throughput supports multi-carrier LTE channel monitoring. |
Use Scenario: Feeding real-time FFT engines in embedded DSP systems performing spectral analysis of vibration or acoustic signals. IC Role / Device Role / Timing Role: Sampling engine synchronized to DSP DMA controller via BUSY signal for zero-wait-state data transfer. Use Value: No missing codes and 16-bit resolution enable accurate amplitude/frequency bin detection across 4096-point transforms; Nap mode reduces average power during idle intervals. |
| Multiplexed Industrial Data Acquisition | High-Speed Imaging Sensor Interface |
Use Scenario: Scanning multiple precision sensors (strain gauges, RTDs, thermocouples) through analog multiplexer in PLC or DAQ modules. IC Role / Device Role / Timing Role: Precision SAR ADC with differential inputs rejecting common-mode noise from shared sensor grounds and long traces. Use Value: 68dB CMRR eliminates ground-loop errors; ±2.5V input range matches conditioned sensor outputs without additional level-shifting stages. |
Use Scenario: Capturing line-scan CCD or CMOS image sensor outputs in medical or industrial inspection systems requiring >14 ENOB. IC Role / Device Role / Timing Role: Low-jitter acquisition front-end converting analog pixel data with minimal aperture uncertainty (2ns typical). Use Value: 5MHz full-power bandwidth supports fast pixel clock rates; internal reference ensures consistent gain across imaging frames without drift-induced shading artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606BSTZ | 8-channel simultaneous sampling, 200ksps, internal reference ±10ppm/°C, SPI/I²C interface - no parallel bus. | Designed for multi-channel synchronized acquisition; lacks 333ksps single-channel throughput and true differential input flexibility. | Select when channel count >1 and system uses serial interface; avoid if parallel bus timing or >300ksps per channel is required. |
| ADS8588SIPM | Single-channel, 1MSPS, 16-bit, ±2.5V input, SPI interface, 1.8V/3.3V I/O - no Nap/Sleep modes. | Higher speed but no hardware shutdown; requires external reference and lacks integrated REFCOMP compensation. | Select for higher throughput where power budget allows continuous operation; avoid if ultra-low-power sleep states or internal reference simplicity are mandatory. |
Compared with AD7606BSTZ and ADS8588SIPM, the LTC1604IG#PBF uniquely combines 333ksps parallel-output performance, dual shutdown modes, and fully integrated reference/compensation - making it optimal for space-constrained, low-duty-cycle, single-channel precision digitization where deterministic timing and minimal external components are critical.
Availability
LTC1604IG#PBF is available at Aetrix Electronics and suitable for telecommunications baseband digitization, digital signal processing front-ends, and multiplexed industrial data acquisition requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC1604IG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets since 1965.
The LTC1604IG#PBF belongs to Linear Technology's precision data acquisition product line, designed specifically for high-dynamic-range, low-latency digitization in demanding instrumentation and real-time control applications where AC performance and power efficiency are co-optimized.
FAQ
What is the maximum sampling rate supported by the LTC1604IG#PBF?
The LTC1604IG#PBF supports a guaranteed maximum sampling rate of 333ksps, corresponding to a minimum throughput time of 3μs (acquisition + conversion). This rate is maintained across the full operating temperature range (–40°C to +85°C) and is enabled by its internal SAR architecture with no pipeline delay. The LTC1604IG#PBF achieves this while delivering 90dB S/(N+D) and –100dB THD at 5kHz input frequency.
Does the LTC1604IG#PBF require an external reference?
No, the LTC1604IG#PBF includes a factory-trimmed, temperature-compensated 2.5V internal reference with ±15ppm/°C tempco and ±0.125% full-scale accuracy. It is accessible at Pin 3 (VREF) and buffered via an internal amplifier with gain 1.75. An external reference may be applied only if dynamic range scaling or improved stability is needed - the LTC1604IG#PBF does not require external reference circuitry for basic operation.
How do Nap and Sleep shutdown modes differ in the LTC1604IG#PBF?
The LTC1604IG#PBF offers two distinct low-power states: Nap mode (7.5mW, 200ns wake-up) retains reference and digital logic for rapid resumption, while Sleep mode (10μW, 160ms wake-up with 47μF capacitor) shuts down all bias currents except leakage. Mode selection is controlled by SHDN and CS pin states: SHDN low + CS low = Nap; SHDN low + CS high = Sleep. The LTC1604IG#PBF datasheet specifies these behaviors with timing constraints and power measurements.
Can the LTC1604IG#PBF interface directly with 3V microcontrollers?
Yes, the LTC1604IG#PBF supports 3V logic levels via its dedicated OVDD pin (Pin 29), which powers the D15–D0 output drivers and BUSY signal. Digital inputs (CS, CONVST, RD, SHDN) accept 3V or 5V logic thresholds per specification (VIH ≥2.4V, VIL ≤0.8V). This allows direct connection to 3V µPs without level shifters - the LTC1604IG#PBF maintains full AC performance and timing compliance in mixed-voltage systems.
What is the purpose of the REFCOMP pin (Pin 4) on the LTC1604IG#PBF?
The REFCOMP pin (Pin 4) is the compensation node for the internal reference amplifier, which gains the VREF voltage by 1.75× to generate the DAC reference. It must be bypassed to AGND with ≥47μF (tantalum or ceramic) + 0.1μF ceramic to ensure stability, low noise, and proper settling. Omitting or undersizing this capacitor causes reference oscillation and degraded S/(N+D); the LTC1604IG#PBF datasheet specifies 47μF as the minimum for 160ms Sleep-mode wake-up.
LTC1604IG#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 36-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 333k
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 36-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1604IG#PBF FAQ
1.How can I place an order for LTC1604IG#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1604IG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1604IG#PBF reliable?
The price and inventory of LTC1604IG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1604IG#PBF is usually 5 days.
3.What payment methods are accepted for LTC1604IG#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1604IG#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1604IG#PBF?
LTC1604IG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1604IG#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1604IG#PBF?
For technical support, including LTC1604IG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1604IG#PBF requirements.
6.How does Aetrix verify that LTC1604IG#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1604IG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1604IG#PBF meets industry standards.
7.What is the process for return or replacement of LTC1604IG#PBF?
All LTC1604IG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1604IG#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1604IG#PBF part is unused and in its original packaging.
Return procedure for LTC1604IG#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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