Analog Devices Inc. LTC1609CSW#PBF
- Part No.:
- LTC1609CSW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC1609CSW#PBF.pdf
- Description:
- IC ADC 16BIT SAR 20SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:386
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Product details
Overview
LTC1609CSW#PBF from Analog Devices (acquired Linear Technology) is a 16-bit, 200ksps serial analog-to-digital converter with integrated sample-and-hold, precision 2.5V reference, and internal clock. It operates from a single 5V supply, delivers ±2LSB INL and guaranteed no missing codes over temperature, and supports bipolar (±10V, ±5V, ±3.3V) and unipolar (0V–10V, 0V–5V, 0V–4V) input ranges. It is used in high-speed industrial data acquisition systems requiring stable DC accuracy and low power.
For engineers reviewing the LTC1609CSW#PBF datasheet, LTC1609CSW#PBF pinout, LTC1609CSW#PBF application, or LTC1609CSW#PBF equivalent, key selection considerations include its 20-pin SO package, dual-mode serial interface (internal/external DATACLK), SB/BTC format control, and ±10V input capability with 87dB typical SNR at 200ksps.
Technical Context
The LTC1609CSW#PBF implements a switched-capacitor successive approximation architecture with auto-zeroed comparator and 16-bit capacitive DAC. Its conversion cycle comprises a 2µs acquisition phase followed by a 3µs conversion phase, achieving 5µs total throughput time.
It features dual ground domains (AGND1, AGND2, DGND), separate analog (VANA) and digital (VDIG) 5V supplies tied together, and configurable data output format (straight binary or two's complement) via SB/BTC pin. The EXT/INT pin selects between internal clock-driven serial output and external DATACLK synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - delivers 65,536 distinct output codes with guaranteed no missing codes across temperature. |
| Sample Rate | 200ksps - enables real-time capture of signals up to 100kHz Nyquist bandwidth. |
| INL | ±2LSB (typ) - ensures monotonicity and <0.003% full-scale linearity error for precision measurement. |
| SNR | 87dB (typ) - supports >14.5 effective number of bits (ENOB) at 1kHz input under 200ksps sampling. |
| Power Dissipation | 65mW (typ) - enables low-thermal-load operation in dense PCB layouts without forced cooling. |
| Input Ranges | ±10V, ±5V, ±3.3V, 0V–10V, 0V–5V, 0V–4V - selectable via external resistor networks on R1IN/R2IN/R3IN pins. |
| Reference | Internal 2.500V ±10mV (±5ppm/°C) - factory-trimmed bandgap source; supports external reference down to 2.3V. |
Pinout & Package
Package: 20-lead plastic SO (SOIC-20), 0.300" wide, RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R1IN | Analog Input Channel 1 | Primary analog input node; connected with 200Ω or 100Ω resistors per selected range (e.g., ±10V, 0V–10V). |
| AGND1 | Analog Ground 1 | Dedicated analog return for R1IN path; must be tied to clean analog ground plane, not shared with digital ground. |
| R2IN | Analog Input Channel 2 | Secondary analog input node; used with R1IN/R3IN to configure input impedance and range (e.g., ±10V → VIN→R1IN, AGND→R2IN, CAP→R3IN). |
| R3IN | Analog Input Channel 3 | Third analog input node; completes resistor-divider network for gain/offset scaling per Table 1a/b. |
| CAP | Reference Buffer Output | Drives internal DAC; requires 2.2µF tantalum bypass to AGND2; max DC load ≤2mA; AC loading degrades performance. |
| REF | 2.5V Reference Output | Factory-trimmed bandgap reference; bypass with 2.2µF tantalum; can be overdriven by external reference for higher accuracy. |
| AGND2 | Analog Ground 2 | Return for REF/CAP circuitry; must be isolated from AGND1/DGND except at single-point star ground. |
| SB/BTC | Data Format Select | High = straight binary (0V–10V); Low = two's complement (±10V); sets MSB polarity and zero-code mapping. |
| EXT/INT | Serial Clock Mode | High = external DATACLK drives output; Low = internal clock pulses DATACLK and shifts DATA automatically. |
| DGND | Digital Ground | Return for CS, R/C, BUSY, DATA, DATACLK, SYNC, TAG; must be separated from analog grounds except at system-level star point. |
| VDIG | Digital Supply | +5V digital rail; must be tied directly to VANA (no series resistance or ferrite); bypass with 0.1µF ceramic + 10µF tantalum. |
| VANA | Analog Supply | +5V analog rail; powers internal reference, buffer, SAR, and analog front-end; same voltage as VDIG but separately bypassed. |
| PWRD | Power-Down Control | High = shutdown mode (50µW typ); preserves last conversion result in shift register; reference and buffer disabled. |
| BUSY | Conversion Status Flag | Active-low open-drain output; goes low at conversion start; rising edge indicates valid data ready for readout. |
| CS | Chip Select | Active-low enable; OR'd with R/C; falling edge initiates conversion when R/C is high, or enables serial output when R/C is low. |
| R/C | Read/Convert Control | Falling edge (with CS low) starts conversion and holds sample; rising edge (with CS low) enables serial data output. |
| TAG | Serial Data Tag Input | In external clock mode, value latched at conversion start is shifted out after 16-bit DATA; enables daisy-chaining multiple LTC1609 devices. |
| DATA | Serial Data Output | MSB-first 16-bit output; format determined by SB/BTC; valid on DATACLK edges per EXT/INT setting; holds TAG value post-data in external mode. |
| DATACLK | Serial Clock I/O | Input when EXT/INT = high (external clock); output when EXT/INT = low (16-pulse internal clock); low between conversions. |
| SYNC | Synchronization Pulse | Output pulse aligned to external DATACLK edge upon R/C or CS trigger; used for timing-critical multi-device synchronization. |
Key Features
| Feature | Design Value |
|---|---|
| Multiple Input Ranges | Supports six factory-specified ranges (±10V, ±5V, ±3.3V, 0V–10V, 0V–5V, 0V–4V) via external resistor networks-enables one ADC design to serve diverse sensor interfaces. |
| Integrated Precision Reference | 2.500V ±10mV internal reference with ±5ppm/°C tempco eliminates need for external reference IC in cost-sensitive applications. |
| Low-Power Serial Interface | Single 5V supply, 65mW typical dissipation, and 50µW shutdown mode reduce thermal impact and simplify power architecture in portable or dense systems. |
| Configurable Data Format | SB/BTC pin selects straight binary (unipolar) or two's complement (bipolar) output-avoids software sign-extension or format conversion overhead. |
| Overvoltage Protected Inputs | R1IN/R2IN/R3IN tolerate ±25V continuous input-enables direct connection to industrial sensors without external clamping diodes. |
| External Clock Synchronization | EXT/INT and SYNC pins allow precise alignment of conversion timing to external master clock-critical for synchronized multi-channel acquisition. |
Applications
| Industrial Process Monitoring | PC-Based High-Speed DAQ |
|---|---|
|
Use Scenario: Continuous monitoring of 4–20mA current loops, thermocouple outputs, and strain gauge bridges in PLC-controlled manufacturing lines. IC Role / Device Role / Timing Role: Primary ADC digitizing conditioned analog inputs at 200ksps; uses ±10V range and internal reference for field transmitter compatibility. Use Value: ±2LSB INL and 87dB SNR ensure accurate representation of slow-varying process variables with minimal calibration drift over temperature. |
Use Scenario: Add-on data acquisition cards for industrial PCs capturing vibration, acoustic emission, or motor current waveforms. IC Role / Device Role / Timing Role: High-throughput serial ADC interfaced to FPGA or microcontroller via CS/R/C/BUSY handshake; leverages external DATACLK for deterministic timing. Use Value: 5µs throughput time and SYNC output enable tight inter-channel skew control across multiple LTC1609 units on a single PCIe card. |
| Multiplexed Sensor Systems | DSP-Front-End Signal Conditioning |
|
Use Scenario: 16-channel thermistor array in environmental test chambers, where each channel is sequentially sampled using analog multiplexer. IC Role / Device Role / Timing Role: Central ADC accepting switched inputs; uses R/C-triggered conversion and BUSY flag to coordinate multiplexer settling and acquisition timing. Use Value: 2µs acquisition time and ±10V input range accommodate fast-switching muxes while preserving resolution across all channels. |
Use Scenario: Pre-DSP signal chain in ultrasound or radar receivers requiring high-fidelity digitization before FFT-based processing. IC Role / Device Role / Timing Role: Precision ADC feeding fixed-point DSP; uses two's complement output (SB/BTC = low) and internal clock for minimal interface logic. Use Value: 87dB SINAD at 1kHz and –100dB THD preserve dynamic range for detecting weak echoes amid strong clutter signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit serial ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7809U | 200ksps, 16-bit, ±10V range, but requires external reference and separate +5V/+–5V supplies; no internal clock or sample-and-hold. | Needs additional reference IC and dual-supply regulation; less integrated, higher BOM count. | Select ADS7809U only if legacy design reuse or external reference precision >2.5V ±1mV is required. |
| AD977ARZ | 200ksps, 16-bit, ±10V range, but uses parallel interface and consumes 120mW; no SB/BTC format select or EXT/INT clock mode. | Requires 16-bit data bus and more GPIOs; incompatible with space-constrained serial-only designs. | Choose AD977ARZ only when system already uses parallel ADC interface and thermal budget allows higher power. |
Compared with ADS7809U and AD977ARZ, the LTC1609CSW#PBF offers superior integration (internal ref, clock, S&H), lower power (65mW vs ≥120mW), and flexible serial interface modes-making it optimal for new compact, low-power, and software-simple data acquisition designs.
Availability
LTC1609CSW#PBF is available at Aetrix Electronics and suitable for industrial process control, PC-based high-speed data acquisition, and multiplexed sensor systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LTC1609CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC1609CSW#PBF belongs to Linear Technology's precision data acquisition product line, designed specifically for applications demanding high DC accuracy, low power, and flexible interface options in harsh industrial environments.
FAQ
What input voltage ranges does the LTC1609CSW#PBF support?
The LTC1609CSW#PBF supports six factory-specified input ranges: bipolar ±10V, ±5V, ±3.3V and unipolar 0V–10V, 0V–5V, 0V–4V. Range selection is accomplished by configuring external resistors on R1IN, R2IN, and R3IN per Tables 1a and 1b in the datasheet. Each configuration defines both the full-scale range and nominal input impedance (e.g., ±10V yields 22.9kΩ).
How does the SB/BTC pin affect the output data format of the LTC1609CSW#PBF?
The SB/BTC pin on the LTC1609CSW#PBF determines whether the 16-bit serial output is in straight binary (SB/BTC = high) or two's complement (SB/BTC = low) format. Straight binary is used for unipolar ranges (e.g., 0V–10V), where 0x0000 = 0V and 0xFFFF ≈ full scale. Two's complement is used for bipolar ranges (e.g., ±10V), where 0x8000 = 0V, 0x0000 = –10V, and 0xFFFF = +10V – 1 LSB.
Can the LTC1609CSW#PBF operate with an external reference, and what are the voltage requirements?
Yes, the LTC1609CSW#PBF can operate with an external reference applied to the REF pin. The specified external reference voltage range is 2.30V to 2.70V. At 2.50V, the external reference must sink ≤100µA. Using an external reference improves absolute accuracy beyond the internal 2.500V ±10mV spec, especially in systems requiring traceable metrology-grade calibration.
What is the purpose of the CAP pin on the LTC1609CSW#PBF, and how should it be bypassed?
The CAP pin on the LTC1609CSW#PBF is the output of the internal reference buffer, driving the DAC and providing a low-impedance 2.5V source. It must be bypassed to AGND2 with a 2.2µF tantalum capacitor (as shown in Figure 1 and recommended in Pin Functions). This decoupling minimizes code transition noise and maintains 87dB SNR performance; AC loading or undersized capacitance degrades dynamic accuracy.
How does the EXT/INT pin change the serial interface behavior of the LTC1609CSW#PBF?
When EXT/INT = low, the LTC1609CSW#PBF uses its internal clock: DATACLK becomes an output pulsing 16 times per conversion, and DATA is valid on both edges. When EXT/INT = high, DATACLK becomes an input accepting an external clock, and DATA is synchronized to those edges. In both modes, SYNC provides a timing-aligned pulse for multi-device coordination.
LTC1609CSW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 20-SO
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1609CSW#PBF FAQ
1.How can I place an order for LTC1609CSW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1609CSW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1609CSW#PBF reliable?
The price and inventory of LTC1609CSW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1609CSW#PBF is usually 5 days.
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For technical support, including LTC1609CSW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1609CSW#PBF requirements.
6.How does Aetrix verify that LTC1609CSW#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1609CSW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1609CSW#PBF meets industry standards.
7.What is the process for return or replacement of LTC1609CSW#PBF?
All LTC1609CSW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1609CSW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1609CSW#PBF part is unused and in its original packaging.
Return procedure for LTC1609CSW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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