Analog Devices Inc. LTC1702ACGN#TRPBF
- Part No.:
- LTC1702ACGN#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 24-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC1702ACGN#TRPBF.pdf
- Description:
- IC REG CTRLR BUCK 24SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,010
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Product details
Overview
LTC1702ACGN#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel, synchronous buck switching regulator controller optimized for high-efficiency, low-input-voltage DC/DC conversion in microprocessor and ASIC core/I/O supply applications. It integrates two independent voltage-mode PWM controllers operating at 550kHz, each driving external N-channel MOSFET pairs, with ±0.5% reference accuracy, 1% total output regulation, and 180° out-of-phase interleaving to minimize input ripple. It supports 1A–25A per channel with <100µA shutdown current.
For engineers reviewing the LTC1702ACGN#TRPBF datasheet, LTC1702ACGN#TRPBF pinout, LTC1702ACGN#TRPBF application, or LTC1702ACGN#TRPBF equivalent, key selection considerations include its dual-phase interleaved architecture, no-current-sense-resistor operation, 24-pin narrow SSOP package, Burst Mode® efficiency optimization, and latched overvoltage fault protection - all critical for compact, high-density logic supply designs.
Technical Context
The LTC1702ACGN#TRPBF implements two independent voltage-mode feedback loops with 25MHz gain-bandwidth error amplifiers, enabling complex pole-zero compensation for fast transient response. Each channel uses a constant-frequency 550kHz oscillator with 180° phase offset between channels, supporting true PWM control without slope compensation.
Its gate drivers feature 0.5Ω RON, deliver up to 5A peak current, and operate with floating BOOST supplies referenced to SW nodes - enabling full enhancement of high-side N-MOSFETs without external charge-pump ICs. Current limiting is achieved via VDS sensing across the bottom MOSFET, eliminating external sense resistors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switching Frequency | 550kHz typical; enables use of ≤1µH inductors and small ceramic output capacitors, reducing PCB area by >40% vs. 300kHz designs. |
| Output Regulation Accuracy | ±0.5% internal reference; achieves ≤1% total DC output accuracy, critical for sub-1.2V microprocessor core rails. |
| Channel Phase Relationship | 180° out-of-phase operation; cuts RMS input capacitor current by ~48%, allowing smaller, lower-cost CIN and reduced EMI filtering. |
| Shutdown Supply Current | <100µA; ensures ultra-low power loss during system sleep states in portable and battery-backed systems. |
| Current Limit Method | VDS-based sensing on bottom MOSFET; removes need for power-wasting external sense resistor and associated layout complexity. |
| Fault Protection | Latched overvoltage trip at +15% VOUT with 25µs delay; holds BG outputs high to clamp output, preventing damage to downstream logic. |
| Package | 24-pin narrow SSOP (GN); 150mil body width, 0.635mm pitch - compatible with standard SMT reflow and automated optical inspection. |
Pinout & Package
Package: 24-pin narrow plastic SSOP (GN), 150mil width, 0.635mm lead pitch, exposed pad not present. Thermal resistance θJA = 100°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVCC (1) | Driver power supply input | Supplies power to both BG drivers; must be ≥VGS(ON) of bottom MOSFETs; tied directly to VIN in most 2-step architectures. |
| BOOST1 (2) | Top-gate driver floating supply | Provides gate drive voltage for TG1; bypassed to SW1 with 1µF capacitor; enables full turn-on of high-side N-MOSFET without external boost IC. |
| BG1 (3) | Bottom gate driver output | Directly drives gate of QB1; 0.5Ω RON, 5A peak capability; pulls low in normal operation, high in FAULT latch. |
| TG1 (4) | Top gate driver output | Floats with SW1 node; driven from BOOST1; designed for ≤10,000pF gate capacitance; no series resistor recommended. |
| SW1 (5) | Switching node connection | Connects to drain-source junction of QT1/QB1; serves as return path for TG1 driver and current limit comparator reference. |
| IMAX1 (6) | Current limit threshold set | Internal 10µA pull-up; sets overcurrent trip point via single resistor to PGND; eliminates need for precision current-sense amplifier. |
| PGOOD1 (7) | Power-good status output | Open-drain flag asserting when FB1 is within –5% of target; used for sequencing and system enable in multi-rail supplies. |
| FCB (8) | Force continuous mode control | Pull to SGND to disable Burst Mode®; maintains continuous conduction down to zero load - essential for noise-sensitive analog circuits. |
| RUN/SS1 (9) | Channel 1 enable & soft-start | Internal 3.5µA current source charges external capacitor; sets output ramp rate and prevents inrush; pulling low disables entire channel. |
| COMP1 (10) | Error amplifier output / PWM input | Direct connection point for Type II/III compensation network; high GBW (25MHz) allows aggressive loop shaping for <10µs load-step recovery. |
| SGND (11) | Signal ground reference | Return for all low-power analog circuitry (FB, COMP, RUN/SS); must be separated from PGND and joined at single point near CIN. |
| FB1 (12) | Channel 1 feedback input | 800mV internal reference; senses output via resistor divider; supports direct regulation down to 0.8V without level-shifting circuitry. |
| VCC (13) | Analog core supply | 3V–7V input powering internal logic, references, and comparators; requires ≥1µF ceramic bypass to SGND. |
| FB2 (14) | Channel 2 feedback input | Identical function to FB1; enables independent regulation of second output (e.g., 3.3V I/O rail while FB1 regulates 1.2V core). |
| COMP2 (15) | Channel 2 error amplifier output | Independent compensation node; allows separate loop tuning for asymmetric loads or different output voltages. |
| RUN/SS2 (16) | Channel 2 enable & soft-start | Functionally identical to RUN/SS1; permits staggered startup or independent channel disable for dynamic power management. |
| FAULT (17) | Latched overvoltage fault output | Open-drain output pulled up by 10µA; asserts high on +15% VOUT excursion >25µs; requires VCC cycle to clear latch. |
| PGOOD2 (18) | Channel 2 power-good flag | Matches PGOOD1 behavior; provides independent rail monitoring for FPGA or SoC power sequencing logic. |
| PGND (19) | Power ground return | High-current return for BG drivers and external MOSFET sources; must connect to low-impedance plane near CIN/COUT and MOSFET footprints. |
| SW2 (20) | Channel 2 switching node | Functionally identical to SW1; ties to QT2/QB2 junction; enables independent inductor placement and layout isolation. |
| TG2 (21) | Channel 2 top gate driver | Same specs as TG1; 180° phase offset ensures interleaved current draw from shared input bus. |
| BG2 (22) | Channel 2 bottom gate driver | Same specs as BG1; allows independent current limiting and fault handling per channel. |
| BOOST2 (23) | Channel 2 top-gate supply | Independent BOOST path prevents cross-talk; bypassed to SW2 with dedicated 1µF capacitor. |
| IMAX2 (24) | Channel 2 current limit set | Independent threshold programming; supports asymmetric current limits (e.g., 15A core / 10A I/O) using different RIMAX values. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent voltage-mode controllers | Enables simultaneous regulation of dissimilar outputs (e.g., 1.2V/3.3V) with separate compensation, soft-start, and current limits - no shared stability compromises. |
| 180° interleaved 2-phase operation | Reduces input capacitor RMS current by nearly 50%, permitting smaller, lower-ESR ceramics and cutting EMI filter size/cost by 30–40%. |
| VDS-based current sensing | Eliminates 2–5W power loss and board space consumed by mΩ-range current-sense resistors in 15A+ rails. |
| Burst Mode® at light load | Extends efficiency to <10mA load while maintaining <25µV output ripple - critical for always-on system standby modes. |
| Onboard 0.8V reference trimmed to ±0.5% | Supports direct regulation of 0.8V–5V outputs without external op-amps; reduces component count and improves long-term drift performance. |
| Latched FAULT with automatic clamp | Prevents catastrophic overvoltage events by forcing bottom MOSFETs ON during fault - protects downstream logic without requiring external crowbar circuitry. |
Applications
| Microprocessor Core Supply | FPGA I/O Bank Supply |
|---|---|
Use Scenario: Providing tightly regulated 1.0V–1.2V at up to 25A to CPU/GPU cores in notebook or embedded computing platforms. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller managing two parallel 12.5A phases with interleaved timing to reduce input/output ripple and thermal stress. Use Value: Achieves <1% static regulation and <3% dynamic deviation under 10A/µs load steps - meeting Intel VR13/VR14 specification margins without additional post-regulation LDOs. | Use Scenario: Generating multiple independent 1.8V, 2.5V, and 3.3V I/O rails for Xilinx or Intel FPGAs with strict sequencing and voltage-margining requirements. IC Role / Device Role / Timing Role: Dual-channel controller delivering isolated, independently enabled outputs with programmable soft-start delays and PGOOD sequencing signals. Use Value: Enables precise power-up order (e.g., VCCINT before VCCIO) and margin testing via FB-divider adjustment - eliminating need for external sequencers or supervisors. |
| ASIC Power Delivery Network | Industrial PLC Logic Supply |
Use Scenario: Powering high-density ASICs in telecom line cards or AI accelerators requiring 0.8V–1.5V at >20A with minimal voltage droop during burst computation. IC Role / Device Role / Timing Role: High-bandwidth voltage-mode controller with 25MHz error amplifier and 550kHz switching, enabling >200kHz loop crossover for sub-5µs transient recovery. Use Value: Delivers <50mV undershoot on 15A load steps - avoiding logic errors and eliminating need for large bulk capacitance (>1000µF) at the point-of-load. | Use Scenario: Generating robust 3.3V and 5V logic supplies in programmable logic controllers operating continuously in 0°C–70°C industrial environments. IC Role / Device Role / Timing Role: Dual-output controller with latched FAULT protection and <100µA shutdown current, ensuring fail-safe operation and low standby power. Use Value: Maintains regulation accuracy better than ±1.5% over temperature and line, exceeding IEC 61000-4-30 immunity requirements for factory automation equipment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS546D24RTQR | Single-chip 60A dual-phase controller with integrated MOSFETs; higher integration but fixed 0.6V reference and no Burst Mode®. | Best for space-constrained designs where thermal management permits integrated FETs; unsuitable for discrete high-current (>30A) or ultra-low-noise applications. | Select TPS546D24RTQR only if board area is primary constraint and discrete MOSFET flexibility is not required. |
| LTC3883IUH#PBF | Digital PMBus-enabled dual-output controller with telemetry, margining, and black-box logging; 400kHz max frequency, larger QFN-40 package. | Required for systems needing remote monitoring, firmware updates, or compliance reporting (e.g., datacenter PSUs); adds complexity and cost for simple fixed-rail designs. | Choose LTC3883IUH#PBF when digital control, fault logging, or supply chain traceability are mandatory - not for cost-optimized analog-only designs. |
Compared with TPS546D24RTQR and LTC3883IUH#PBF, the LTC1702ACGN#TRPBF offers superior analog performance (25MHz GBW, 550kHz switching, Burst Mode®), minimal BOM count, and proven reliability in high-volume compute applications - making it optimal for analog-centric, high-efficiency, discrete-FET power stages where digital overhead is unnecessary.
Availability
LTC1702ACGN#TRPBF is available at Aetrix Electronics and suitable for microprocessor core supplies, FPGA I/O banks, ASIC power delivery networks, and industrial PLC logic supplies requiring stable component supply, long-lifecycle support, and consistent parametric performance across production batches.
Supply support for LTC1702ACGN#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC1702ACGN#TRPBF belongs to ADI's legacy Linear Technology Power Management product line, specifically engineered for high-efficiency, dual-phase, low-voltage DC/DC conversion in compute and communications infrastructure where precision regulation, thermal efficiency, and layout simplicity are critical.
FAQ
What is the maximum output current supported per channel by the LTC1702ACGN#TRPBF?
The LTC1702ACGN#TRPBF supports 1A to 25A per channel depending on external MOSFET selection, PCB layout, and thermal design. Its gate drivers deliver 5A peak current and 0.5Ω RON, enabling robust drive of low-Qg N-MOSFETs. In validated reference designs (e.g., DC1702A demo board), the LTC1702ACGN#TRPBF sustains 15A continuous per channel at 90% efficiency with proper heatsinking and 4×180µF output capacitance.
Does the LTC1702ACGN#TRPBF require external current sense resistors?
No, the LTC1702ACGN#TRPBF does not require external current sense resistors. It implements VDS-based current limiting by monitoring the voltage drop across the bottom N-channel MOSFET (QB) during conduction. The IMAX1 and IMAX2 pins interface with an internal 10µA current source to set the trip threshold via a single external resistor to PGND - eliminating power loss and board space associated with mΩ shunts.
How does the 180° phase interleaving in the LTC1702ACGN#TRPBF improve system performance?
The 180° phase interleaving in the LTC1702ACGN#TRPBF reduces RMS input capacitor current by approximately 48% compared to in-phase operation. This lowers power loss in CIN, permits smaller ceramic capacitors (e.g., 3×330µF instead of 6×330µF), decreases conducted EMI amplitude, and eases input filter design. In a 5V-input, 15A/channel application, interleaving cuts input ripple frequency from 550kHz to 1.1MHz, simplifying EMI suppression above the AM band.
What is the purpose of the FCB (Force Continuous Bar) pin on the LTC1702ACGN#TRPBF?
The FCB pin on the LTC1702ACGN#TRPBF forces both channels into continuous conduction mode regardless of load, disabling Burst Mode® operation. When pulled below 0.8V (typically tied to SGND), FCB overrides the automatic light-load discontinuous/Burst Mode® transition, maintaining constant 550kHz switching. This is essential for noise-sensitive applications like ADC reference supplies or RF bias rails where variable-frequency operation would inject switching artifacts.
Can the LTC1702ACGN#TRPBF be used in a single-output, higher-current configuration?
Yes, the LTC1702ACGN#TRPBF can be configured for single-output, higher-current operation by paralleling both channels with shared inductor and output capacitor - though this requires careful layout to balance current sharing. Each channel's RUN/SS and COMP pins must be tied together, and FB pins connected to the same divider. While not a true single-phase 50A solution, this configuration delivers up to ~35A with improved thermal distribution and reduced input ripple versus a single-channel controller.
LTC1702ACGN#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 7V
- Frequency - Switching:
- 550kHz
- Duty Cycle (Max):
- 90%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Power Good, Soft Start
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SSOP
LTC1702ACGN#TRPBF FAQ
1.How can I place an order for LTC1702ACGN#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1702ACGN#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1702ACGN#TRPBF reliable?
The price and inventory of LTC1702ACGN#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1702ACGN#TRPBF is usually 5 days.
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LTC1702ACGN#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1702ACGN#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1702ACGN#TRPBF?
For technical support, including LTC1702ACGN#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1702ACGN#TRPBF requirements.
6.How does Aetrix verify that LTC1702ACGN#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1702ACGN#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1702ACGN#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1702ACGN#TRPBF?
All LTC1702ACGN#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1702ACGN#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1702ACGN#TRPBF part is unused and in its original packaging.
Return procedure for LTC1702ACGN#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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