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Analog Devices Inc. LTC1740CG#PBF

Part No.:
LTC1740CG#PBF
Manufacturer:
Analog Devices Inc.
Category:
Analog to Digital Converters (ADC)
Package:
36-SSOP (0.209", 5.30mm Width)
Datasheet:
AetrixLTC1740CG#PBF.pdf
Description:
IC ADC 14BIT PIPELINED 36SSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,034

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Product details

Overview

LTC1740CG#PBF from Analog Devices (formerly Linear Technology) is a 14-bit, 6 Msps sampling analog-to-digital converter with pipelined architecture, integrated sample-and-hold, and programmable internal reference. It operates from single 5 V or dual ±5 V supplies, delivers 79 dB S/(N+D) at 2.5 MHz input, and features true differential inputs with 75 dB CMRR - used in high-speed spectral analysis and telecommunications data acquisition systems.

For engineers reviewing the LTC1740CG#PBF datasheet, LTC1740CG#PBF pinout, LTC1740CG#PBF application, or LTC1740CG#PBF equivalent, key selection criteria include its 80 MHz full-power bandwidth, ±2.5 V bipolar input range with internal 4.5 V reference, 100 ns conversion time, out-of-range indicator (OF), and 36-pin SSOP package compatibility with mixed-signal PCB layouts requiring low-jitter clocking and clean analog grounding.

Technical Context

The LTC1740CG#PBF implements a 14-bit pipelined CMOS ADC core with on-chip sample-and-hold optimized for 6 Msps continuous operation. Its differential input stage supports arbitrary common-mode voltage (including 2.5 V signal ground) and achieves 75 dB CMRR, enabling rejection of ground-loop noise in multiplexed acquisition systems.

Digital correction logic ensures no missing codes over temperature, while flexible reference programming via SENSE pin allows selection of ±2.5 V or ±1.25 V full-scale ranges using internal 4.5 V or 2.25 V references - or external reference drive up to ±VREF/1.8. Output logic uses separate OVDD supply (2.7–5.25 V) for direct interfacing to 3 V or 5 V digital systems.

Key Specifications

ParameterValue and Actual Design Meaning
Resolution14-bit with guaranteed no missing codes over 0°C to 70°C operating range
Sampling Rate6 Msps maximum - supports real-time capture of signals up to 3 MHz Nyquist bandwidth
S/(N+D)79 dB typical at 2.5 MHz input - defines usable dynamic range for baseband spectral analysis
SFDR91 dB typical at 2.5 MHz input - determines spurious-free resolution in IF sampling applications
Full-Power Bandwidth80 MHz - enables accurate digitization of fast-rising transients and wideband RF signals
INL / DNL±2.5 LSB max INL, ±1.25 LSB max DNL - ensures monotonicity and linearity critical for closed-loop control feedback
Power Dissipation245 mW typical at 6 Msps - enables thermal management in dense mixed-signal modules without forced air

Pinout & Package

Package: 36-lead plastic SSOP (0.209 inch width), RoHS-compliant, moisture-sensitive level 3. Thermal resistance θJA = 95°C/W.

Pin/TerminalCircuit RoleDesign Meaning
+AIN (1)Positive analog inputDifferential input terminal; accepts DC- or AC-coupled signals up to 80 MHz bandwidth
–AIN (2)Negative analog inputPaired with +AIN for true differential acquisition; enables 75 dB common-mode noise rejection
VCM (3)2.5 V reference outputLow-impedance (8 Ω) buffered reference for single-supply biasing of –AIN or external circuitry
SENSE (4)Reference programming controlGND → VREF = 4.5 V; tied to VREF → VREF = 2.25 V; tied to VDD → external reference mode
VREF (5)ADC reference inputSets core input span to ±VREF/1.8; bypass with ≥1 µF ceramic capacitor for stability
GND (6,7,10,31,34)Analog power groundMust connect to dedicated analog ground plane; separates analog return paths from digital noise
VDD (8,9,32,33)+5 V analog supplyFour independent pins require individual 1–10 µF ceramic decoupling; avoid shared capacitors
OGND (11,28)Output logic groundConnects to system digital ground at single point near Pin 28 to prevent ground loops
D13–D0 (12–18,20–26)Parallel digital outputs14-bit two's complement format; MSB = D13, LSB = D0; timing referenced to BUSY or CLK edges
CLK (35)Conversion start clockRising-edge triggered; supports 50 kHz–6 MHz frequency; <5 ns rise time recommended for optimal SNR
BUSY (27)Conversion status indicatorActive-low during conversion; rising edge indicates data valid after 3-cycle pipeline latency
OF (36)Overflow flagHigh when output code equals 01111111111111 or 10000000000000 - signals input beyond ±FS range
VSS (29,30)Negative supplyAccepts –5 V (dual supply) or 0 V (single supply); bypass with 1 µF ceramic if not shorted to GND
OVDD (19)Output logic supply2.7–5.25 V supply for digital drivers; enables direct interface to 3 V or 5 V FPGA/microcontroller I/O

Key Features

FeatureDesign Value
Programmable reference architectureSelects ±2.5 V or ±1.25 V full-scale input range via SENSE pin configuration - eliminates external resistor networks
True differential input with 75 dB CMRRRejects common-mode noise from long cables or noisy environments - enables direct sensor interfacing without instrumentation amps
Separate OVDD supply (2.7–5.25 V)Allows native interfacing to 3 V logic families without level shifters - reduces BOM count and signal integrity risk
Out-of-range (OF) indicatorDedicated overflow flag simplifies real-time clipping detection in streaming data pipelines - avoids software-based range checking overhead
Internal timer for dynamic logic refreshEnables clock gating during idle periods without power-up penalty - reduces average power in burst-mode acquisition

Applications

Telecommunications Baseband SamplingMultiplexed Data Acquisition Systems

Use Scenario: Digitizing multiple RF channel IF outputs in a cellular base station receiver using time-division multiplexing.

IC Role / Device Role / Timing Role: High-speed ADC capturing 6 Msps per channel with precise timing alignment across channels via synchronized CLK.

Use Value: 91 dB SFDR prevents intermodulation distortion from masking adjacent weak signals in crowded spectrum environments.

Use Scenario: Simultaneous voltage/current monitoring across 16 industrial sensors in a PLC backplane with shared clock and serial control bus.

IC Role / Device Role / Timing Role: Standalone ADC per sensor node; BUSY signal triggers microcontroller read cycle; OF flag enables per-channel fault reporting.

Use Value: ±2.5 V input range with 2.5 V VCM output simplifies single-supply sensor front-end design and eliminates level-shifting components.

High-Speed Spectral AnalysisImaging System Digitization

Use Scenario: Real-time 4096-point FFT processing of ultrasound echo waveforms in portable medical imaging equipment.

IC Role / Device Role / Timing Role: ADC feeding FPGA-based FFT engine; 80 MHz full-power bandwidth preserves transient fidelity of short-duration pulses.

Use Value: 79 dB S/(N+D) ensures sufficient SNR for detecting low-amplitude tissue reflections amid electronic noise floor.

Use Scenario: Converting analog video output from CCD/CMOS line-scan sensors in industrial machine vision inspection systems.

IC Role / Device Role / Timing Role: Pixel-rate digitizer synchronized to line-clock; parallel D[13:0] outputs feed frame buffer memory with minimal latency.

Use Value: 100 ns conversion time and 3-cycle pipeline enable deterministic timing for pixel-accurate triggering and exposure control.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
AD9240ASTZ-6514-bit, 65 MSPS; higher speed but higher power (1.2 W); LVDS outputs; requires external referenceBetter suited for wideband IF sampling >10 MHz; not drop-in due to different pinout, supply, and interfaceSelect when system requires >10 MSPS throughput and can accommodate higher power and LVDS routing complexity
MAX1186ETM+14-bit, 6 MSPS; single 3.3 V supply only; internal reference fixed at 2.048 V; smaller 32-pin TQFP packageOptimized for low-voltage embedded systems; lacks ±5 V dual-supply flexibility and VCM outputSelect for space-constrained 3.3 V designs where ±5 V rails and 2.5 V bias generation are unavailable

Compared with AD9240ASTZ-65 and MAX1186ETM+, the LTC1740CG#PBF uniquely balances 6 Msps performance with dual-supply flexibility, integrated 2.5 V VCM reference, and true differential input - making it optimal for cost-sensitive, mixed-voltage test equipment and telecom line-card designs where layout simplicity and supply versatility are critical.

Availability

LTC1740CG#PBF is available at Aetrix Electronics and suitable for telecommunications infrastructure, industrial data acquisition, and medical imaging systems requiring stable component supply across extended production lifecycles.

Supply support for LTC1740CG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The LTC1740CG#PBF belongs to ADI's legacy Linear Technology precision high-speed ADC product line, designed specifically for applications demanding excellent AC performance, flexible input configuration, and robust operation in both single- and dual-supply environments.

FAQ

What is the operating temperature range for the LTC1740CG#PBF?

The LTC1740CG#PBF is specified for commercial-grade operation from 0°C to +70°C ambient temperature. This range is confirmed by the "C" suffix in the part number and aligns with the Absolute Maximum Ratings table showing TJMAX = 125°C and θJA = 95°C/W. The device maintains full performance specifications - including INL, DNL, S/(N+D), and SFDR - across this entire range without derating.

Does the LTC1740CG#PBF support single-supply operation with a 5 V rail only?

Yes, the LTC1740CG#PBF fully supports single-supply operation with only a +5 V (VDD) rail and VSS tied to ground. In this configuration, the internal 2.5 V VCM reference provides the required common-mode bias for the differential input, and the SENSE pin can be grounded to select the 4.5 V internal reference for ±2.5 V full-scale input range. All DC and AC specifications remain guaranteed per the datasheet.

How does the SENSE pin configure the reference voltage on the LTC1740CG#PBF?

The SENSE pin on the LTC1740CG#PBF selects the internal reference mode: grounding SENSE sets VREF = 4.500 V (±2.5 V input range); tying SENSE to VREF sets VREF = 2.250 V (±1.25 V input range); connecting SENSE to VDD disables the internal reference amplifier, allowing external voltage drive at VREF. This configuration is implemented via internal resistor dividers and op-amp feedback paths as shown in Figure 2 of the datasheet.

What is the purpose of the OF (overflow) pin on the LTC1740CG#PBF?

The OF pin on the LTC1740CG#PBF is a dedicated hardware flag that goes high when the analog input exceeds the selected full-scale range - specifically when the digital output equals 01111111111111 (positive overflow) or 10000000000000 (negative overflow). This enables immediate, cycle-accurate detection of clipping without requiring software interpretation of the MSB or comparison logic, critical for real-time signal integrity monitoring.

Can the LTC1740CG#PBF interface directly to a 3 V FPGA without level shifters?

Yes, the LTC1740CG#PBF can interface directly to a 3 V FPGA because its digital output drivers use a separate OVDD supply pin (Pin 19) that accepts 2.7 V to 5.25 V. Setting OVDD = 3.0 V configures all D[13:0] and OF outputs to meet 3 V logic thresholds (VOH ≥ 2.3 V, VOL ≤ 0.4 V), eliminating the need for external level-shifting circuitry while maintaining timing integrity and noise immunity.

LTC1740CG#PBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
36-SSOP (0.209", 5.30mm Width)
Packaging:
Tube
Product Status:
Active
Number of Bits:
14
Sampling Rate (Per Second):
6M
Number of Inputs:
1
Input Type:
Differential, Single Ended
Data Interface:
Parallel
Configuration:
S/H-ADC
Ratio - S/H:ADC:
1:1
Number of A/D Converters:
1
Architecture:
Pipelined
Reference Type:
External, Internal
Voltage - Supply, Analog:
±5V, 5V
Voltage - Supply, Digital:
-
Features:
-
Operating Temperature:
0°C ~ 70°C
Supplier Device Package:
36-SSOP
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

LTC1740CG#PBF FAQ

1.How can I place an order for LTC1740CG#PBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC1740CG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC1740CG#PBF reliable?

The price and inventory of LTC1740CG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1740CG#PBF is usually 5 days.

3.What payment methods are accepted for LTC1740CG#PBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1740CG#PBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC1740CG#PBF?

LTC1740CG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC1740CG#PBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC1740CG#PBF?

For technical support, including LTC1740CG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1740CG#PBF requirements.

6.How does Aetrix verify that LTC1740CG#PBF is sourced from the original manufacturer or authorized distributors?

All LTC1740CG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1740CG#PBF meets industry standards.

7.What is the process for return or replacement of LTC1740CG#PBF?

All LTC1740CG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1740CG#PBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC1740CG#PBF part is unused and in its original packaging.

Return procedure for LTC1740CG#PBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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