Analog Devices Inc. LTC1753CSW#PBF

Overview

LTC1753CSW#PBF from Analog Devices (formerly Linear Technology) is a 5-bit digitally programmable synchronous buck controller optimized for high-power Pentium® III and AMD-K6®-2 microprocessor core supplies, converting 5V input to precisely adjustable 1.3V–3.5V output with ±1.5% initial accuracy and ±2% typical accuracy over line, load, and temperature. It integrates dual N-channel MOSFET gate drivers, internal 5-bit DAC, phase-lead compensation, and current sensing via Q1's R_DS(ON), eliminating external sense resistors. Designed for CPU VRM 8.4-compliant power delivery up to 19A.

For engineers reviewing the LTC1753CSW#PBF datasheet, LTC1753CSW#PBF pinout, LTC1753CSW#PBF application, or LTC1753CSW#PBF equivalent, key selection considerations include its 20-lead SOIC-W (SW) package, VID0–VID4 digital voltage programming interface, synchronous dual-N FET drive architecture, adjustable current limit without external sense resistors, and integrated overtemperature protection with OUTEN thermistor interface.

Technical Context

The LTC1753CSW#PBF implements a voltage-mode PWM control architecture with an internal 5-bit DAC that sets output voltage in 50mV steps from 1.3V to 2.05V and 100mV steps from 2.1V to 3.5V per VRM 8.4 specification. Its error amplifier features 40–54dB open-loop DC gain and 0.9–2.3 millimho transconductance, compensated externally at the COMP pin using an RC+C network for stable transient response.

It employs dual independent gate drivers (G1, G2) with 90–150ns rise/fall times and 30–100ns nonoverlap timing, supporting external N-channel upper/lower FETs. Current limiting is achieved by comparing IFB (switching node voltage) against IMAX (internally pulled down with 190µA), enabling adaptive duty-cycle reduction during overload without external sensing components.

Key Specifications

Pinout & Package

The LTC1753CSW#PBF is housed in a 20-lead plastic SOIC-W (SW) package with exposed pad for thermal enhancement. Pin assignments are fully defined per Linear Technology's 1753fa datasheet Figure 1 (top view).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck controller applications.

Compared with LTC1753CSW#PBF, LTC1754CSW#PBF offers tighter regulation and updated VRM support but requires firmware revision, while TPS51100PWR reduces component count via integrated LDO yet sacrifices current-sensing integration and remote-sensing capability-making LTC1753CSW#PBF optimal for legacy VRM 8.4 CPU core supplies demanding precision, efficiency, and minimal BOM.

Availability

LTC1753CSW#PBF is available at Aetrix Electronics and suitable for desktop motherboard design, workstation power subsystems, and embedded PA-RISC platforms requiring stable component supply with full lifecycle traceability and long-term obsolescence planning.

Supply support for LTC1753CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and computing markets.

The LTC1753CSW#PBF belongs to Linear's high-efficiency power controller product line, engineered specifically for VRM-compliant microprocessor core supplies where precision, transient response, and thermal resilience are critical.

FAQ

What is the maximum output current supported by the LTC1753CSW#PBF in a typical application?

The LTC1753CSW#PBF is rated for up to 19A output current from a 5V input, validated in reference designs using dual parallel Si4410 or SUD50N03-10 MOSFETs with appropriate thermal management. Actual achievable current depends on PCB copper area, airflow, and external FET selection-e.g., 14A is demonstrated with single SUD50N03-10 per phase in the typical application circuit.

How does the LTC1753CSW#PBF implement current limiting without an external sense resistor?

The LTC1753CSW#PBF senses output current by monitoring the voltage drop across the R_DS(ON) of the upper N-channel MOSFET (Q1) via the IFB pin. An internal 190µA current sink at the IMAX pin sets the trip threshold. When IFB falls below IMAX during Q1 conduction, the current comparator discharges the soft-start capacitor to reduce duty cycle-eliminating the need for a discrete sense resistor and associated power loss.

Can the LTC1753CSW#PBF be synchronized to an external clock, and how is this accomplished?

Yes, the LTC1753CSW#PBF can be synchronized to an external clock faster than its 300kHz free-running frequency. This is accomplished by applying the external clock signal directly to the OUTEN pin, which overrides the internal oscillator. The datasheet confirms this capability in the Applications Information section and specifies timing requirements for clean edge triggering to avoid metastability.

What is the purpose of the SENSE and VFB pins, and how do they differ in function?

The SENSE pin connects directly to the positive output capacitor terminal and serves as the primary feedback node for the main regulation loop; it feeds an internal 108kΩ resistor divider to generate the VFB signal. The VFB pin is the tap point of that divider and is used for feedforward compensation-adding a small capacitor between SENSE and VFB reduces transient recovery time in high-dV/dt load scenarios, while leaving VFB floating is permissible if not needed.

Does the LTC1753CSW#PBF support thermal monitoring, and if so, how is it implemented?

Yes, the LTC1753CSW#PBF supports thermal monitoring via the OUTEN pin, which features two internal thresholds: at ~1.7V, G1 and G2 drivers are forced low to halt switching and reduce MOSFET heating; at ~1.2V, the device enters full shutdown with <250µA quiescent current. An external NTC thermistor forms a voltage divider with a pull-up resistor to VCC, allowing direct temperature-to-voltage conversion at the OUTEN input.