Analog Devices Inc. LTC1851IFW#TRPBF
- Part No.:
- LTC1851IFW#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
LTC1851IFW#TRPBF.pdf
- Description:
- IC ADC 12BIT SAR 48TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,402
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Product details
Overview
LTC1851IFW#TRPBF from Analog Devices (formerly Linear Technology) is a 12-bit, 1.25 Msps parallel-output ADC with integrated 8-channel multiplexer, internal 2.5V reference, reference buffer, and programmable sequencer. It supports single-ended/differential inputs, dual gain ranges (1×/2×), unipolar/bipolar operation, and operates from a single 5V supply with 40mW typical power dissipation. It is used in high-speed industrial data acquisition systems requiring channel sequencing and noise-immune analog front-ends.
For engineers reviewing the LTC1851IFW#TRPBF datasheet, LTC1851IFW#TRPBF pinout, LTC1851IFW#TRPBF application, or LTC1851IFW#TRPBF equivalent, key selection criteria include 12-bit resolution at 1.25 Msps, true differential input rejection, on-chip reference flexibility (4.096V/2.5V/2.048V), 48-pin TSSOP package compatibility, and support for programmable scan sequences up to 16 addresses.
Technical Context
The LTC1851IFW#TRPBF implements a capacitive successive approximation register (SAR) architecture with integrated sample-and-hold, enabling precise conversion of fast-changing analog signals across eight configurable channels. Its programmable sequencer stores up to 16 MUX address/configurations-including DIFF, UNI/BIP, PGA, and end-of-sequence bits-for autonomous scanning without host intervention.
It features a dual-supply interface: VDD powers analog and core logic (4.75–5.25V), while OVDD independently powers digital outputs (2.7–5.25V), enabling direct interfacing with 3V logic. The internal reference buffer drives REFCOMP with 4.096V (±0.1%) when REFIN = 2.5V, and supports external reference injection via REFIN tied to VDD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes; guarantees monotonic transfer function for precision measurement applications. |
| Sampling Rate | 1.25 Msps maximum; enables real-time capture of signals up to 625 kHz (Nyquist) with minimal aliasing. |
| INL / DNL | ±0.35 LSB / ±0.25 LSB typical; ensures high code-to-code accuracy critical for calibration-sensitive instrumentation. |
| SNR / SFDR | 72 dB / 88 dB at 47 kHz input; delivers clean digitization for spectral analysis and communications test equipment. |
| Reference Output | REFOUT = 2.50 V ±20 mV; provides stable, low-drift internal reference for self-contained system design. |
| Power Dissipation | 40 mW at 1.25 Msps (VDD = 5V); supports thermally constrained embedded DAQ modules without forced cooling. |
| Operating Temp | –40°C to +85°C; qualified for industrial environments including factory automation and motor control cabinets. |
Pinout & Package
Package: 48-lead plastic TSSOP (FW package), 7.0 mm × 12.5 mm body, 0.5 mm pitch, exposed pad not electrically connected. RoHS-compliant, lead-free, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH0–CH7 (1–8) | Analog Input Channels | Configurable as single-ended vs. differential pairs (CH0/CH1, etc.); COM pin defines common-mode reference point. |
| REFCOMP (12) | Reference Buffer Output | Sets full-scale input span (e.g., 4.096V); bypassed with 10 µF tantalum + 0.1 µF ceramic for stability. |
| D11–D0 (21,22,23,24–32) | Parallel Data Outputs | 12-bit conversion result + 4-bit MUX address; driven from OVDD/OGND rails for 3V/5V logic compatibility. |
| CONVST (45) | Conversion Start | Falling-edge triggered; initiates SAR cycle; timing-critical for deterministic latency (tCONV = 650 ns). |
| BUSY (33) | Conversion Status Flag | Active-low open-drain output; rising edge indicates data validity and enables latch synchronization. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Sequencer | Stores 16 independent channel configurations (address, gain, polarity, differential mode) for autonomous multi-channel scanning. |
| True Differential Inputs | Rejects >60 dB common-mode noise up to 1 MHz; enables robust signal acquisition in noisy industrial settings. |
| Flexible Reference System | Internal 2.5V reference + buffer yields 4.096V on REFCOMP; also accepts external references via REFIN/REFCOMP pins. |
| Low-Power Shutdown Modes | Nap mode draws 1 mA; Sleep mode draws 50 µA-enables energy-efficient battery-backed data loggers. |
| Channel-to-Channel Isolation | ≥90 dB at 100 kHz (worst pair, bipolar mode, PGA=1); prevents crosstalk in simultaneous sampling applications. |
Applications
| Industrial Process Monitoring | Test & Measurement Equipment |
|---|---|
Use Scenario: Continuous monitoring of temperature, pressure, and flow sensor outputs across 8 PLC I/O modules. IC Role / Device Role / Timing Role: 12-bit ADC with programmable sequencer acquires synchronized samples from all 8 channels at 1.25 Msps, feeding FPGA-based real-time analytics. Use Value: Eliminates need for external MUX and reference ICs, reducing BOM count and layout area by 30% versus discrete solutions. | Use Scenario: Digitizing RF baseband signals in handheld spectrum analyzers with variable gain and DC offset correction. IC Role / Device Role / Timing Role: ADC captures bipolar ±2.048V inputs at 1.25 Msps with 72 dB SNR, supporting FFT-based frequency-domain analysis. Use Value: Internal PGA and reference buffer enable automatic range scaling and calibration without external op-amps or DACs. |
| Imaging Systems | Telecommunications Base Stations |
Use Scenario: Reading pixel voltage outputs from linear CCD arrays in industrial machine vision cameras. IC Role / Device Role / Timing Role: High-speed 12-bit conversion with <150 ns acquisition time ensures accurate sampling of fast-ramping CCD outputs. Use Value: Differential input mode rejects clock feedthrough and EMI from adjacent digital circuitry, preserving image SNR. | Use Scenario: Monitoring analog control voltages (VCO tuning, PA bias, temperature compensation) in LTE macrocell RF front-ends. IC Role / Device Role / Timing Role: ADC performs periodic health checks on 8 analog control lines using internal sequencer, minimizing host processor overhead. Use Value: Integrated reference and shutdown modes reduce standby current to 50 µA, extending uptime in remote cell sites. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit, multi-channel ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7490BRUZ | 12-bit, 1 MSPS, 16-channel SAR ADC; no internal reference; requires external REF; SPI interface only. | Requires external reference and serial interface logic; lacks parallel output and built-in sequencer. | Select when board space is constrained and SPI interface is preferred over parallel bus timing. |
| MAX11617EEE+ | 12-bit, 250 kSPS, 8-channel SAR ADC; internal 2.048V reference; I²C interface; lower speed and no differential input support. | Not suitable for >500 kSPS applications; lacks true differential inputs and programmable gain amplifier. | Select for low-power, cost-sensitive sensor nodes where 250 kSPS and I²C simplicity outweigh performance needs. |
Compared with AD7490BRUZ and MAX11617EEE+, the LTC1851IFW#TRPBF uniquely combines 1.25 Msps parallel output, on-chip 4.096V reference, true differential inputs, and autonomous 16-step sequencer-enabling faster, simpler, and more noise-immune data acquisition without external support components.
Availability
LTC1851IFW#TRPBF is available at Aetrix Electronics and suitable for industrial process control, test & measurement instrumentation, and telecommunications infrastructure requiring stable component supply, extended temperature operation (–40°C to +85°C), and long-term obsolescence management.
Supply support for LTC1851IFW#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC1851IFW#TRPBF belongs to ADI's legacy Linear Technology precision data acquisition product line, designed specifically for high-speed, multi-channel industrial DAQ systems demanding integrated signal conditioning, flexible configuration, and robust noise immunity.
FAQ
What is the maximum sampling rate supported by the LTC1851IFW#TRPBF?
The LTC1851IFW#TRPBF supports a maximum sampling rate of 1.25 Msps, with guaranteed conversion time of 650 ns and acquisition time of 150 ns. This allows full 12-bit resolution sampling of signals up to 625 kHz (Nyquist frequency) while maintaining specified INL, DNL, and dynamic performance metrics per the datasheet.
Does the LTC1851IFW#TRPBF include an internal voltage reference?
Yes, the LTC1851IFW#TRPBF integrates a 2.5V bandgap reference and a precision reference buffer amplifier. When REFIN is set to 2.5V, the REFCOMP pin outputs 4.096V (1.6384 × 2.5V) with ±0.1% initial accuracy and ±15 ppm/°C temperature coefficient-enabling self-contained, high-accuracy system design without external references.
How does the programmable sequencer in the LTC1851IFW#TRPBF operate?
The LTC1851IFW#TRPBF's sequencer stores up to 16 independent channel configurations-including MUX address (A2:A0), differential/single-ended mode (DIFF), unipolar/bipolar selection (UNI/BIP), gain setting (PGA), and end-of-sequence flag (S0). Once loaded, it autonomously cycles through entries on each CONVST trigger, eliminating host CPU polling overhead in multi-channel DAQ systems.
Can the LTC1851IFW#TRPBF interface directly with 3V logic systems?
Yes, the LTC1851IFW#TRPBF supports dual-supply digital I/O: OVDD can be independently set from 2.7V to 5.25V, allowing its parallel outputs (D11–D0, A2OUT–A0OUT, DIFFOUT) to swing between OGND and OVDD. With OVDD = 3.3V, it interfaces directly with 3V CMOS logic without level shifters or pull-up resistors.
What are the power-down modes available on the LTC1851IFW#TRPBF?
The LTC1851IFW#TRPBF offers two hardware-controlled power-down modes: Nap mode (SHDN = 0V, CS = 0V) draws 1 mA and retains sequencer memory; Sleep mode (SHDN = 0V, CS = 5V) draws only 50 µA but requires reinitialization upon wake-up. Both modes reduce power dissipation to ≤5 mW and ≤0.25 mW respectively, supporting energy-efficient portable DAQ designs.
LTC1851IFW#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 48-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 1.25M
- Number of Inputs:
- 8
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- Selectable Address
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1851IFW#TRPBF FAQ
1.How can I place an order for LTC1851IFW#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1851IFW#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1851IFW#TRPBF reliable?
The price and inventory of LTC1851IFW#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1851IFW#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC1851IFW#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1851IFW#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1851IFW#TRPBF?
LTC1851IFW#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1851IFW#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1851IFW#TRPBF?
For technical support, including LTC1851IFW#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1851IFW#TRPBF requirements.
6.How does Aetrix verify that LTC1851IFW#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1851IFW#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1851IFW#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1851IFW#TRPBF?
All LTC1851IFW#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1851IFW#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1851IFW#TRPBF part is unused and in its original packaging.
Return procedure for LTC1851IFW#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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