Analog Devices Inc. LTC1852IFW#PBF
- Part No.:
- LTC1852IFW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
LTC1852IFW#PBF.pdf
- Description:
- IC ADC 10BIT SAR 48TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1852IFW#PBF from Analog Devices (formerly Linear Technology) is a 10-bit, 8-channel, 400ksps successive-approximation ADC with integrated multiplexer, internal 2.5V reference, parallel output interface, and programmable sequencer. It supports single-ended/differential inputs, unipolar/bipolar operation, dual gain ranges (1×/2×), and operates from 2.7V to 5.5V analog supply. Used in industrial process control for multi-sensor voltage monitoring with scan-mode automation.
For engineers reviewing the LTC1852IFW#PBF datasheet, LTC1852IFW#PBF pinout, LTC1852IFW#PBF application, or LTC1852IFW#PBF equivalent, key selection criteria include 10-bit resolution at 400ksps, ±0.25 LSB integral linearity over –40°C to +85°C, flexible 8-channel MUX configuration, parallel 14-bit output (10-bit data + 4-bit address), and low-power Nap/Sleep shutdown modes.
Technical Context
The LTC1852IFW#PBF implements a capacitive successive-approximation architecture with integrated sample-and-hold, supporting acquisition times as low as 150ns and conversion time of 2.0μs at 5.5V. Its programmable sequencer stores up to 16 channel configurations-including DIFF, UNI/BIP, PGA, and address-enabling autonomous scan mode without host software overhead.
Reference flexibility is achieved via REFIN pin control: grounding REFIN yields 2.048V on REFCOMP; applying 2.5V yields 4.096V (1.6384× gain); tying to VDD disables the buffer for external reference drive. Digital I/O uses separate OVDD (2.7V–5.5V) for 3V/5V logic compatibility, with three-state outputs controlled by RD and CS.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit with no missing codes - guarantees monotonic transfer function for precision control feedback loops. |
| Max Sampling Rate | 400ksps at VDD = 5.5V - enables real-time capture of signals up to 200kHz Nyquist bandwidth. |
| Integral Linearity Error | ±0.25 LSB (min), ±1 LSB (max) over –40°C to +85°C - ensures <0.1% full-scale error in closed-loop sensor systems. |
| Analog Supply Range | 2.7V to 5.5V - allows direct integration into mixed-voltage industrial PCBs without level-shifting. |
| Power Consumption | 10mW at 400ksps / 5V; 3mW at 250ksps / 3V - supports battery-backed or energy-constrained edge nodes. |
| Reference Options | Internal 2.5V (REFOUT), pin-strappable 4.096V/2.048V via REFIN, or external reference on REFCOMP - simplifies calibration and eliminates external ref ICs. |
| Digital I/O Supply | Separate OVDD (2.7V–5.5V) - enables native interfacing to 3V microcontrollers without bus buffers. |
Pinout & Package
48-lead plastic TSSOP (6.1mm wide), RoHS-compliant, rated for –40°C to +85°C ambient operation. Pin 1 marked via laser top-side marking; exposed pad not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH0–CH7 (1–8) | Analog Input Channels | Configurable as 8 single-ended (vs. COM) or 4 differential pairs; COM disabled when DIFF = high. |
| COM (9) | Analog Input Common | Reference node for single-ended mode; must be grounded in differential mode to prevent noise coupling. |
| REFOUT (10) | 2.5V Reference Output | Stable 2.5V source (±15 ppm/°C TC); requires 1μF ceramic bypass to AGND for low-noise operation. |
| REFCOMP (12) | Reference Buffer Output | Sets full-scale input span (e.g., ±2.048V bipolar); driven internally or externally; bypass with 10μF + 0.1μF. |
| D9–D0 (21–30) | Parallel Data Outputs | 10-bit conversion result + 4-bit MUX address (S2–S0 + DIFF); three-state, active-low RD controlled. |
| CONVST (45) | Conversion Start | Falling-edge triggered; initiates SAR cycle; must remain low ≥50ns; timing-critical for jitter-sensitive apps. |
| SHDN (47) | Shutdown Control | Active-low; CS state determines Nap (CS low) or Sleep (CS high) mode - reduces current to 20μA (Sleep). |
Key Features
| Feature | Design Value |
|---|---|
| Programmable 16-step sequencer | Stores MUX address, DIFF, UNI/BIP, and PGA per step - eliminates CPU polling and enables deterministic multi-channel acquisition. |
| Flexible input configuration | Single-ended/differential, unipolar/bipolar, gain=1/gain=2 selectable per channel - supports diverse sensor types (RTDs, strain gauges, thermocouples) on one device. |
| Parallel 14-bit output interface | Includes 10-bit data + 4-bit address bits (S2–S0 + DIFF) - enables immediate channel identification without software address tracking. |
| Low-power Nap/Sleep modes | Nap mode draws 0.5mA; Sleep mode draws 20μA - extends runtime in portable test equipment and remote sensors. |
| Internal reference with strappable ranges | 2.048V, 2.5V, or 4.096V via REFIN pin - removes need for external precision references and simplifies BOM. |
Applications
| Industrial Process Monitoring | Automated Test Equipment (ATE) |
|---|---|
|
Use Scenario: Continuous voltage sampling across 8 temperature/pressure transducer outputs in a PLC rack. IC Role / Device Role / Timing Role: 10-bit ADC with auto-sequencing scans all channels every 2.5ms; BUSY signal synchronizes FPGA readback. Use Value: Eliminates 8 discrete ADCs and associated mux logic, reducing board area by >40% and firmware complexity. |
Use Scenario: High-speed parametric testing of analog ICs using multi-point DC and AC stimulus/response capture. IC Role / Device Role / Timing Role: Configured in differential mode with PGA=2 to resolve µV-level offsets; 400ksps rate captures transient settling behavior. Use Value: Achieves ±0.25 LSB INL at full temperature range - meets Class I metrology requirements without system calibration. |
| Portable Data Loggers | Motor Drive Current Sensing |
|
Use Scenario: Battery-powered environmental logger recording thermistor, humidity, and light sensor outputs over 72-hour cycles. IC Role / Device Role / Timing Role: Operates from 3V supply; Sleep mode reduces quiescent current to 20μA between 10s-interval conversions. Use Value: Enables >1-year battery life on two AA cells while maintaining 10-bit resolution and channel flexibility. |
Use Scenario: Real-time phase current sampling in 3-phase inverter for field-oriented control (FOC) algorithms. IC Role / Device Role / Timing Role: Uses unipolar mode with 4.096V reference to digitize ±50mV shunt voltage; 150ns acquisition time supports 20kHz PWM switching. Use Value: Delivers <100ns aperture jitter - critical for accurate current reconstruction and torque ripple minimization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 10-bit multichannel ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7923BRUZ | 4-channel, SPI interface, 1MSPS, no internal reference - requires external REF and level-shifting for 3V logic. | Better speed but fewer channels; lacks sequencer and flexible MUX - demands more MCU intervention per sample. | Choose AD7923BRUZ when higher throughput (>400ksps) and smaller footprint are prioritized over channel count and autonomy. |
| LTC1850CFW#PBF | Pin-compatible 10-bit upgrade with 1.25Msps, same package and pinout - but only rated for 0°C to 70°C commercial temp range. | Same feature set and register map; differs only in max sampling rate and temperature grade - drop-in replacement if ambient ≤70°C. | Choose LTC1850CFW#PBF only for cost-sensitive commercial designs where extended temperature operation is unnecessary. |
Compared with AD7923BRUZ, LTC1852IFW#PBF provides 2× more channels and autonomous sequencing at lower power; compared with LTC1850CFW#PBF, it trades 825ksps speed for guaranteed –40°C to +85°C operation - making it the sole choice for ruggedized industrial deployments.
Availability
LTC1852IFW#PBF is available at Aetrix Electronics and suitable for industrial process control, automated test equipment, portable data loggers, and motor drive current sensing requiring stable component supply across extended temperature environments.
Supply support for LTC1852IFW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC1852IFW#PBF belongs to Linear's precision data acquisition product line, designed specifically for industrial and instrumentation applications demanding accuracy, flexibility, and robustness across wide temperature ranges.
FAQ
What is the operating temperature range of the LTC1852IFW#PBF?
The LTC1852IFW#PBF is specified for –40°C to +85°C ambient operation, validated across all electrical parameters including ±0.25 LSB integral linearity and 400ksps sampling rate. This industrial-grade rating makes LTC1852IFW#PBF suitable for deployment in harsh environments such as factory floors, outdoor metering, and transportation control systems without derating.
Does the LTC1852IFW#PBF require an external reference?
No - the LTC1852IFW#PBF integrates a 2.5V reference (REFOUT) and reference buffer that generates 2.048V or 4.096V on REFCOMP depending on REFIN pin state. External reference is optional and only needed when higher initial accuracy or lower drift than the internal buffer provides is required.
How does the programmable sequencer in the LTC1852IFW#PBF reduce firmware overhead?
The LTC1852IFW#PBF sequencer stores up to 16 channel configurations (address, DIFF, UNI/BIP, PGA) in internal memory. Once programmed, it autonomously cycles through them in scan mode - eliminating the need for MCU-driven GPIO toggling, register writes, or timing-critical polling, thereby freeing CPU cycles for higher-layer tasks.
Can the LTC1852IFW#PBF interface directly with a 3V microcontroller?
Yes - the LTC1852IFW#PBF uses separate OVDD (digital I/O supply) and OGND pins, allowing OVDD to be tied to 3V while VDD remains at 5V. All digital outputs (D9–D0, A2OUT–A0OUT, DIFFOUT) swing rail-to-rail between OVDD and OGND, ensuring TTL/CMOS-compatible levels without level shifters.
What is the purpose of the BUSY pin on the LTC1852IFW#PBF?
The BUSY pin on the LTC1852IFW#PBF serves two functions: (1) it goes low at CONVST falling edge and returns high upon conversion completion - enabling precise hardware-triggered data latching; (2) it asserts low during Program/Readback mode (M1 high, M0 low) to indicate sequencer memory access - providing status visibility for debug and synchronization.
LTC1852IFW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 48-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 400k
- Number of Inputs:
- 8
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 5.5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- PGA, Selectable Address
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1852IFW#PBF FAQ
1.How can I place an order for LTC1852IFW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1852IFW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1852IFW#PBF reliable?
The price and inventory of LTC1852IFW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1852IFW#PBF is usually 5 days.
3.What payment methods are accepted for LTC1852IFW#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1852IFW#PBF transactions.
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4.How is shipping managed for LTC1852IFW#PBF?
LTC1852IFW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1852IFW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1852IFW#PBF?
For technical support, including LTC1852IFW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1852IFW#PBF requirements.
6.How does Aetrix verify that LTC1852IFW#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1852IFW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1852IFW#PBF meets industry standards.
7.What is the process for return or replacement of LTC1852IFW#PBF?
All LTC1852IFW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1852IFW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1852IFW#PBF part is unused and in its original packaging.
Return procedure for LTC1852IFW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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