Analog Devices Inc. LTC1861HMS#PBF

Overview

LTC1861HMS#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 250ksps, 2-channel software-selectable multiplexed successive approximation ADC in a 10-lead MSOP package, operating on a single 5V supply with 850µA typical supply current and auto-shutdown to 1nA between conversions. It features SPI/MICROWIRE-compatible serial I/O, adjustable reference input, and guaranteed operation from –40°C to 125°C for high-reliability industrial data acquisition.

For engineers reviewing the LTC1861HMS#PBF datasheet, LTC1861HMS#PBF pinout, LTC1861HMS#PBF application, or LTC1861HMS#PBF equivalent, key selection criteria include its H-grade temperature range, dual-channel MUX configuration via SDI, differential or single-ended analog input modes, low-power shutdown behavior, and compatibility with external references down to 1V full-scale.

Technical Context

The LTC1861HMS#PBF implements a switched-capacitor SAR architecture with integrated sample-and-hold, supporting true differential or single-ended measurements across two analog inputs (CH0/CH1) selected by a 2-bit configuration word clocked into SDI. Its conversion timing is fixed at 2.75–3.3µs (H-grade), synchronized by CONV rising edge and data readout on SCK falling edges.

It uses separate AGND and DGND pins for analog/digital isolation, requires external bypassing of VCC and VREF with ≥1µF tantalum capacitors, and supports ratiometric operation or external reference voltages from 1V to VCC - with VREF tied internally to VCC only in SO-8 variants, not in this MSOP version.

Key Specifications

Pinout & Package

Package: 10-lead plastic MSOP (MS package), 3.0mm × 3.0mm body, 0.5mm lead pitch, JEDEC MO-187 variant, rated for 150°C junction temperature and θ_JA = 210°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit, 2-channel, serial-output ADC applications.

Compared with LTC1865CMS#PBF, the LTC1861HMS#PBF trades 4-bit resolution for 75% lower active current and simpler firmware (no 16-bit alignment handling); versus ADS7822U, it integrates MUX functionality and supports extended temperature operation without external components.

Availability

LTC1861HMS#PBF is available at Aetrix Electronics and suitable for industrial motor monitoring, automotive battery management, portable medical instrumentation, and isolated industrial data loggers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LTC1861HMS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its precision analog product lines with focus on high-performance signal conditioning and data conversion ICs.

The LTC1861HMS#PBF belongs to Linear's µPower SAR ADC family, designed specifically for compact, low-power, high-speed systems where thermal management, PCB area, and battery life are critical constraints.

FAQ

What is the maximum clock frequency supported by the LTC1861HMS#PBF for reliable operation?

The LTC1861HMS#PBF supports a maximum SCK frequency of 20MHz under H-grade conditions (–40°C to 125°C). This allows full 12-bit data transfer in under 1µs per conversion cycle. Operation above this limit risks setup/hold violations on SDI and SDO, especially at temperature extremes. Always verify timing margins using the recommended t_suDI, t_thDI, and t_tdDO values from the datasheet when designing with the LTC1861HMS#PBF.

Does the LTC1861HMS#PBF require an external reference voltage, or can it operate with VCC as reference?

The LTC1861HMS#PBF requires an external reference voltage applied to the VREF pin and cannot internally tie VREF to VCC - unlike the SO-8 version of the LTC1861. The MSOP variant supports reference voltages from 1V to VCC (5V), enabling flexible scaling for low-voltage sensors. Using VCC directly as reference is not supported for the LTC1861HMS#PBF and would violate specification limits.

How does the auto-shutdown feature of the LTC1861HMS#PBF reduce system power consumption?

The LTC1861HMS#PBF automatically enters a 1nA shutdown state between conversions when CONV remains high, reducing average current dramatically during idle periods. For example, at 1ksps sampling, average current drops to ~2µA - a 425× reduction from the 850µA active current. This behavior is intrinsic to the LTC1861HMS#PBF's architecture and requires no firmware intervention, making it ideal for duty-cycled sensor nodes.

Can the LTC1861HMS#PBF perform simultaneous sampling of both channels?

No, the LTC1861HMS#PBF performs sequential sampling: one channel is converted per CONV cycle, with channel selection determined by the 2-bit word loaded into SDI prior to conversion. True simultaneous sampling requires dual independent ADC cores (e.g., LTC1864/LTC1865 dual-channel variants) - the LTC1861HMS#PBF uses a single SAR core with internal MUX, so CH0 and CH1 are sampled at slightly different times.

What are the grounding best practices for achieving specified INL and SNR performance with the LTC1861HMS#PBF?

To achieve ±1 LSB INL and 72dB SNR, the LTC1861HMS#PBF requires separate AGND and DGND pins tied to a single-point analog ground plane with minimal trace length; avoid shared vias or daisy-chained grounds. VCC and VREF must each have dedicated 1µF tantalum bypass capacitors placed <1mm from their respective pins to AGND. Digital traces (SCK, SDI, SDO) should route away from analog input paths and be shielded if crossing sensitive regions - these practices are validated for the LTC1861HMS#PBF in its published layout guidelines.