Analog Devices Inc. LTC1867LACGN#PBF
- Part No.:
- LTC1867LACGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC1867LACGN#PBF.pdf
- Description:
- IC ADC 16BIT SAR 16SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC1867LACGN#PBF from Analog Devices is a 16-bit, 175ksps, 8-channel multiplexed successive-approximation ADC with SPI/MICROWIRE serial interface, internal 1.25V reference, and true differential input capability. It supports unipolar (0V–2.5V) or bipolar (±1.25V) conversion modes, draws only 750µA at full speed, and operates from a single 2.7V supply. It is used in high-precision industrial process control and battery-operated data acquisition systems.
For engineers reviewing the LTC1867LACGN#PBF datasheet, LTC1867LACGN#PBF pinout, LTC1867LACGN#PBF application, or LTC1867LACGN#PBF equivalent, key selection criteria include guaranteed 16-bit no-missing-codes performance, ±3LSB INL over temperature, automatic nap/sleep power management, SSOP-16 package compatibility, and support for both external and internal reference configurations.
Technical Context
The LTC1867LACGN#PBF implements a capacitive SAR architecture with differential sample-and-hold, enabling simultaneous sampling of true differential pairs (e.g., CH0/CH1) or single-ended channels referenced to GND or CH7/COM. Its internal 1.25V bandgap reference is curvature-compensated and factory-trimmed, with REFCOMP providing a buffered 2.5V output.
Digital control is handled via a 7-bit configuration word shifted into SDI, defining channel selection (S1/S0), differential/single-ended mode (SD), unipolar/bipolar format (UNI), and sleep activation (SLP). Conversion timing is governed by an internal factory-trimmed clock (tCONV = 3.2µs typ), synchronized to external SCK up to 20MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - guarantees monotonic transfer function and no missing codes across full temperature range (0°C to 70°C). |
| Sample Rate | 175ksps - maximum sustained throughput with guaranteed timing (tCONV ≤ 3.7µs, tACQ ≥ 2.01µs). |
| INL | ±3LSB max - ensures end-point linearity error remains within 0.046% of full-scale range for precision measurement. |
| Supply Current | 750µA at 175ksps - enables low-power operation in battery-powered systems without sacrificing speed. |
| Analog Input Range | ±1.25V (bipolar) or 0V–2.5V (unipolar) - supports direct interfacing with industrial sensor outputs and op-amp signal chains. |
| Reference | Internal 1.25V ±0.015V (±1.2%) - eliminates need for external reference in cost-sensitive designs; REFCOMP provides 2.5V buffered output. |
| Serial Interface | SPI/MICROWIRE-compatible - uses CS/CONV framing, SCK clocking, SDI command input, and SDO data output with straight binary/two's complement formatting. |
Pinout & Package
Housed in a 16-lead narrow plastic SSOP (GN) package with 0.65mm lead pitch and exposed pad not present. Pin 1 is CH0; pin 16 is VDD. All analog and digital grounds share Pin 15 (GND); VDD powers both analog and digital sections.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH0–CH6 (Pins 1–7) | Analog Input Channel | Single-ended inputs or positive legs of differential pairs; configurable via SD/OS bits in control word. |
| CH7/COM (Pin 8) | Configurable Analog Terminal | Acts as CH7 (single-ended) or common-mode input (–) for all other channels when COM bit = 1. |
| REFCOMP (Pin 9) | Buffered Reference Output | 2.5V output derived from internal 1.25V reference; requires 10µF + 0.1µF bypass for noise suppression. |
| VREF (Pin 10) | Internal Reference Tap / External Ref Input | 1.25V output or overdrivable input (via 3kΩ series resistor) for improved accuracy/drift performance. |
| CS/CONV (Pin 11) | Conversion Start & Serial Frame Control | Rising edge initiates conversion; low level enables serial data transfer on subsequent SCK edges. |
| SCK (Pin 12) | Serial Clock Input | Synchronizes SDI command loading and SDO result shifting; supports up to 20MHz clock rate. |
| SDO (Pin 13) | Serial Data Output | Outputs 16-bit result in straight binary (unipolar) or two's complement (bipolar) format after CS/CONV goes low. |
| SDI (Pin 14) | Serial Data Input | Accepts 7-bit configuration word (SD, OS, S1, S0, COM, UNI, SLP) to define next conversion parameters. |
| GND (Pin 15) | Analog/Digital Ground | Common return for analog inputs, reference circuitry, and digital I/O; must be low-impedance connection. |
| VDD (Pin 16) | Power Supply | 2.7V–3.6V single supply powering analog core, reference, and digital interface; requires 10µF + 0.1µF bypass. |
Key Features
| Feature | Design Value |
|---|---|
| True Differential Input Architecture | Enables rejection of common-mode noise in sensor interfaces without external instrumentation amplifiers. |
| Automatic Nap Mode Between Conversions | Reduces average current from 750µA to ~170µA during idle periods, extending battery life in portable DAQ systems. |
| On-Chip 1.25V Bandgap Reference | Eliminates external reference component count while maintaining ±20ppm/°C tempco and ±1.2% initial accuracy. |
| Flexible MUX Configuration | Supports 8 single-ended, 4 differential, or mixed-mode channel assignments via software-configurable control word. |
| Low-Power Sleep Mode | Draws only 0.2µA in sleep state, enabling ultra-low-quiescent monitoring in wake-on-event applications. |
Applications
| Industrial Process Control | High-Speed Data Acquisition |
|---|---|
|
Use Scenario: Monitoring multi-sensor arrays (temperature, pressure, flow) in PLC-based control cabinets with limited board space and thermal budget. IC Role / Device Role / Timing Role: 8-channel analog front-end digitizing sensor outputs at 175ksps with ±3LSB INL to ensure closed-loop control stability. Use Value: Single-chip solution replaces discrete mux + ADC combinations, reducing BOM count and layout complexity while meeting IEC 61000-4 immunity requirements. |
Use Scenario: Portable oscilloscope module capturing transient waveforms from vibration sensors or motor current signatures. IC Role / Device Role / Timing Role: High-fidelity 16-bit sampling engine with true differential inputs preserving SNR >83dB at 1kHz input frequency. Use Value: Enables 12+ ENOB resolution at 175ksps using internal reference-no external precision reference needed for field-deployable instruments. |
| Battery-Operated Systems | Multiplexed Data Acquisition Systems |
|
Use Scenario: Wireless condition-monitoring node powered by coin-cell battery, requiring months of operation between replacements. IC Role / Device Role / Timing Role: Low-power ADC with automatic nap mode (170µA) and sleep mode (0.2µA) minimizing energy per conversion cycle. Use Value: Achieves >100k valid conversions per mAh of battery capacity-critical for maintenance-free IoT edge nodes. |
Use Scenario: Modular test equipment where one controller manages multiple sensor modules via daisy-chained SPI interfaces. IC Role / Device Role / Timing Role: SPI/MICROWIRE-compatible serial interface with CS/CONV framing allows deterministic timing and easy firmware integration. Use Value: Eliminates parallel bus routing; supports flexible channel mapping (e.g., CH0–CH3 on Module A, CH4–CH7 on Module B) via software control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit, multiplexed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7682BCPZ-RL7 | 16-bit, 250ksps, 4-channel SAR ADC; no internal reference; requires external 2.5V ref; SPI-only interface. | Higher speed but fewer channels; lacks integrated reference and differential input flexibility. | Select when higher throughput (250ksps) and lower INL (±1.5LSB) are prioritized over channel count and reference integration. |
| LTC2309CGN#PBF | 12-bit, 100ksps, 8-channel SAR ADC; internal 2.56V reference; SPI interface; no differential input support. | Lower resolution and speed; unipolar-only input; simpler control word (5-bit vs 7-bit). | Select for cost-sensitive, lower-accuracy applications where 12-bit resolution suffices and differential rejection is unnecessary. |
Compared with AD7682BCPZ-RL7 and LTC2309CGN#PBF, the LTC1867LACGN#PBF uniquely combines 16-bit no-missing-codes performance, true differential inputs, integrated 1.25V reference, and automatic nap mode in a single SSOP-16 package-making it optimal for space-constrained, battery-aware, high-precision multiplexed sensing.
Availability
LTC1867LACGN#PBF is available at Aetrix Electronics and suitable for industrial process control, high-speed data acquisition, and battery-operated systems requiring stable component supply, long-term lifecycle support, and automotive-grade reliability documentation.
Supply support for LTC1867LACGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, communications, automotive, and consumer markets.
The LTC1863L/LTC1867L product line was designed for low-power, high-accuracy data acquisition in space- and energy-constrained environments-emphasizing integrated references, flexible input architectures, and robust serial interfaces for embedded sensor systems.
FAQ
What is the operating temperature range for the LTC1867LACGN#PBF?
The LTC1867LACGN#PBF is specified for operation from 0°C to 70°C. This commercial-grade temperature range is indicated by the "C" suffix in the part number and is validated per the Absolute Maximum Ratings table in the official datasheet Rev F. The device maintains full 16-bit no-missing-codes performance and ±3LSB INL across this range.
Does the LTC1867LACGN#PBF support true differential input pairs?
Yes, the LTC1867LACGN#PBF supports true differential inputs via configurable channel pairing (e.g., CH0/CH1, CH2/CH3). When the SD (single/differential) bit is set in the 7-bit control word, the ADC samples both inputs simultaneously and computes their difference, rejecting common-mode noise without external amplification.
Can the LTC1867LACGN#PBF use an external reference instead of the internal one?
Yes, the LTC1867LACGN#PBF allows external reference use via the VREF pin. Its internal 1.25V reference is connected through a 3kΩ series resistor, enabling overdrive with a precision external source (e.g., 2.5V) to improve gain accuracy and temperature drift-while REFCOMP continues to provide a buffered 2× gain output.
What is the minimum acquisition time required before conversion starts?
The LTC1867LACGN#PBF requires a minimum acquisition time of 2.01µs in unipolar mode and 1.68µs in bipolar mode (per datasheet Rev F, Table on page 4). This ensures the internal sample-and-hold capacitor fully settles to within ½ LSB of final value prior to SAR conversion initiation.
How does the automatic nap mode reduce power consumption in the LTC1867LACGN#PBF?
When CS/CONV remains high after conversion completion, the LTC1867LACGN#PBF automatically enters nap mode, reducing supply current from 750µA (active) to ~170µA. This occurs without firmware intervention and resumes full-speed operation immediately upon the next CS/CONV rising edge-ideal for burst-mode sampling.
LTC1867LACGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 8
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 3.6V
- Voltage - Supply, Digital:
- 2.7V ~ 3.6V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 16-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC1867LACGN#PBF FAQ
1.How can I place an order for LTC1867LACGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1867LACGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1867LACGN#PBF reliable?
The price and inventory of LTC1867LACGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1867LACGN#PBF is usually 5 days.
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Once your LTC1867LACGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1867LACGN#PBF?
For technical support, including LTC1867LACGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1867LACGN#PBF requirements.
6.How does Aetrix verify that LTC1867LACGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1867LACGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1867LACGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC1867LACGN#PBF?
All LTC1867LACGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1867LACGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1867LACGN#PBF part is unused and in its original packaging.
Return procedure for LTC1867LACGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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