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Analog Devices Inc. LTC1909-8EG#TRPBF
- Part No.:
- LTC1909-8EG#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC1909-8EG#TRPBF.pdf
- Description:
- IC REG CTRLR BUCK SMBUS 28SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,699
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Product details
Overview
LTC1909-8EG#TRPBF from Analog Devices (formerly Linear Technology) is a synchronous step-down DC/DC controller with SMBus/I²C-programmable output voltage (1.3V–3.5V), true valley current mode control, and no external sense resistor requirement. It operates from 4V to 36V input, delivers up to 10A output, and features programmable soft-start, forced continuous mode, and ±1.35% output voltage accuracy over temperature - used in FPGA, ASIC, and CPU power supplies.
For engineers reviewing the LTC1909-8EG#TRPBF datasheet, LTC1909-8EG#TRPBF pinout, LTC1909-8EG#TRPBF application, or LTC1909-8EG#TRPBF equivalent, key selection criteria include its 28-pin SSOP package, SMBus VID programming interface, 200kHz–300kHz adjustable switching frequency, tON(MIN) ≤ 100ns capability, and integrated overvoltage/undervoltage protection with 50µs PGOOD timer.
Technical Context
The LTC1909-8EG#TRPBF integrates two functionally independent subsystems: a valley-current-mode synchronous buck controller and an SMBus-compatible VID programmer. The controller uses ITH voltage (0–2.4V) to set valley current threshold and employs a one-shot timer (ION-set) for fixed on-time generation, enabling stable operation with ceramic output capacitors and duty cycles from 2% to 90%.
Its SMBus VID section provides dual 5-bit register storage (Register 0/1), selectable via SEL pin, with ±0.35% divider error over temperature and safe voltage limits enforced by internal logic. The interface supports 10–100kHz clocking, includes ACK/NACK handshaking, and drives open-drain SDA/CPUON/PGTMR outputs with 35–150mA sink capability at VCC = 5.5V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage Range | 1.3V to 3.5V, digitally programmable via SMBus/I²C using two 5-bit registers; ±1.35% accuracy over –40°C to +85°C. |
| Input Voltage Range | 4V to 36V (absolute max), with undervoltage lockout at 3.4V–3.9V (falling) and release at 3.5V–4.0V (rising). |
| Switching Frequency | Adjustable 200kHz–300kHz via external RON; compensated for VIN/VOUT variations; minimum off-time 250ns. |
| Minimum On-Time | 50ns–100ns (typical), enabling high VIN-to-low VOUT conversion (e.g., 24V→1.3V) without pulse-skipping instability. |
| Current Sensing | No external RSENSE required; uses MOSFET RDS(on) sensing; VSENSE(MAX) = 113–153mV at VRNG = 1V; foldback current limiting active during short-circuit. |
| Protection Features | Output overvoltage (±7.5% window), undervoltage (±0.6V hysteresis), PGOOD with 50µs timer, optional short-circuit shutdown timer, and latch-off enable via RUN/SS pin. |
| SMBus Interface | 10–100kHz operation; VIH = 2.1V (SCL/SDA), VIL = 0.8V; supports VID write/read/on/off commands; 500ns propagation delay (SEL→VOSENSE). |
Pinout & Package
Package: 28-lead plastic SSOP (G package), 0.635mm pitch, JEDEC MS-012AC compliant, θJA = 95°C/W, rated for –40°C to +85°C ambient operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RUN/SS (1) | Run Control & Soft-Start Input | Capacitor-based ramp controls startup time (~3s/µF); <0.8V forces shutdown; internal 1.2µA charge current enables software-controlled sequencing. |
| VON (2) | On-Time Voltage Input | Sets comparator trip point (0.7V default to ground, 2.4V to INTVCC); ties on-time to VOUT for adaptive regulation. |
| PGOOD (3) | Power Good Output | Open-drain output pulled low when VFB exits ±7.5% regulation window; enables system-level power sequencing and fault reporting. |
| VRNG (4) | Sense Voltage Range Input | Sets nominal current sense threshold (×10 scaling): 0.5V–2V range selects 70mV–200mV full-scale sense voltage. |
| FCB (5) | Forced Continuous Input | <0.76V forces continuous conduction mode at light load; >0.84V enables discontinuous mode; reduces EMI and improves light-load efficiency. |
| ITH (6) | Error Amplifier Compensation / Current Threshold | 0–2.4V control voltage sets valley current limit; EA transconductance = 1.4–2mS; direct interface to compensation network. |
| SGND (7) | Signal Ground Reference | Low-noise reference for all analog circuitry; must be star-connected to PGND at single point to avoid ground bounce. |
| ION (8) | On-Time Current Input | Resistor from VIN sets one-shot timer current; determines switching frequency; supports wide VIN range without trimming. |
| VFB (9) | Error Amplifier Feedback Input | Connects to center tap of SMBus-programmable divider; 0.792–0.808V reference ensures ±1.35% output accuracy over temperature. |
| SEL (10) | Register Select Input | TTL-compatible logic input selecting Register 0 (SEL low) or Register 1 (SEL high); enables dual-voltage margining or dynamic scaling. |
| SDA (11) | SMBus Data I/O | Open-drain bidirectional data line; requires external pull-up; supports ACK/NACK, VID write/read, and command protocol per SMBus spec. |
| SCL (12) | SMBus Clock Input | High-impedance clock input; latches data on rising edge, shifts out on falling edge; timing compliant with 10–100kHz SMBus clocks. |
| VRON (13) | Global Control Input | Pulled up internally with 2.5µA; pulling low forces CPUON/PGTMR low; enables hardware reset or global disable independent of SMBus state. |
| PGTMR (14) | Power Good Timer Output | 50µs open-drain pulse on startup or SEL toggle; can drive FCB to force fast settling during voltage transitions (e.g., 2.6V→2.5V). |
| CPUON (15) | CPU DC/DC Control Output | Open-drain output tied to RUN/SS for software-initiated soft-start; three-states when VRON high, allowing independent sequencing. |
| VOSENSE (16) | Sense Input (Upper Divider Terminal) | Direct connection to regulated output node; forms top leg of programmable resistor divider with FB pin (Pin 17). |
| FB (17) | Feedback Input (Divider Center Tap) | Connects to VFB (Pin 9); center tap of SMBus-controlled divider; RFB-SENSE = 14–26kΩ defines gain and accuracy. |
| GND (18) | SMBus Programmer Ground | Ground reference for SMBus logic; must connect to SGND (Pin 7) to maintain signal integrity and avoid bus glitches. |
| VCC (19) | SMBus Supply Input | 2.7V–5.5V supply for SMBus interface; bypass with 0.1µF ceramic; may tie to INTVCC for single-rail operation. |
| EXTVCC (20) | External VCC Input | Switches internal LDO off when >4.7V; reduces power loss and heat; must remain |
| VIN (21) | Main Input Supply | 4V–36V primary input; RC filter (1Ω + 0.1µF) required for noise suppression; powers gate drivers via INTVCC or EXTVCC. |
| INTVCC (22) | Internal 5V Regulator Output | 5.0V ±0.3V regulated output (4.7–5.3V); powers control logic and gate drivers; requires ≥4.7µF low-ESR capacitor to PGND. |
| BG (23) | Bottom Gate Drive | Drives N-channel MOSFET source-to-ground; 1–2Ω pull-down/pull-up resistance; 20ns rise/fall time into 3300pF load. |
| PGND (24) | Power Ground | High-current return path for bottom FET, CIN, and CVCC; must be low-inductance connection to MOSFET source. |
| SENSE+ (25) | Current Sense Comparator Input (+) | Connects to SW node for RDS(on) sensing; eliminates need for discrete sense resistor; supports accurate valley current detection. |
| SW (26) | Switch Node | Drains top FET and sources bottom FET; swings from ~–0.4V to VIN; connects to bootstrap capacitor negative terminal. |
| TG (27) | Top Gate Drive | Drives N-channel high-side MOSFET; rail-to-rail swing referenced to SW node; 2–3Ω on-resistance; 20ns transition times. |
| BOOST (28) | Boosted Floating Driver Supply | Connects to bootstrap capacitor positive terminal; floats up to VIN + INTVCC; enables high-side N-FET drive without external charge pump. |
Key Features
| Feature | Design Value |
|---|---|
| No RSENSE architecture | Uses MOSFET RDS(on) for current sensing - eliminates 2–5% power loss and board space of discrete sense resistor. |
| True valley current mode control | Enables stable operation at very low duty cycles (<2%) and high VIN/VOUT ratios without subharmonic oscillation. |
| Programmable soft-start via RUN/SS | External capacitor sets controlled ramp rate; prevents inrush current and output overshoot during power-up. |
| Dual 5-bit SMBus VID registers | Supports two distinct output voltages (e.g., nominal + margining); SEL pin toggles between them in <500ns. |
| Discontinuous/continuous mode selection | FCB pin enables automatic light-load efficiency optimization or forced continuous operation for low-noise applications. |
| Integrated overvoltage/undervoltage protection | Hardware-comparator-based PGOOD with ±7.5% window and 1–2% hysteresis - faster and more reliable than microcontroller polling. |
Applications
| ASIC Power Supply | FPGA Core Voltage Regulation |
|---|---|
|
Use Scenario: Providing tightly regulated 1.2V/1.8V core voltage to high-performance ASICs with dynamic current demands up to 10A. IC Role / Device Role / Timing Role: Primary synchronous buck controller managing transient response, current limiting, and SMBus-based voltage margining. Use Value: Achieves ±1.35% output accuracy across temperature and load, with <500ns SEL-to-VOSENSE transition enabling real-time voltage scaling during test modes. |
Use Scenario: Delivering 1.0V–2.5V configurable core voltage to Xilinx or Intel FPGAs with multi-rail sequencing requirements. IC Role / Device Role / Timing Role: SMBus VID-programmable controller coordinating with host processor to adjust voltage per configuration bitstream or thermal condition. Use Value: Dual-register VID support allows pre-defined low-power and performance modes; PGTMR pulse synchronizes voltage change with FPGA reconfiguration timing. |
| CPU Voltage Regulator Module (VRM) | DSP Power Management System |
|
Use Scenario: Implementing compact, high-efficiency 1.3V–3.5V VRM for embedded ARM or x86 CPUs in industrial controllers. IC Role / Device Role / Timing Role: Central controller handling soft-start, overcurrent foldback, and SMBus-triggered shutdown via VRON pin. Use Value: Forced continuous mode (FCB) eliminates audible noise during idle; tON(MIN) ≤ 100ns supports 24V input to sub-1.5V outputs without pulse skipping. |
Use Scenario: Powering TI C6000 or ADI SHARC DSPs requiring precise 1.2V I/O and 1.0V core rails with dynamic voltage scaling. IC Role / Device Role / Timing Role: Dual-rail controller interfacing with DSP's SMBus master to adapt voltage based on processing load or algorithm complexity. Use Value: ±0.35% divider error ensures accurate voltage setting across temperature; CPUON output enables coordinated power-up with DSP boot sequence. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3838EG#TRPBF | Single 5-bit VID register; no SEL pin; supports higher 600kHz max frequency; requires external sense resistor. | Lacks dual-voltage margining; better suited for fixed-output, high-frequency designs where RSENSE is acceptable. | Select when design prioritizes higher switching frequency over SMBus flexibility and RSENSE-free operation. |
| ISL6263CRZ-T | Intel VR12.5-compliant; 6-bit VID; integrated MOSFET drivers; no EXTVCC option; fixed 300kHz frequency. | Designed specifically for Intel CPU VRMs; lacks programmable soft-start and wide VIN range (4.5V–24V only). | Choose for Intel platform compliance and integrated driver simplicity; not suitable for wide-input or non-Intel applications. |
Compared with LTC1909-8EG#TRPBF, LTC3838EG#TRPBF trades dual-register VID and RSENSE-free operation for higher frequency and simpler interface, while ISL6263CRZ-T offers VR12.5 compliance but sacrifices input voltage range, programmability, and margining capability.
Availability
LTC1909-8EG#TRPBF is available at Aetrix Electronics and suitable for FPGA power supplies, ASIC voltage margining, and CPU VRM designs requiring stable component supply, long-term lifecycle support, and guaranteed parametric performance across –40°C to +85°C.
Supply support for LTC1909-8EG#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for legacy Linear parts including the LTC1909-8EG#TRPBF.
The LTC1909-8EG#TRPBF belongs to Linear's high-precision power management IC family, designed specifically for digitally programmable, high-efficiency DC/DC conversion in computing and communications infrastructure where SMBus control and tight voltage accuracy are critical.
FAQ
What is the maximum supported SMBus clock frequency for the LTC1909-8EG#TRPBF?
The LTC1909-8EG#TRPBF supports SMBus clock frequencies from 10kHz to 100kHz, as specified in its electrical characteristics table. Operation above 100kHz is not guaranteed and may result in communication errors or missed ACKs due to internal timing constraints and propagation delays.
Does the LTC1909-8EG#TRPBF require an external sense resistor for current monitoring?
No, the LTC1909-8EG#TRPBF does not require an external sense resistor. It implements No RSENSE™ technology by using the RDS(on) of the bottom N-channel MOSFET for current sensing, reducing power loss and PCB area while maintaining accurate valley current control.
How does the SEL pin affect output voltage selection on the LTC1909-8EG#TRPBF?
The SEL pin on the LTC1909-8EG#TRPBF selects between two independently programmed 5-bit VID codes stored in Register 0 (SEL = low) and Register 1 (SEL = high). Toggling SEL changes VOSENSE in under 500ns, enabling rapid voltage margining or dynamic scaling without SMBus transaction overhead.
What is the purpose of the PGTMR pin on the LTC1909-8EG#TRPBF?
The PGTMR pin on the LTC1909-8EG#TRPBF outputs a precise 50µs open-drain pulse each time the regulator starts up or the SEL pin toggles to select a new VID code. This pulse can be used to synchronize downstream circuits or drive the FCB pin to force fast transient settling during voltage transitions.
Can the LTC1909-8EG#TRPBF operate with an input voltage below 4V?
No, the LTC1909-8EG#TRPBF has a specified minimum input voltage of 4V. Its undervoltage lockout releases at 3.5V–4.0V (rising), and operation below 4V violates absolute maximum ratings and risks improper regulation, gate drive failure, or undefined SMBus behavior.
LTC1909-8EG#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 36V
- Frequency - Switching:
- -
- Duty Cycle (Max):
- 90%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- I2C, SMBus
- Control Features:
- Enable, Power Good, Soft Start
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SSOP
LTC1909-8EG#TRPBF FAQ
1.How can I place an order for LTC1909-8EG#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1909-8EG#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1909-8EG#TRPBF reliable?
The price and inventory of LTC1909-8EG#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1909-8EG#TRPBF is usually 5 days.
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Once your LTC1909-8EG#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1909-8EG#TRPBF?
For technical support, including LTC1909-8EG#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1909-8EG#TRPBF requirements.
6.How does Aetrix verify that LTC1909-8EG#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC1909-8EG#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1909-8EG#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC1909-8EG#TRPBF?
All LTC1909-8EG#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1909-8EG#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1909-8EG#TRPBF part is unused and in its original packaging.
Return procedure for LTC1909-8EG#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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