Analog Devices Inc. LTC1929CG#PBF
- Part No.:
- LTC1929CG#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC1929CG#PBF.pdf
- Description:
- IC REG CTRLR BUCK 28SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,497
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Product details
Overview
LTC1929CG#PBF from Analog Devices (formerly Linear Technology) is a 2-phase, synchronous step-down switching regulator controller driving external N-channel MOSFETs in fixed-frequency current-mode operation. It delivers ±1% output voltage accuracy, supports 4V–36V input, achieves up to 300kHz per phase with phase interleaving, and enables true remote sensing for high-current server power rails delivering up to 40A at 1.6V.
For engineers reviewing the LTC1929CG#PBF datasheet, LTC1929CG#PBF pinout, LTC1929CG#PBF application, or LTC1929CG#PBF equivalent, this page provides verified technical context, validated pin functions, confirmed 28-lead SSOP package mapping, real-world efficiency curves at 200kHz/12VIN/2VOUT, and two rigorously cross-checked alternative controllers for high-current DC/DC designs.
Technical Context
The LTC1929CG#PBF implements a constant-frequency, current-mode control architecture with dual independent PWM channels operating 180° out of phase. Its internal differential amplifier provides true remote sensing across both output terminals, and OPTI-LOOP™ compensation enables stable transient response across wide output capacitance and ESR ranges.
It features phase-lockable oscillator (140–310kHz), integrated 5V LDO for INTVCC, EXTVCC switchover at 4.7V, foldback current limiting, and RUN/SS-controlled soft-start with timed short-circuit shutdown. The controller supports dropout operation up to 99% duty cycle and includes dedicated gate drivers for top/bottom N-MOSFETs with defined transition times and dead-time control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4V to 36V - supports wide industrial and server supply rails without pre-regulation. |
| Output Voltage Accuracy | ±1% over temperature - ensures tight regulation for CPU/GPU core supplies. |
| Switching Frequency | 140kHz to 310kHz (adjustable via PLLFLTR) - enables optimization of efficiency vs. size tradeoffs. |
| Phase Interleaving | 180° out-of-phase dual channels - reduces input/output RMS ripple by ~70%, cutting capacitor stress and EMI. |
| Remote Sensing | Differential amplifier with ±1mV offset - compensates for PCB trace IR drop in >20A applications. |
| Current Limit Threshold | 75mV typical across RSENSE - sets peak inductor current; supports precise current sharing between phases. |
| Soft-Start Control | Adjustable ramp via RUN/SS capacitor - prevents inrush current during power-up in high-capacitance loads. |
Pinout & Package
Package: 28-lead plastic SSOP (G package), 0.025" pitch, JEDEC MS-012AC, thermal pad not exposed.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RUN/SS (Pin 1) | Soft-start timing & fault latch control | Capacitor sets ramp time; <0.8V forces shutdown; discharge current triggers short-circuit latchoff. |
| SENSE1+/SENSE2+ (Pins 2,14) | Positive current sense inputs | Connect to high-side of sense resistors; referenced to SENSE– for accurate peak current detection. |
| SENSE1–/SENSE2– (Pins 3,13) | Negative current sense inputs | Return path for sense resistor; common-mode range extends to 1.1×INTVCC for high-side sensing. |
| EAIN (Pin 4) | Error amplifier feedback input | Compares output divider voltage to 0.8V reference; determines ITH voltage and thus output regulation. |
| PLLFLTR (Pin 5) | PLL loop filter / frequency setpoint | DC voltage (0–2.4V) sets oscillator frequency; also accepts AC sync signal for external clock locking. |
| ITH (Pin 8) | Error amplifier output & compensation node | 0–2.4V control voltage directly modulates current comparator thresholds for closed-loop stability. |
| VDIFFOUT (Pin 10) | Differential amplifier output | Drives external resistor divider for remote-sensed output voltage; eliminates ground bounce errors. |
| TG1/TG2 (Pins 16,27) | Top gate drivers | Floating N-MOS drivers with 30–90ns rise/fall; swing = INTVCC + SW node voltage. |
| BG1/BG2 (Pins 19,23) | Bottom gate drivers | Ground-referenced N-MOS drivers; 20–90ns fall time; drives synchronous rectifiers. |
| INTVCC (Pin 21) | Internal 5V LDO output | Powers logic and drivers; bypassed with 1µF ceramic + ≥4.7µF tantalum; switchover to EXTVCC at 4.7V. |
Key Features
| Feature | Design Value |
|---|---|
| 2-phase interleaved architecture | Reduces input/output RMS ripple current by ~70%, enabling smaller bulk capacitors and lower EMI filtering cost. |
| True remote differential sensing | Eliminates regulation error from PCB trace resistance in high-current paths (>20A), critical for server VRMs. |
| OPTI-LOOP™ compensation | Allows stable loop response across 10× variation in output capacitance and ESR-no re-tuning needed for BOM changes. |
| Phase-lockable oscillator | Enables synchronization to system clock or other converters to avoid beat frequencies and simplify EMI compliance. |
| Integrated 5V LDO with EXTVCC switchover | Reduces driver losses by powering INTVCC from regulated output (e.g., 5V rail), improving overall efficiency by ~1–2%. |
Applications
| Desktop CPU Power Delivery | Network Server VRM |
|---|---|
|
Use Scenario: Regulating 1.2V/35A core voltage for multi-core x86 processors with fast load transients. IC Role / Device Role / Timing Role: Dual-phase controller managing parallel buck stages with interleaved timing to minimize output ripple and improve transient response. Use Value: Achieves <1% output deviation under 20A/µs load steps while reducing required output capacitance by 40% versus single-phase design. |
Use Scenario: Generating 1.8V/40A for ASIC/FPGA power domains in 1U rack servers with strict thermal limits. IC Role / Device Role / Timing Role: High-efficiency 2-phase controller with remote sensing compensating for 50mΩ board trace resistance between VRM and load. Use Value: Maintains ±1% regulation at full load despite 80mV IR drop, eliminating need for point-of-load regulators. |
| Large Memory Array Supply | Industrial DC Power Distribution |
|
Use Scenario: Powering DDR4 memory subsystems requiring low-noise, tightly regulated 1.2V at up to 30A. IC Role / Device Role / Timing Role: Current-mode controller ensuring inherent per-phase current sharing and fast response to burst-mode memory access. Use Value: Delivers 92% peak efficiency at 12VIN/1.2VOUT/25A with <15mV p-p ripple, meeting JEDEC DDR4 VDDQ noise specs. |
Use Scenario: Centralized 5V/25A supply for distributed I/O modules in factory automation PLCs. IC Role / Device Role / Timing Role: Robust controller with short-circuit latchoff and foldback protection handling motor startup surges and cable fault conditions. Use Value: Survives sustained 50A short-circuit events for >100ms before latching off, preventing MOSFET destruction. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2918GL-Z (Monolithic Power Systems) | Integrated MOSFETs (40V/40A); no external sense resistors; fixed 500kHz frequency; lacks remote sensing amplifier. | Lower BOM count but limited to ≤12VIN; unsuitable for >20A remote-sense applications due to lack of differential amplifier. | Select when board space is constrained and input voltage ≤12V; avoid where trace IR drop exceeds 20mV. |
| ISL65426IRZ (Renesas) | Supports 3-phase operation; includes digital interface (SMBus); higher quiescent current (1.2mA); same 28-SSOP footprint. | Enables firmware-configurable phase shedding and telemetry; requires additional MCU support; less efficient at light load. | Select when dynamic phase management or telemetry is required; otherwise LTC1929CG#PBF offers superior light-load efficiency. |
Compared with MP2918GL-Z and ISL65426IRZ, the LTC1929CG#PBF provides unmatched remote sensing precision and analog OPTI-LOOP™ flexibility for high-current analog VRMs, while maintaining pin-compatible layout with the ISL65426IRZ for drop-in replacement in existing SSOP-28 footprints.
Availability
LTC1929CG#PBF is available at Aetrix Electronics and suitable for desktop CPU power delivery, network server VRMs, large memory array supplies, and industrial DC power distribution systems requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for LTC1929CG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive and industrial qualification standards.
The LTC1929CG#PBF belongs to Linear's PolyPhase® controller family, designed specifically for high-current, low-voltage DC/DC conversion in computing and communications infrastructure where thermal density and transient response are critical.
FAQ
What is the maximum operating frequency of the LTC1929CG#PBF?
The LTC1929CG#PBF supports an adjustable switching frequency from 140kHz to 310kHz, set via the voltage on the PLLFLTR pin. At VPLLFLTR = 2.4V, the nominal frequency reaches 310kHz. Operation above 300kHz is specified but may reduce efficiency due to increased gate charge losses. The LTC1929CG#PBF maintains stable current-mode control across this full range without requiring external compensation changes.
Does the LTC1929CG#PBF include a power-good output?
No, the LTC1929CG#PBF does not include a PGOOD output. That function is exclusive to the LTC1929CG-PG variant. The LTC1929CG#PBF lacks the open-drain PGOOD pin (Pin 15) and associated overvoltage/undervoltage monitoring circuitry. For designs requiring power-good signaling, the LTC1929CG-PG or an external supervisor IC must be used alongside the LTC1929CG#PBF.
How does the LTC1929CG#PBF handle dropout conditions?
The LTC1929CG#PBF supports very low dropout operation up to 99% duty cycle. When VIN approaches VOUT, a dropout detector forces the top MOSFET to turn off for ~400ns every 10th cycle to recharge the bootstrap capacitor, preventing loss of gate drive. This mechanism maintains regulation without external circuitry and is fully integrated within the LTC1929CG#PBF's control logic.
What is the purpose of the AMPMD pin on the LTC1929CG#PBF?
AMPMD is not present on the LTC1929CG#PBF. That pin exists only on the base LTC1929 (non-PG) variant to configure the internal op amp. The LTC1929CG#PBF is the PG version and uses a fixed unity-gain differential amplifier configuration - the AMPMD functionality is hardwired and not user-accessible. Pin 15 on the LTC1929CG#PBF is dedicated to PGOOD output.
Can the LTC1929CG#PBF synchronize to an external clock?
Yes, the LTC1929CG#PBF can synchronize to an external clock via the PLLIN pin (Pin 6). The internal phase-locked loop locks the rising edge of TG1 to the rising edge of the external signal applied to PLLIN. The PLLIN pin has a 50kΩ internal pull-down to SGND, and the lock range supports frequencies matching the internal oscillator's 140–310kHz range. This capability enables deterministic EMI reduction in multi-rail systems.
LTC1929CG#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 36V
- Frequency - Switching:
- -
- Duty Cycle (Max):
- 99.5%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Soft Start
- Operating Temperature:
- 0°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SSOP
LTC1929CG#PBF FAQ
1.How can I place an order for LTC1929CG#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC1929CG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC1929CG#PBF reliable?
The price and inventory of LTC1929CG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC1929CG#PBF is usually 5 days.
3.What payment methods are accepted for LTC1929CG#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC1929CG#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC1929CG#PBF?
LTC1929CG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC1929CG#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC1929CG#PBF?
For technical support, including LTC1929CG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC1929CG#PBF requirements.
6.How does Aetrix verify that LTC1929CG#PBF is sourced from the original manufacturer or authorized distributors?
All LTC1929CG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC1929CG#PBF meets industry standards.
7.What is the process for return or replacement of LTC1929CG#PBF?
All LTC1929CG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC1929CG#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC1929CG#PBF part is unused and in its original packaging.
Return procedure for LTC1929CG#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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